STM32 MCUs Security

======================================================================                                                                 =             (C) COPYRIGHT 2017 STMicroelectronics                =                                                      &nb

Hi could I find out if anyone has successfully got X-CUBE-SBSFU running on the dual core components? There does not seem to be any examples from ST for these use cases.The dual core components I am aware of are H745/755, and H747/757. However all of them have no examples in the package provided from ST.Has anyone be able to successfully port any examples or get them running on these STM32 chips?Thanks!

Hi,the HW PEC generation of the I2C Interface has two limitations that i have not been able to work around until now. The PEC calculation is reset after a stop, but can not be initialized after start. If you want to program a SMBus Slave that is capable of reacting on a Read with Start/Stop instead of repeated Start between RX/TX (for compatibility reasons) the PEC calculation fails, because it is reset and is only calculated for the second part of the Transaction. The I2C_PECR register is only updated after a HW check or insertion of the PEC. If you don't know the length of a message you can not initialize the HW check for the last Byte, because you only know with the stop that it was the last byte. A software check of the PEC in a Stop ISR fails also, because the I2C_PECR register isn't updated. It still contains the value from the last transaction where HW check or insertion has been used. Is the internal PEC register accessible to initialize it with the previous PEC instead of zero

Hello, in one my project I need to have SBSFU. On first version on my board I had STM32F405 uC and was successfully ported example STM32F413H_Discovery_2_Images_SBSFU. For test the porting I changed startup file in the discovery example for 405 series and make a bit chagings in functions which writing data to FLASH, also made changes for UART pins and the button. Same things I try to do fo STM32429VIT uC (2 Banks Flash) - but it not working, I have next errors in the UART terminal:= [SBOOT] STATE: HANDLE CRITICAL FAILURE= [EXCPT] SIGNATURE CHECK FAILED! Cheking under debug I found the error became from firmware tag verification part in file sfu_fwimg_core.c (see more in the attachment):/* Firmware tag verification */    if (MemoryCompare(fw_tag_output, fw_tag, SE_TAG_LEN) != SFU_SUCCESS)    {     *pSeStatus = SE_SIGNATURE_ERR;     se_ret_status = SE_ERROR;     sfu_ret_sta

Hi AllI need to fill the security policy about STM32 crypto library(STM32CubeExpansion_Crypto_V3.1.0), and had three function name to fill.1, Entropy Health test2, Repetition Count Test3, Adaptative Proportion TestAnyone knows these?Regards,

Hi there,I am trying to understand the state of the option byte values in flash after a forced mass erase (changing RDP from level 1 to 0) for a STM32L151 (Cat.2).From my own investigation it appears that after a forced mass erase all the option bytes in flash are erased (0 value). The data sheet does explicitly state that the program memory and option bytes will be erased. The erased value of program on this part is 0. All good. However i notice that the RDP option byte in flash is not erased. Process and details below:  * Mass erase by changing RDP from level 1 to 0 using JTAG script.  * Cycle power.  * Load firmware to inspect the state of the option bytes.    OB->RDP = 0xff5500aa    This is not erased? Why?    OB->USER = 0x00000000    This appears erased? i.e. it does not contain the virgin device values for BOR etc.    FLASH->OBR = 0x00780

I'm sure I'm missing out something obvious as I'm fairly green with limited programming experience, but I could not port the STM32F413 project to run on my own STM32F417 board. I've scoured this topic and followed Security Part6 - STM32 security ecosystem - 04 Experience SBSFU benefits - YouTube, but I'm stuck at basically level 0, where I can't even get the SBSFU to run - There is nothing on the terminal. It is very likely some changes that I am missing out. Can someone who has managed to port to this device point me in the right direction?

I have a routine that I have used for years on other processors and on PCs to get a CRC16 X-25 from a string. I'd like to get the hardware CRC to use the same CRC16.I have tried every variant in the STM32CubeIDE and have not been able to get same output. I know the X-25 uses an XOR of 0xFFFF which I do to the result I get from the HAL_CRC_Calculate.I'm using my name as the test string...unsigned char crcTest[]="Jim Fouch";and then calling the CRC in HAL like this...crcResult = ~HAL_CRC_Calculate(&hcrc, (uint32_t *)&crcTest, strlen(crcTest));Here is my crc Init...static void MX_CRC_Init(void) {   /* USER CODE BEGIN CRC_Init 0 */   /* USER CODE END CRC_Init 0 */   /* USER CODE BEGIN CRC_Init 1 */   /* USER CODE END CRC_Init 1 */ hcrc.Instance = CRC; hcrc.Init.DefaultPolynomialUse = DEFAULT_POLYNOMIAL_DISABLE; hcrc.Init.DefaultInitValueUse = DEFAULT_INIT_VALUE_DISABLE; hcrc.Init.GeneratingPolynomial = 4129; hcrc.Init.CRCLength = CRC_POLYLENGTH_16B; hc

I am working on the SMT32L4 series controller and want to perform some cryptographic operation on data.

Hello, I have hundred of boards where I need to update our custom bootloader which resides in blocks 0/1/2/3/4 (the bootloader "partition" is 5KB). The new bootloader code resides inside the firmware binary, when the firmware boots, it checks if the actual bootloader is up to date, and if not, it erases it and update it.It works perfectly well in my development board on my desk. But the bootloader update fails on already delivered products. Yesterday I found the problem, the delivered boards have read protection activated in option byte (and it is not activated on my development board) but no write protection on any blocks is activated. But I found in the flash programming manual that when read protection is activated, it automatically activates the write protection on blocks 0/1/2/3 !!!!!Why do ST implemented this incredible logic !!?? If we decide to activate read protection, why also activate write protection on some block !? There are write protection bits in option byte if we need

HelloFile "STM32_Cryptographic/Inc/Common/macros.h" defines macros MIN and MAX without any "#ifndef" around. Thus compiler warnings "redefined" are generated, if the file is included by customer code after headers of BLE stack.File STM32WPAN/ble/ble_common.h has following code:#ifndef MAX#define MAX( a, b )           (((a) > (b)) ? (a) : (b))#endifFile STM32WPAN/stm32_wpan_common.h has following code:#undef MAX#define MAX(a, b) (((a) > (b)) ? (a) : (b))One of these codes should also be applied in macros.h of crypto lib (same for MIN etc).Best regardsPaul

Hi Community. I'm trying to port the LoRaWAN_End_Node_DualCore with SBSFU application example to CubeIDE but I'm facing a lot of linker errors. Is there a way to have a working CubeIDE project for this example? I'm working with the dual core STM32WL55xx nucleo board.I'm currently lost with a set of errors like that:undefined reference to `SVC_SYS_DisableAllNvicIrqs'.I suspect there is some code missing and/or incorrect defines in my project, for any service used to interact with SVC_APP_Handler in sys_privileged_services.c ... any help on this?Than you and best regards.,

Hello everybody,after a long fight I got the SDMMC2 interface running in 1 bit mode on the STM32H755. I thought running it in 4 bit mode in the next step should be no big deal anymore; what a naive assumption...The SDMMC is running with FATFS and FREERtos on the M7 core. The buffers for FATFS are located in RAM3. RAM3 is protected by the MPU so that DMA can work despite enabled cache.In 1 bit mode everything works fine. I can mount the drive and I can write data. However, switching to 4 bit mode, mouting of the drive fails. I looked deeper into the code with the debugger and observed following behaviour:The card init works fines and exits with no error. FATFS then reads the first sector (adress 0, 512 bytes) by means of DMA. Works fine. RxCmplt interrupt is called and the RTOS event releases the read function which returns no error. Data can be found in the read buffer.Then, FATFS calls another DMA read operation. It tries to read another sector of 512 bytes at the address 8192. This i

Hi,I'm not sure what is going on exactly, but I think there is either an issue with the HAL or the USB windows driver for STM32 CDC. I am using an STM32L072KBU, STM32Cube MCU Package 1.17.0. I wait until the device is enumerated (by checking the dev_State in the device handle), send a byte to the STM32 over USB to allow the STM32 to begin sending 4-byte packets every 5 seconds. I noticed that the STM32 stopped sending packets, and I narrowed this down to TxState never being cleared. (It is set to 1 in USBD_CDC_TransmitPacket, and should be cleared by USBD_CDC_DataIn).I connected by Saleae Logic8 Pro to the USB lines, and noticed that I get either an error packet or a CRC failure as the last packet I send out.  Any ideas??Thanks in advanceEDIT: I've also attached a Logic2 capture of sending 4 bytes every 5ms (yes milliseconds) now, to help capture as much detail as possible. I am also sending the same 4 bytes out over UART. If anyone looks at the data, I'm pretty sure the USB doesn

See image below of popup - no entries available to select in the "Application:" drop-down.

Hello, I a new with NUCLEO STM32H753ZI and trying the SBSFU examples (1 and 2 images). I can flash and launch the SBSFU but I can't load any user application (userapp.sfb)I use STM32 tools, either using Linux or Windows with the same result :I connect with a VCP using Teraterm (on Windows) or Minicom on Linux) with YMODEM protocol,The terminal display the SBSFU sequence, which is good and terminates by waiting for a user appli to be downloadedI Send the UserApp.sfb with (File->Transfer->Ymodem)AND the load remains stopped at the first block ....I have followed the guides given in the examples documentation (from readme files into project SBSFU V2.4.0), I have applied :The security configuration (Option Bytes set to Default "No Security")Serial configuration seems also OK

Hi all,I am practicing the Secure boot using SBSFU using the stm32L476 development board. I have implemented a code for the SBSFU, but it is giving a warning WARNING: A Reboot has been triggered by a Watchdog reset!      INFO: Last execution detected error was: Watchdog error.= [EXCPT] WATCHDOG RESET FAULT!and I define the key for the 0x0000AAAAu, but it gets restarted inconsistently, for example, as first it will restart in 10 cycles of execution and next it will restart in 100 executions and again in 20 cycles like that, is there any reason behind this. I am really new to the SBSFU.Thanks.

I'm working on creating a sfu loader to load sfb files from an external flash on a port I made for the STM32H735 (based on NUCLEO-H753ZI)I follow the same steps as used in the ymodem loader:read and verify header (reusing SFU_LOADER_VerifyFwHeader)erase active image in slot 1 (single slot config, starting at 0x08020000, ends at 0x080FFFFF) and set m_uDwlAreaAddress to m_uDwlAreaStart.run SE_Decrypt_Initwrite header to m_uDwlAreaAddress (== m_uDwlAreaStart) and increment it with SFU_IMG_IMAGE_OFFSET (1024)for each chunk of dataSE_Decrypt_Appendpad extra bytes if neededwrite to internal flash.It's at the last step that it fails during write. Writing the header succeeds however and using STM32CubeProgrammer I can verify the written data is correct.The first chunk is 1024B and is written to address 0x08020400.Looking into SFU_LL_FLASH_INT_Write() it turns out it fails on verification of the written data (if memcmp:(if (HAL_FLASH_Program(FLASH_TYPEPROGRAM_FLASHWORD, destination, (source + i

For the past few weeks I have been trying to port the NUCLEO-H753ZI SBSFU implementation to the H757 and have run into several problems. My development environment is linux.First of all, I could not build the binaries succesfully without massive modifications to the project. First I had to install python modules and point the scripts to the proper python version (python3). Second, I had to fix paths that were misspelled within the projects' settings. Finally, I had to fix an issue where the makefile of the user application included the se_interface_app.o file twice in the same command, resulting in an error.Only after all of this was I able to produce a binary that was programmable onto the board, but even after all this when I would try to send a .sfb file through minicom the SBSFU would still throw an error by saying the firmware was too big.I have read the integration guide many times over and I still don't understand what steps I need to make to adapt the project to the H757. I fin

Hi all,I'm working in a project (with STM32L476) in which i am building my own bootloader to perform secure boot and firmware upgrade.I have some doubt regarding this matter. is there any resources available for secure the HEX file (encrypt and decrypt). if yes could help me out to find them. is there any please can you help me to find. Since i am newbie to the bootloader and firmware security. your response will be massive for me

I'm following the security part 6 - 02 Building the SBSFU but the final build of the UserApp always ends up with an error.Instructions are being followed EXACTLY as in the video. I'm getting a different project size when building the SBSFU, slightly larger at 59874 instead of 59578 as mentioned in the video and the documentation. Going on to the next step of building the UserApp will always fail with this error:c:\st\stm32cubeide_1.0.0\stm32cubeide\plugins\com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_1.5.0.202011040924\tools\arm-none-eabi\bin\ld.exe: ../../../../../../../../Projects/NUCLEO-L476RG/Applications/2_Images/2_Images_SBSFU/SW4STM32/STM32L476RG_NUCLEO_2_Images_SBSFU/Debug\se_interface_app.o: in function `SE_APP_GetActiveFwInfo':(.SE_IF_Code+0x0): multiple definition of `SE_APP_GetActiveFwInfo'; ../../../../../../../../Projects/NUCLEO-L476RG/Applications/2_Images/2_Images_SBSFU/SW4STM32/STM32L476RG_NUCLEO_2_Images_SBSFU/Debug\se_interfa

I have external flash of size 1MB. I want to explore the possibility of having encrypted code of size 500kb in external memory and run it through OTFDEC feature of STM32L562QE.From the reference manual I saw that provision of 4 different OTFDEC regions is given ( 4 different portions in external flash with 4 different crypto keys if required). My use case is I just want a single key to encrypt whole of my code thus defining a OTFDEC region of size 500kb (is it feasible ?? )The following was also provided in the manual : Granularity for the region determination is 4096 bytes. Note:Although OTFDEC does not prevent region overlapping it is not a valid programming and it should be avoided by application software. OTFDEC can decrypt incremental or wrap bursts only if they do not cross the 4096-byte aligned address boundaries.Does above statements have any impact in my use case ? how should I handle this ? Can some one guide please

STM32L151

I am looking into STSAFE A1100 to implement authentication. I noticed it is referred to as an IC instead of an MCU. Does it mean it is not programmable? Do we have to use it as is?

Hello there,I am trying to find the right RDP config for the STM32G0 MCU. My aim is the following functionality:User code can read/ write the flash,Bootloader/ external SWD debugger cannot read the flash,Bootloader/ external SWD debugger can erase and write the flash.Does such configuration exist? I am trying to find the right config for production mode, in which it will be not possible for anyone to read the flash contents (erase and write is ok).This table from the RM0454 Rev 2 doesn't seem to have this config available- maybe I am missing something? I would appreciate all feedback.