STM32 MCUs Embedded software

I have STM32N6570-DK board and need to use very small sized camera ~1x1mm 30 fps with USB UVC interface for object detection applications. As the camera does not have dcmi/csi-2 interface, I am exploring how to use USB HS Host driver and UVC class driver. Questions: 1. Is it possible to get real-time inference on UVC video stream(20-30fps) as in an example ST      provides? I have tried the example and inferencing speed is very fast. 2. Are there any example codes I can refer to for USB host and vuc class driver?  3. or should I try find the video bridging hardware converter(UVC to DCMI parallel/MIPI CSI-2)? 4. Even if I can find CSI-2 converter, firmware development will still be very challenging for CSI interface. Is it worth trying out? DCMI parallel will be much easier to implement in coding. However, small camera does not come with parallel interface. Are my assumptions correct? Any help/guidance/clarification would be greatly appreciated! Thank you

Hello.I've tried to implement the TCP client using freeRTOS, socekt API and LwIP middleware on STM32H723ZG.However, I cannot figure out why the connect() function in socket api doesn't work and stuck.Is there a example for nucleo-H723ZG with LwIP and TCP client?Sincerely. 

Hi,I'm using an STM32H723 and store my configuration data in flash. Here The procedure is: erase the flash once, then write to the erased flash. On read check the flash for a magic word to find where data have been written. Next write happens the same way, it uses the magic word to find an unused part of the flash to write to (in order to save erase cycles). So data are written several times until a new erase is necessary.Now sometimes I end up in the HardFault handler because of an illegal read:void *Flash_Storage_Read(const size_t length) { uint32_t base_addr = FLASH_STORAGE_START_ADDR; uint32_t final_addr = base_addr + length; uint32_t *finalData=(uint32_t*)final_addr; const uint8_t *flashID=(uint8_t*)final_addr; while ((final_addr<FLASH_STORAGE_END_ADDR) && (*finalData!=0xFFFFFFFF)) -------> this read access causes the HardFault_Handler() to be called { base_addr+=length; final_addr+=length; finalData=(uint32_t*)final_addr; } return (void*)base_addr; }&n

I am on an H562 and trying to rd/wr a file on a USB memory stick using the mass storage controller. I am trying to understand what to do about this block when I am running in standalone mode. I started from an example code which is in RTOS mode but I want use the standalone mode.When I tried to implement something meaningful in UX_DEVICE_INSERTION status, it turns out that the expression_mediaPtr = &_storageMediaPtr->ux_host_class_storage_media;fails to compile because  'UX_HOST_CLASS_STORAGE_MEDIA' has no member named 'ux_host_class_storage_media'.I think the problem is in this definiton:but I need to use FILEX. Than I tried the method 2 using the function 'ux_host_class_storage_media_get' but it is not present in the folder Middlewares/ST/usbx/common/usbx_host_classes/srcWhich of the two methods should I use?  How can I skip the problems? Do I have to define something different?

In the above image (logic analyzer) , SPI in DMA was supposed to start at the end of high on the second signal, but it starts a bit later. (3rd signal CS of SPI, 4th signal SCLK)And the SPI was to supposed to be active at every period (the first signal) whose period is 8.607us. The second signal is a slave timer to the first and a period elapsed callback of this signal call HAL_SPI_Receive_DMA.There is also a 1 second timerWhat should i do to correct this? I don't how to proceed, any solutions, learning materal would be really helpful

Hi I am trying to migrate my code from SPL(old version) to HAL based code I have conveted the  same setup code to cubemx to generate the init function and I am using a clrc663 IC(card reader) along with it when the Ic Generates an interupt the mcu doesnt process the interuppt but when using test case using software to check the interupt handler it works but when the pin goes from high to low but there is no interupt happening. can anyone explain why it is not working.mcu->spi & interupt ->clrc663DBG: TCONTROL read=0x00state 1 = HIGHDBG: Write IRQ1EN st=0x0000 write=0xC2 read=0xC2DBG: IRQ1 clearedstate 2 = HIGHDBG: TCONTROL written start=0x33state 1 = LOWDBG: Before WaitIrqDBG: MCU IRQ pin after RC663 GLOBALIRQ = LOWthese are the debug outpur ihave used a print statement inside the interupt handle but it is not printed

Hello, Using Modbus master and slave communication, where Modbus master working fine, I have issue with slave device communication. Using HAL_UARTEx_ReceiveToIdle_IT() for receiving modbus frame, and HAL_UART_Transmit_IT() to transmit response. Currently doing only read for testing purpose. Issue: LPUART does not wakeup on receive interrupt. Here is the information below During Init() #define LPUART1_EXTI_ENABLE_IT() (EXTI->IMR1 |= EXTI_IMR1_IM28) LPUART1_EXTI_ENABLE_IT(); __HAL_RCC_WAKEUPSTOP_CLK_CONFIG(RCC_STOP_WAKEUPCLOCK_HSI); __HAL_RCC_HSI_ENABLE();   And here I will go to sleep mode if no rx/tx going on. So I will maintain the state busy until rx to tx process is complete. Once it complete, it will go to sleep mode. Here below is sleep mode logic //Preparation for next receive data RS485_RX_ENABLE();//Its macro to receive RX data on line. __HAL_UART_FLUSH_DRREGISTER(&hlpuart1); HAL_UART_AbortReceive(&hlpuart1) HAL_UARTEx_ReceiveToIdle_IT(&a

STM32 MCUs hide surprisingly useful hardware features that can save you CPU cycles, lower power, make multi-core life easier, and fix intermittent bugs — if you know they exist. This article reveals 5 “hidden” STM32 features (with concrete examples and code) that even experienced MCU engineers often forget, and exactly how to use them safely in production. Feature 1 — Fast-mode Plus I²C (FM+, up to 1 MHz) Fast-mode Plus (FM+) is an I²C mode that supports communication speeds up to 1 MHz, which is faster than Standard mode (100 kHz) and 2× faster than normal Fast-mode (400 kHz). Why does FM+ exist? Standard 400 kHz I²C couldn’t keep up with: High-speed sensors High-refresh displays Real-time control loops Large configuration registers in ICs Interrupt-driven or polling-heavy systems FM+ allows faster transfers without switching to SPI. Why is FM+ “special” in STM32? Most STM32 MCUs have: Dedicated FM+ pins (because they need stronger current capability) Hardware fil

HiI have seen mention of STM32Cube_FW_N6_V1.3.0 being released soon, and including important fixes to demos. Is there an expected released date?

Hi All, I have a question regarding the validity of my implementation of ADC + DMA on the STM32H753ZI. I had quite a lot of trouble getting the HAL_ADC_ConvCpltCallback configured as void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc) { counter ++; BSP_LED_Toggle(LED_RED); } to trigger, as all other guides did not work until I found this guide: https://www.youtube.com/watch?v=_K3GvQkyarg Where at around 27 minutes there is shown how how to enable the MPU and then how to configure DMA around it. For me the DMA callback did not trigger at all until I : - Disabled Speculation default mode and enabled CPU ICache and DCache - Enabled MPU region 0, setting the base address to 0x38000000 using RAM_D3, all access permitted and disabling MPU Instruction Access, Sharebility permission, Cacheable Permission and Bufferable Permission. - Added a RAM modification in STM32H7XX_FLASH.id as /* RAM MODIFICATION */ .nocache(NOLOAD) : { . = ALIGN(32); * (.nocache) } > RAM_D3 and the

Hey all,I'm trying to get embedded Lua (https://eluaproject.net/) running on an STM32C0 MCU. The implementation has a Write Once Filesystem that uses flash and can be appended to but not modified.The issue is that the WOFS relies on being able to write bits in flash as 0xFF or 1s with the expectation that it will be able to write over them later to set them to 0s (obviously not vice versa) For instance an 8 byte (smallest size supported by this flash?) write to address A with data FF FF FF FF 01 23 45 67, then later another write to address A with data AA FF FF FF 01 23 45 67. I think this is used to set flags on old files, like "deleted", and also to deal with the fact that the FS is designed around 4 byte, not 8 byte alignment.This seems like it would be possible from a hardware perspective but HAL_FLASH_Program errors when I try it, is this something that is possible? Thank you! 

Hey,I tried to follow all the steps of this thread as good as possible. Still I have a faulty SAI Perpheral. The Problem is that the generatet FSYNC and BCK are too low. They are both also dependent on the PLL Frequency. For example if i set IC7 so that it has 12.288MHz the FSYNC is 2kHz (insted of 48kHz) and BCK is 512kHz (instead of 12.288 MHz).When i set IC7 to 192MHz FSYNC is 31.3kHz and BCK is about 8MHz. Also if I set any other clock channel than IC7 to feed the SAI1 Peripheral, then there won't be any FSYNC or BCK anymore.  The D-Cache is working and doesn't give me an error as i followed this post: https://community.st.com/t5/stm32-mcus-embedded-software/stm32n6-using-dcache-with-freertos-and-sai-gpdma-usage/m-p/850823/highlight/true#M69398I am running everything in Appli. Here are the settings:SAI Setting: GPDMA1 Setting: 

I am sending and receiving MQTT messages. My problem is that after normally working it could be that one ACK is not been sent out to the broker which prevents him to send anymore messages to my board.I recognized that by watching the packets on the bus with wireshark and also some debug prints. My app is running it could be for hours. I can send and receive messages for a long time. But on any circumstances one ACK is not been sent to the network and stalls the whole communication with the broker. What about watching the tx interrupt coming from the eth. Any more ideas where to debug this in more detail. Thanks in advance

I'm using an STM32U5A9J-DK and I've followed this guide step-by-step https://community.st.com/t5/stm32-mcus/how-to-redirect-the-printf-function-to-a-uart-for-debug-messages/ta-p/49865From the docs https://www.st.com/resource/en/user_manual/um2967-discovery-kits-with-stm32u5x9nj-mcus-stmicroelectronics.pdf I'm seeing that the virtual port is set to USART1, so I've set it up with CubeMX which generated/** * @brief USART1 Initialization Function * @PAram None * @retval None */ static void MX_USART1_UART_Init(void) { /* USER CODE BEGIN USART1_Init 0 */ /* USER CODE END USART1_Init 0 */ /* USER CODE BEGIN USART1_Init 1 */ /* USER CODE END USART1_Init 1 */ huart1.Instance = USART1; huart1.Init.BaudRate = 115200; huart1.Init.WordLength = UART_WORDLENGTH_7B; huart1.Init.StopBits = UART_STOPBITS_1; huart1.Init.Parity = UART_PARITY_NONE; huart1.Init.Mode = UART_MODE_TX_RX; huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; huart1.Init.OverSampling = UART_OV

Hi everyone,I am currently running the DCMIPP_Continuous mode example from STM32N6Cube firmware v1.2.0. However, I am getting stuck at the function call:HAL_result = HAL_RCC_OscConfig(&RCC_OscInitStruct);RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_NONE; RCC_OscInitStruct.PLL1.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL1.PLLSource = RCC_PLLSOURCE_HSI; RCC_OscInitStruct.PLL1.PLLM = 4; RCC_OscInitStruct.PLL1.PLLN = 75; RCC_OscInitStruct.PLL1.PLLFractional = 0; RCC_OscInitStruct.PLL1.PLLP1 = 1; RCC_OscInitStruct.PLL1.PLLP2 = 1; RCC_OscInitStruct.PLL2.PLLState = RCC_PLL_NONE; RCC_OscInitStruct.PLL3.PLLState = RCC_PLL_NONE; RCC_OscInitStruct.PLL4.PLLState = RCC_PLL_NONE; HAL_StatusTypeDef HAL_result; // Have a variable to catch the result HAL_result = HAL_RCC_OscConfig(&RCC_OscInitStruct); // Catch the result if (HAL_result != HAL_OK) { Error_Handler(); }After some debugging, I found that the function returns HAL_ERROR. Earlier, this code was working fine,

Good morning, I need to connect two h7a3zi-q board via uart (only one way required), but by only connecting tx1->rx2 the programs run but I get empty strings, and by also connecting the grounds of the two boards the tx program gives HardFault. I'm sure of the content of the msgs as I also send via uart3 to my pc and I have no problems.  Any tips? Thx

Hi,I'm going to use four different OpAmps in the STM32G474, namely OPAMP3, OPAMP4, OPAMP5, and OPAMP6.At this moment I try to initialize all four OpAmps. The first three work perfectly well, the initialization of OPAMP6 results in a problem. The State of OPAMP6 is HAL_OPAMP_STATE_CALIBBUSY. And, therefore result in an error.For the first three the State is '28', and initialize perfectly well.How can I fix this? What is causing this behavior?With kind regards,ErX

I'm using the STM32H562. I'm trying to start an ADC conversion using output compare on a specified channel during the middle of an up-down count of a timer.Timer used: TIM8 running at 250 MHz, generating a 20 kHz periodChannel: 4Timing: At the peak of the up-down countPeripheral configuration:In TIM8_CCMR2, OC3M is set to 0001 to activate the signal when the counter matches the compare value.In TIM8_CR2, both MMS and MMS2 are set to 0111 to use Channel 4 as the trigger output.For ADC1 and ADC2, the trigger source is set to TIM8 TRG2.Although TIM8 has been started, the HAL status of the ADC conversion remains at 0xFF.I would like to know if there is any configuration I might have overlooked, or if there is a way to detect the start of ADC conversion for debugging purposes, such as using an interrupt. Here are the initialization procedures for TIM and ADC:/** * @brief TIM8 Initialization Function * @PAram None * @retval None */ static void MX_TIM8_Init(void) { /* USER CODE BEG

All, My team is looking at designing a PCB around the STM32U5G9-DK2 development board and are running into some issues. The development board uses a flash memory IC "MX66LM1G45GXDI00" but the BSP example driver for the board only contains "MX66UW1G45G" information.https://github.com/STMicroelectronics/STM32CubeU5/tree/main/Projects/STM32U5G9J-DK2/Examples/BSP/Inc Is there a reason the development board only references this other flash memory IC in CubeIDE and if so will this driver still work for the development boards IC? Thank You, 

Hi everyone,We are using STM32H755ZIT6 with external QSPI Flash in memory-mapped mode.After long runtime, we see an issue where the RTOS event returns resource unavailable (-3) even though the UART buffer has received complete data. We suspect it might be related to QSPI, because our QSPI trace length is around 66 mm. Our question::backhand_index_pointing_right: If any data or byte is missed during QSPI (memory-mapped) read, can this cause the system to get stuck or RTOS events to fail? Anyone faced similar behavior or can confirm this possibility?

Hello everyone,I’m working on an STM32F103 microcontroller using CAN in polling mode (without FreeRTOS).From my testbench, I transmit 16 CAN messages cyclically every 100 ms.Each message has a unique CAN ID.My goal is to:Receive all 16 messages within the 100 ms cycle,Process each message and,Send back an acknowledgment (ACK) frame for each received message.However, when I send all 16 messages cyclically from the testbench,I’m receiving only 3 messages’ acknowledgments — the rest are missing.Can anyone help me out.

Hello,I am trying to take a log using my sdcard on my project.I am using FATFS that included in STM32CubeIDE but I got some issues, without FREERTOS everything works as expected and fine but when I enable the FREERTOS and it want's me to enable USE_NEWLIN_REENTRANT. When I enable it generates problem with FATFS USE_LFN(long file name) selection and normally it is Enable with dynamic working buffer on BSS. But the IDE wants me to change it and I change it for the STACK than I tried the HEAP and also tried for the disable option. But in both way my system got stuck in f_open function and returns FR_NOT_READY I searched online but I couldn't find the exact solution for this problem. When I searched I found examples for DMA option but I don't have the dma option in .ioc file you can see it in attachements.  I am trying to initialize my sdcard in main code and my function looks like this   FRESULT initialize_sd_card(void) { FRESULT res; /* FatFs function common res

The linkerscripts generated by the STM32CubeMX for STM32F767ZI appear to use the AXIM interface:/* Specify the memory areas */ MEMORY { FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 2048K RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 512K }But the default boot vector is set to address 0x0020 0000 which is a ITCM address:# gdb console > monitor stm32f7x options_read 0 stm32f2x user_options 0xFFC, boot_add0 0x0080, boot_add1 0x0040boot_add0 0x0080 indicates ITCM.When I move the boot vector by 128K, I have to set boot_add0 to 0x0088 (8*16K=128K) and set FLASH  ORIGIN in above linker script to 0x08020000. Otherwise it will not work. That is a bit confusing.Is the MCU really booting from ITCM?The binary code is not explicitly position-independent. I contains absolute jumps to addresses in the AXIM space because that is what LMA and VMA are configured to in the default linker scripts. Does my application only work by accident?Should LMA and VMA in the linker script be separated, i.e. V

STM32CubeIde 1.19.0STM32Cube_FW_N6_V1.2.0RTSP Client: FFPLAY I've been evaluating the VENC_RTSP_Server example for a little while as a starting point for a potential video streaming application. Unfortunately, the example does not produce a stable stream. The stream was unstable prior to FW v1.20 as well, but a new check and message was added in FW v1.20 (MSG: "Video Overflow - Skip Frame") that seems to point to the bottleneck being on the encoding side somewhere and not the network side. I'll detail some of the issues here. Some of these issues address quality problems and may or may not help this performance, but others do affect it. I'm also certainly open to the possibility that my analysis could be wrong in some cases as I haven't had much time working with this part and the STM32Cube tools.  File: Appli/Src/main.c Issue #1: A) The PLL2 configuration in SystemClock_Config() is invalid according to STM32CubeMX or at least it will not allow this configurati

I have a Flash Full test failed issue with the STM32F427 ClassB library V4.0.0 code in Keil project.The project is generated from the STM32F446RE-Nucleo examples. Attached please find my scatter file and the post-build command batch file. (I have tested the official CubeIDE project and it can pass the Flash Full test and also the runtime partial flash test.) Project.sctLR_IROM1 0x08000000 0x00080000 { ; load region size_region (512KB FLASH) ; Interrupt Vector Table and Program Code (FLASH) ; Full 512KB flash region ; Note: CRC area (0x0807FFFC-0x0807FFFF) should be excluded from flash test ER_IROM1 0x08000000 0x00080000 { ; load address = execution address (full 512KB) *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) .ANY (+XO) } ; RAM Memory Region (192KB) ; Backup buffer section (for STL) - 32 bytes (0x20), placed first in RAM, UNINIT (NOLOAD) backup_buffer_section 0x20000000 UNINIT 0x20 { * (backup_buffer_section) } ; Initialized data (loaded from FLAS