STM32 MCUs Embedded software

I am developing a custom board using STM32H523RET6.It has a USB type C port, and I am trying to send some data from PC to the board through it, and decided to use USB CDC ACM with standalone mode. The code is based on this and this.ux_device_class_cdc_acm_write_run worked perfectly, but ux_device_class_cdc_acm_read_run doesn't work.No matter what kind of texts I send, ux_device_class_cdc_acm_read_run returns "T" (84). The code I am using is this;uint8_t UserRxBuffer[APP_RX_DATA_SIZE]; VOID USBX_DEVICE_CDC_ACM_Read_Task(VOID) { ULONG actual_length = 0; UX_SLAVE_DEVICE *device; device = &_ux_system_slave->ux_system_slave_device; /* Check if device is configured */ if ((device->ux_slave_device_state == UX_DEVICE_CONFIGURED) && (cdc_acm != UX_NULL)) { #ifndef UX_DEVICE_CLASS_CDC_ACM_TRANSMISSION_DISABLE /* Set transmission_status to UX_FALSE for the first time */ cdc_acm -> ux_slave_class_cdc_acm_transmission_status = UX_FALSE

Hi, I'm using stm32h7, currently working with SPI + DMA in HAL library, because of HAL overhead I want to move to LL library, where can I get the SPI+DMA using LL library examples, regards, Srinath

Hi. I'm having trouble using the old USB Host Middleware to read a USB stick with a STM32U545.I've tried to follow this article, doing my best to adapt it for the host middleware and also using the "FatFs_USBDisk" example project for the F767 Nucleo board and a usbh_conf.c/.h written by a coworker for another U545 project which supposedly worked at least once.My code fails in Enumeration when the MCU tries to get the device descriptor - The MCU sends a SETUP packet and a DATA0 packet with 0 bytes (instead of the expected 8) and the stick sends an ACK. The MCU then sends an IN packet and the stick sends a NACK. The IN & NACK are then repeated for many frames until the stick sends a STALL instead.Can anyone help me identify where the bug is and how to fix it?Thanks.

Hi Everyone, I've followed STguide on Ethernet on H755 using RTOShttps://community.st.com/t5/stm32-mcus/how-to-create-a-project-for-stm32h7-with-ethernet-and-lwip-stack/ta-p/49308/page/2/show-comments/trueand a github on ETH on bare metal (my case)https://github.com/AngryCarrot61/NUCLEO-H755ZI-Q_003_ETH?tab=readme-ov-file i got the board to work and ping, I've implemented MPU and connected it to a laptopDHCP is disabled, my laptop ip is 10.0.0.100, subnet 255.255.255.0, gateway 10.0.0.1the mcu ip is 10.0.0.60The ping works only if i flash the M4 core with an empty application which gets halted by the HSEM (it never works unless i flash the M4 first after power up) and the connection never lasts more than a minute. Looking for some help, i've included the whole zip file of the project if someboy could replicate it on their machine, i'm using a H755ZI nucleo boardThe problem seems to be releated to Rx heap size, but I'm lost

Hello,I am working with STM32H745 (dual core Cortex-M7 and Cortex-M4) and I am trying to understand the correct and supported way to stop and then restart the M4 core from the M7 core using software only, without resetting the whole chip.My goal is to implement a core-local watchdog mechanism where the M7 core keeps running and supervises the M4 core. If the M4 gets stuck or stops responding, the M7 should be able to stop or reset the M4 and then start it again cleanly.I have read the reference manual and found the following:SYSRESETREQ via AIRCR triggers a full system reset, so it is not suitable for this use case.Disabling RCC clocks does not actually stop the Cortex-M4 core execution.HAL_PWREx_ReleaseCore(PWR_CORE_CPU2) only releases CPU2 from the HOLD state and does not reset or stop a running M4 core.I found the MP_GRSTCSETR register and the M4 reset bit mentioned in some discussions, but the CMSIS and HAL naming is confusing and it is not fully clear whether this is the recommend

Hello, everyone on the forum. I am using ThreadX and FileX to write files to an SD card on the STMH735G-DK. I successfully created a directory using fx_directory_create and created a file using fx_file_create. This time, we'll tackle directory deletion using fx_directory_delete. However, if the directory contains files, deletion will fail with error code FX_DIR_NOT_EMPTY. How can I search for filenames within a directory using FileX? If anyone knows anything, please give me some advice.

Post edited by ST moderator to be inline with the community rules for the code sharing. In next time please use </> button to paste your code and a linker script content. Please read this post: How to insert source code. Hello, I ran into a very strange problem with a STM32H743 that I don't understand. I have the following config sequence: MX_ADC1_Init() -> generated by CubeMX MX_ADC2_Int() -> generated by CubeMX HAL_ADCEx_Calibration_Start(&hadc1, ADC_CALIB_OFFSET_LINEARITY, ADC_SINGLE_ENDED) HAL_ADCEx_Calibration_Start(&hadc2, ADC_CALIB_OFFSET_LINEARITY, ADC_SINGLE_ENDED) The MX_ADC1_Init() contains the following generated code: multimode.Mode = ADC_DUALMODE_REGSIMULT; multimode.DualModeData = ADC_DUALMODEDATAFORMAT_DISABLED; multimode.TwoSamplingDelay = ADC_TWOSAMPLINGDELAY_1CYCLE; if (HAL_ADCEx_MultiModeConfigChannel(&hadc1, &multimode) != HAL_OK) { Error_Handler(); } This worked without a problem on all my boards so far and I was able

Hello guys,for my bachelors project I have decided to build an embedded signal monitoring and classification tool, based on the STM32H7S3L8 Nucleo dev board (NUCLEO H7S3L8). I want to use all  14 available channels of the 2 adcs (technically each ADC has 14, but then pin assignments are shared, which is not beneficial) and i want to let the ADCs stream the data via HPDMA in the SDRAM. Unfortioutly I came across many problems with the configuration and programming, especially with clock configuration of the ADC+DMA in the scanning mode. Do some of you already have a working solution to the DMA placement in SDRAM (0x300000 32kB I believe) and with working ADCs you would like to share. Also, do you enable callbacks in that case?Usually I would share my config and code and ask for help to the specific problem, but as I am not at home and already lost my mind with this ******* DMA I might try it that way.Thanks so much and happy holidays !

this topic is rare，and i cant find a system learning information，can st develeper friends tell us how to use this peripherals, link to ADC DMA......

Hello everybody.I bought Riverdi STM32 Embedded Display RVT121HVSNWC00-BI create my first project using touch GFX.I generate code and import it in STM32CubeIDE.I format FAT32 a 128G uSD using custom program.I plug the uSD into adapter and I write this code.fresult is FS_NOT_READY and I don't understand the reason.  Here my configuration.  I notice in the main that there is FATFS initializationbut I don't find a call to MX_SDMMC1_SD_Init.If I force this call after FATFS initlization the code run in ErrorHandler, but if I inpect hsd1.SdCard struct I see that card property are read correctly (I believe).BlockSize x BlockNbr = 128G !! OK Can someone help me ?Thanks in advice

Question moved from this KB. Thank you! It works perfect! While we're on the subject, are there any examples of OpenAmp where both cores enable RTOS? I've been racking my brain for days trying to get them to communicate.

I am trying to initialise SDRAM on STM32H757I-EVAL.I created a new demo project in STM32CubeIDE using the specified evaluation board. I disabled the other memory peripherals like MMC, etc. It calls MX_FMC_Init() but after that, when looking at memory at 0xD0000000 I only get ????? and accessing it gives hardfault.In this support post it is suggested that the commands must still be sent to controller while in this one it is suggested that BSP_SDRAM_Initialization_Sequence() is called. The latter function is not available in my BSP.How can I create a simple application to initialise the SDRAM?

Hi all, I am working on an STM32H755 project using external QSPI NOR Flash.I intend to use the QSPI Flash in two different ways: 1. Memory-mapped mode for read-only resources (UI assets, fonts, images, etc.)2. Indirect mode for file system operations (writing dynamic parameters) RTOS: RT-Thread (preemptive, priority-based scheduler) My current design is as follows: - All dynamic parameters are read from QSPI Flash at boot and cached in RAM.- During runtime, all parameter access is done from RAM only.- QSPI indirect access (erase/write) is performed only by a dedicated file system thread.- When a write is needed:- The file system thread enters a critical section- QSPI memory-mapped mode is disabled- Flash write/erase is performed in indirect mode- Memory-mapped mode is re-enabled- The thread then exits the critical section and yields CPU The idea is to prevent context switches while memory-mapped mode is disabled, so that no other thread can access QSPI via memory-mapped addresses durin

I am reporting a compilation error that occurs when using the STM32F1xx Standard Peripheral Library (SPL) in Keil MDK v6 (specifically using the RTE pack downloaded via Arm Keil Studio for VS Code). This issue is caused by a naming mismatch in the NVIC structure between the legacy SPL and the latest CMSIS core headers.In the latest CMSIS core headers, the Interrupt Priority Register in the NVIC structure is defined as IPR. However, the misc.c file in the Standard Peripheral Library still refers to it as IP.Error Message: ~/.cache/arm/packs/Keil/STM32F1xx_DFP/2.4.1/Device/StdPeriph_Driver/src/misc.c:131:11: error: no member named 'IP' in 'NVIC_Type'Technical Details & Suggested Fix: The bug is located in the STM32F1xx_DFP/2.4.1/Device/StdPeriph_Driver/src/misc.c file, specifically around line 131 within the NVIC_Init function.To ensure out-of-the-box compatibility for MDK v6 users, I propose updating the current code:NVIC->IP[NVIC_InitStruct->NVIC_IRQChannel] = tmppriority;to

Hi,I am experiencing a core freeze issue on STM32H7S3L8 MCU, as described below.UPDATE 1: Most probably Data Cache is the main culprit, closing Data Cache in bootloader solves the problem. Application code Enables Data Cache and we have never observed any freeze errors in application code. Relocating the HASH code changes the behaviour but same error observed for both HW and SW Hash functions so Hash is probably irrelevant! (see the comment section.)In the bootloader, I compute a HASH over the application image stored in external XSPI flash (memory-mapped XIP). After this process, "we believe", the core occasionally freezes and becomes inaccessible through the debug probe.In the first scenario bootloader firmware remains unchanged; only the application binary varies. The freeze depends on the application binary. Some application images consistently trigger the issue on every power cycle, while others run without problems.In the second scenario when using an application image that trigg

I'm trying to ping my NUCLEO-H723ZG board and I've failed with every attempt over many hours; Nucleo board is connected to my MacBook over USB + ethernet cable with an ethernet adapter I'm using STM32CubeMX with VSC extension (this setup works, I am able to program the board and debug it)   My goal: Ping the STM32 over ethernet  Results: Request timeout for icmp_seq 301 ping: sendto: Host is down Or it will hardfault   Code: /* USER CODE BEGIN PV */ extern struct netif gnetif; /* USER CODE END PV */ ... /* Infinite loop */ /* USER CODE BEGIN WHILE */ while (1) { /* USER CODE END WHILE */ /* USER CODE BEGIN 3 */ ethernetif_input(&gnetif); sys_check_timeouts(); } /* USER CODE END 3 */ Config: These config files are based from .ioc files from this thread: https://community.st.com/t5/stm32-mcus-embedded-software/h723-ethernet-lwip-ping-problem/m-p/758419#M58561  (No help from linked topic helped here) I've also tried this tutorial with the same

Hello.   I have developed a firmware using FREEROTS and FatFS.   I have setted FREERTOS with : - one thread (osPriorityNormal, 24) that perform massive read on uSD file (100MByte) to search a string (the search takes at least 40secs) - a software timer (priority 2) that, in a certain moment, write a string in certain position in another file.   What I observe is that that FatFS f_lseek API called in software timer returns FS_TIMEOUT when the thread is performing massive read.   I'm tempted to augment FS_TIMEOUT to 100 secs or augment software timer priority to a number greather than 24 (osPriorityNormal) but have you another suggestion ? Is it the right way ?   Thankyou in advance.

Hello,I need the TCP Server with static IP address. I chose the Nx_TCP_Echo_Echo_Server example and NUCLEO-H723ZG board as a starting point. I use the STM32CubeIDE 1.19 with latest x-cube-azrtos-h7-v3-4-0 sample files. So I imported the Nx_TCP_Echo_Echo_Server example project and compiled it without problems. But after that I disabled DHCP and set the static IP address:After that project can't be build and it is necessary to edit app_netxduo.c file as in it still there are some code related to DHCP. But even after successful compilation I can't connect to the server from the client. Also I can't ping it too. It seems that this is a global problem with NetXDuo as there are plenty of posts with similar problems. E.g.:https://community.st.com/t5/stm32-mcus-embedded-software/stm32h563-netxduo-tcp-echo-server-only-working-in-debug-mode/m-p/663727 https://community.st.com/t5/stm32-mcus-embedded-software/netxduo-not-working-with-a-static-ip-addresss/td-

Hi! I have ran into an issue with the HAL that I have yet to find a decent solution to. This issue has been discussed multiple times in different contexts on the forum, and I though I would write a post to gather some of the discussions/proposed solutionsI have labeled this post with the STM32H5 Series as that’s what I’m working on right now, but I believe this might apply to most/all of the STM32 Series.The issue relates to callbacks in the peripheral drivers of the HAL. Take for example an SPI transaction that I want to initiate on an instance, and where I want the MCU to be notified by an ISR when the transaction is completed. The callback has a type signature of void (* TxRxCpltCallback)(struct __SPI_HandleTypeDef *hspi);in the case of a registered callback or simplyvoid HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi);when the callback is overwritten from user code. In the callback I can easily identify which SPI instance triggered the interrupt and act accordingly. However, an i

Hello everyone,I'm writting today because I have some questions about the memory assignment of the flash on dual core devices such as stm32h745 mcu.I'm trying to assign a direction for the boot program, imagine 20k from "0x08000000". Afterwards I wan to assign 1.5mb for the cm7 and the rest for the cm4.As I understand, by default the flash is separated in 2 banks, first bank for the cm7 and second one for the cm4.I wanted to know if it was possible to use the first bank and half of the second for the cm7, and the rest for the cm4.If so, how I should proceed to achieve that? Because I managed to set the beginning of cm4 on another memory direction by setting the FLASH_BANK2_BASE define, but I don't feel like this is the best approach.Any ideas would be greatly appreciated.Best regards,RPC    

Hello,  I'm Emily and I'm fairly new at using NUCLEO devices and ToF sensor. I would like to ask if a board NUCLEO-F401RE could only run one .bin file or could it run two .bin file? I'm currently trying out STSW-IMG035 but would like to have Gesture and Hand Posture running on one program instead of two.  Also, I would also like two know if it is possible to have gesture and hand posture to run in one program as well. Any help is appreciated!  Thank you!   Emily 

Hi all, I've recently been working on a Nucleo H723ZG with a working implementation that allows for ADC reading over DMA. I've got a Timer event that triggers it at 20kHz and it was reading and processing multiple ADCs. I've shifted to using a custom developed board with a surface mounted STMH733VGT6. I've configured the ADCs and timers to what I believe is the exact same as before. I have verified that there is nothing wrong with the ADC circuitry by initially setting them up using poll for conversion, I was able to get valuable data out of the board doing this.When I went to setup the ADCs to use DMA however I started to have issues, I believe that theHAL_ADC_ConvCpltCallback isn't being called but I am not sure why, I set a break point in there which is never reached. Below I have copied in my TIM1 init function as well as my ADC1 init function in hopes that it may help someone assist me with my issue.  Really appreciate you taking the time to read this and assis

Hi everyone, I'm using the NUCLEO-H7S3L8 to try to comunicate with a BOS1921 device using the I3C protocol. To get practice i'm trying to read form the Register Map in 6.10 (see the datasheet). Using some example codes from this link  https://www.st.com/resource/en/application_note/an5879-introduction-to-i3c-for-stm32h5-series-mcu-stmicroelectronics.pdf and this https://wiki.st.com/stm32mcu/wiki/Getting_started_with_I3C   . from the example code that i made i try to give the bos1921 a adres, after that i try to read from the Register 0x02 and expect a value of 0x046A in return. but everytime it looks like it's the value from register 0x1E, that is the CHIP_ID. Even trying to read other registers i get the same result.Any idea what I'm doing wrong trying to read? Buffers i made:I3C_XferTypeDef aContextBuffers[2]; /* Buffer used for transmission */ uint8_t aTxBuffer[2]; uint8_t aRxBuffer[2]; uint8_t readAdre

Get early access to the next-generation STM32Cube HAL drivers for STM32U5A major update to STM32Cube HAL drivers, called HAL2, is now available for preview on GitHub. It supports the STM32U5 series. Building on over 10 years of experience, HAL2 delivers the following: More optimized drivers with a smaller footprint and improved performance Enhanced portability across STM32 devices to reduce development time A more intuitive API for easier and faster application development To support this update, examples have been revamped for better reusability and understanding, and a new online documentation portal is introduced for enhanced content and easier navigation.Try it now: Explore the preview on GitHub: STM32CubeU5-V2-Preview. Test the new features and share your feedback via GitHub Issues. Your input is essential for the final release. Join the conversation and share your thoughts in the comments.

Hi. Unfortunately, after several days of struggling with USBX, I'm forced to ask for your help. I'm using custom boards with the STM32h503RB and STM32h563VI. I tested the old library according to forum guides – no response when connected to a PC. The closest I've gotten is following the guide for USBX C0. Windows recognizes the CDC device and assigns a COM port, but there's no response when attempting to open the port.USBX standalone,interrupt enabled, Clock 48MHz, CRS enabled, mempoll size 8*1024, stack size 6*1024https://www.youtube.com/watch?v=43gcc2dGnxQ int main(void) { /* USER CODE BEGIN 1 */ /* USER CODE END 1 */ /* MCU Configuration--------------------------------------------------------*/ /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ HAL_Init(); /* USER CODE BEGIN Init */ /* USER CODE END Init */ /* Configure the system clock */ SystemClock_Config(); /* USER CODE BEGIN SysInit */ /* USER CODE END SysInit */ /* Initi