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Hi,I am using the X-NUCLEO-NFC04A1 and I am trying to write multiple types NDEFs but only the latest one is read by my phone. Is there any way that I can write some NDEF records? Thank you very much, Best regards, Duy

Is have support this chip in flashloader?

I implement a SPI slave protocol on a STM32F0 board.After the master as transferred a command to the slave, it polls in regular intervals by reading one byte off the slave until the slave sends a start byte of value 0xFF.in the attached screenshot, the bottom channel is pulled low immediately before the call to HAL_SPI_Transmit_DMA (flag A1). Shortly thereafter (20us) the master pulls the CSS line low and transfers one byte. However, it appears the shift register is overwritten during the transfer, leading to corrupt data (value 0x7F instead of 0xFF) transmitted.It would appear that the DMA transfer to the SPI peripheral does not take the BUSY flag into account.Is there a fix a or a workaroung for this issue that ensures data integrity? Since the slave has no control over when the master initiates a transfer, how can I ensure this kind of error does not occur?

I can't find an svd file for the STM32F415 https://www.st.com/resource/en/svd/stm32f4_svd.zip does not contain a svd file for the STM32F415 series is one of the contained ones 100% compatible?  STM32F401.svd*  STM32F405.svd*  STM32F407.svd*  STM32F410.svd*  STM32F411.svd*  STM32F412.svd*  STM32F413.svd*  STM32F427.svd*  STM32F429.svd*  STM32F446.svd*  STM32F469.svd*

Hello,I am trying to debug STM32F072 chip using ST-LINK on mb1076 Discovery board. STM32F072 is on custom board. It is powered from 3.3V except Vddio2 pin which is powered from 1.8V. I am able to program chip but when I try to debug it I get output Remote debugging using 127.0.0.1:20090x1fffcc28 in ?? ()tbreak mainTemporary breakpoint 1 at 0x8001e06: file C:\...\main.c, line 117.continueContinuing. in console instead of proper one:Remote debugging using 127.0.0.1:2009Reset_Handler () at C:\...\startup_stm32f0xx.s:7474    movs r1, #0tbreak mainTemporary breakpoint 1 at 0x8001e06: file C:\...\main.c, line 117.continueContinuing.Temporary breakpoint 1, main () at C:\...\main.c:117117      StateFunc stan = Device_PoweringOn;As for mb1076 board I moved resistor R26 to place R15 to check if lower voltage on AIN1 will change anything. It did not help.Do you have any ideas?

I am trying to calculate the matching network for my project. In the Antenna Matching document it is mentioned that the incoming signals at RFI pins must be limited to 2.5Vpp. So my question is how to design this voltage divider network? Tool gives me 10pF and 150pF values, but how can I confirm this? It would be very helpful if someone can post a detailed answer about the voltage divider network.Also, the matching network I calculated comes out to be 210pF and 41pF whereas the tool gives me 199pF and 41pF. Is this tolerance acceptable?Thanks in advance!!!!!!!! :)

Greetings, I'm using an STM32L496. I have a peripheral connected to PE11, which I have configured as an interrupt on the rising edge. I have another circuit connected to PA11, which is normally an input. So far no problem. In order to do a self test, I briefly configure PA11 to a rising interrupt as well, then when the test is over I switch it back to an input. This has the side effect of also disabling the interrupt on PE11. I have to explicitly reconfigure the GPIO settings for PE11 to get the interrupt working again. It seems like there is an issue in the HAL driver that is failing to handle the GPIO port correctly. Has anyone seen this behavior?Ricardo

Hi.I wonder if it is possible to disable the I2c interface via CTRL REG2?in 7.7 in the datasheet it seems to be possible, but specification for bit 3 seems strange:[3] I²C enable (0: I2C enable;1: SPI disable)Is above this correct in the datasheet? it shouldn't be:[3] I²C enable (0: I2C enable;1: I2C disable) ?https://www.st.com/resource/en/datasheet/dm00066332.pdf(I know CS-signal is used to use SPI/I2c, but I want to know if it is possible to completely disable the I2c-part)For LSP25HB it looks different in the datasheet for this bit....Best RegardsFredrik

im using STM32F030R8T6 (nucleo F030R8 board)i tried to enable SPI2 peripheral clock, but i cant find any line in stm32f0xx_hal_rcc.h to enable spi2 clock,but there is macro for SPI1__HAL_RCC_SPI1_CLK_ENABLE()only few marcos for RCC_APB1ENR present in stm32f0xx_hal_rcc.h is there any reason for this.or iam i missed any configuration for stm32f030R8firmware: STM32Cube_FW_F0_V1.9.0

Hello all,I followed the reference manual to determine VDDA for STM32L476VET6, using the VREFINT measured value together with the calibration value using following code: if (HAL_ADC_PollForConversion(&hadc1,100) == HAL_OK) {ADC_measure_VREF = HAL_ADC_GetValue(&hadc1); ADC_cal_value = (*VREFINT_CAL_ADDR);VREF_VOLTAGE = 3000*ADC_cal_value/ADC_measure_VREF;sprintf(str1,"VREF_CAL: %u\r\n",(unsigned int)ADC_cal_value); sprintf(str2,"VREF_MEAS: %u\r\n",(unsigned int)ADC_measure_VREF); sprintf(str3,"VDDA: %umV\r\n",(unsigned int)VREF_VOLTAGE);HAL_UART_Transmit(&huart2, (uint8_t *)str1, 16, 100); HAL_UART_Transmit(&huart2, (uint8_t *)str2, 17, 100); HAL_UART_Transmit(&huart2, (uint8_t *)str3, 16, 100); }As result I get 3425mV - which is impossible...VREFINT_CAL is 1658, that seems right. VREFINT_DATA (measured ADC value) is 1425. This value also doesn't change with time. ADC clock is 32Mhz, Asynchronous clock mode with Prescaler 128 and I use 640.5 cycles conversion time. V

Hi,I am having issue reading ADC1_IN2/IN15. The value return from HAL_ADC_GetValue(0 is either 0 or close to 0. Others seems fine. I do use exactly same function to read. The results are list below as iSense last 2 value 0 0. Is there anything specific to those to channels?ThxPC1   ------> ADC1_IN2PB0   ------> ADC1_IN15 vSense 97 92 89 97 111 97 iSense 2357 2417 2312 2370 0 0void HAL_ADC_MspInit(ADC_HandleTypeDef* adcHandle) { GPIO_InitTypeDef GPIO_InitStruct; if(adcHandle->Instance==ADC1) { /* ADC1 clock enable */ HAL_RCC_ADC_CLK_ENABLED++; if(HAL_RCC_ADC_CLK_ENABLED==1){ __HAL_RCC_ADC_CLK_ENABLE(); }   /**ADC1 GPIO Configuration PC0 ------> ADC1_IN1 PC1 ------> ADC1_IN2 PC2 ------> ADC1_IN3 PC3 ------> ADC1_IN4 PC4 ------> ADC1_IN13 PA0 ------> ADC1_IN5 PA1 ------> ADC1_IN6 PA2 ------> ADC1_IN7 PA3 ------> ADC1_IN8 PA4 ------> ADC1

I am working with the STM32F760I-EVAL board and caching (SCB_EnableICache() and SCB_EnableDCache() are called) and MPU (MPU_Config() is called) are enabled. I am using DMA with SPI and if I transmit data, HAL_SPI_Transmit_DMA, I need to call SCB_CleanDCache() to see any MOSI-data on the oscilloscope. What if want to receive data using HAL_SPI_TransmitReceive_DMA, what function do I need to call and at what point? I tried calling SCB_InvalidateDCache() when my receive is finished, but I then got stuck in an infinite loop inside SCB_InvalidateDCache():  do {   ways = (uint32_t)(CCSIDR_WAYS(ccsidr));   do {    SCB->DCISW = (((sets << SCB_DCISW_SET_Pos) & SCB_DCISW_SET_Msk) |           ((ways << SCB_DCISW_WAY_Pos) & SCB_DCISW_WAY_Msk) );    #if defined ( __CC_ARM )     __schedule_barrier();  &nb

Posted on March 27, 2018 at 15:36The stm32l432 reference manual has the following cryptic remark about the boot sequence'A Flash empty check mechanism is implemented to force the boot from system Flash if the first Flash memory location is not programmed (0xFFFF FFFF) and if the boot selection was configured to boot from the main Flash.'But does not specify when this check occurs.  I've found the following anomaly that may relate to this.  1) Start with an erased device2) Program the part3) Without power cycling, resetIn this case, the part will jump to the system boot loader.  However, the mysterious thing is that  SYSCFG->MEMRMP is 0 (indicating that the memory is not remapped).   I don't see how it is possible to boot to the programmed code without a power cycle -- even through the SWD interface, because it appears that the 'Flash empty check' is persistent.   What am I missing ?    I know how to use the SWD interface to acc

Hello,The eDesign Suite doesn't provide any information except of the inductance. How to check if it is enough or not?

Posted on April 20, 2018 at 16:16Hello Experts,Recently I bought the STEVAL-WESU1 board and able to read the sensor data using android application.My requirement is to connect this wearable platform to other ARM board (raspberry pi board), raspberry pi should be able to read the data from wearable platform via BLE.Is it possible ? can you please provide us some code to do that ?Thanks for the help.Please let me know if need any information.#wearable #bluestsdk

STM32F767 project, converted from 4.25.0 to 4.26.1, now it has an error in the ADC1, 2, and 3 configuration where the Scan Conversion Mode is set to Enabled. This value is apparently bogus and I must pick a new value from the drop down list that only contains the value Enabled.Oooohhhh kaaaaay???I guess my testing is done for now.Andrei from The Great White North

Hi,I'm realy new to this and I'm using NUCLEO-L4R5ZI with Ac6 System Workbench for STM32. I've found the board and initialized all peripherals with their default settings inside STM32CubeMX. Then I've generated the code for System Workbench and imported it inside.Inside the main while loop I've written just two lines of code for toggling the LED which I assume are correct.while (1) {   /* USER CODE END WHILE */   /* USER CODE BEGIN 3 */ HAL_GPIO_TogglePin(GPIOB, GPIO_PIN_7); HAL_Delay(500);   } /* USER CODE END 3 */I try to flash the file nothing happens (not blinking on any of the User LEDs). Project builds itself without any errors. Only error I get is while flashing, but its finishes successfully. Below is the whole log from programing.Another thing is when I try to program my board with default example everything works just fine and the log is still the same (even with that error).Any help would be appreciated!

Posted on May 19, 2018 at 22:56Hello,I am currently using the OctoSPI RAM on the STM32L4R9I-EVAL board (IS66WVH8M8BLL-100BLI (Hyperram)).At first sight everything looks as expected, but when I read and than write with 8 bit access, only every second write is successful.I changed the code of the OSPI_RAM_MemoryMapped as follows to show the problem:while (1)  {    BSP_LED_On(LED_GREEN);    /* Writing Sequence ----------------------------------------------- */    mem_addr = (__IO uint8_t *)(OCTOSPI1_BASE);    for (index = 0; index < 1024; index++)    {      *mem_addr = (index & 0xff);      mem_addr++;    }        /* Reading Sequence ---------------------------------------------- */    mem_addr = (__IO uint8_t *)(OCTOSPI1_BASE);    for (index = 0; index < 1024; index++) &n

I have 10uF (=10uF+100nF)ceramic capacitors for VCAPs in a custom board. Voltage there is 2.7V. Supply voltage is 3.3VI have problems getting the STlink to accept the board. First I managed to erase the chip, now STLink does not even recognise the chip. A dead CPU already?Are 2.2uFs really needed, I try keep number of stored values here as small as possible.

hello I am using the STM32F779NXH MCU it has an internal 1.2V voltage regulator that I believe should output volt on the CAP_1 and CAP_2 pins. The MCU will not boot, and will not be recognized by the st-link. This is a brand new board and has never been programmed. I have connected the BYPASS_REG pin directly to GND as stated in the data sheet https://www.st.com/resource/en/datasheet/stm32f777bi.pdf. ( page 33 I believe). I am wondering if there is anything else I should look for as to why there is no voltage on the CAP_1 and CAP_2 pins. RESET is held high through a 10K resistor to 3.3V, but the data-sheet doesn't mention that the voltage regulator is dependent on RESET.Also 3.3V is present and correct. Attached is an image of the MCU page of the Schematic.

I wrote a simple program for the nucleo board. reconnecting the USB erases my program.How can this be prevented. Did not find any hint so far.

Posted on June 15, 2017 at 10:16Hello, we made custom reader board with CR95HF. This reader is interfaces with IMX6 CPU running linux. Communication with reader via SPI bus.I tried to read DOC9303 biometric passport. I can read it on default speed 106 kbit/sec without problem, now i'm trying to set double speed 212 kbit/sec i have problems with communication after ISO14443A-4 activation. There is no any answer after PPS responce.Looks like the problem with some of wait time constant or similar other setting for Analog registers.Is there any hints or set of such constants for different data baud rates?WBR#cr95hf #iso14443a

Hi guys, I use uart idle interrupt to handle BLE passthrough, but because ble module don't buffer data received from ble,if the baudrate is 115200bps, there will be some gaps within one packet(it should be uart transfer rate is higher than ble rate), for example there will be 8 gaps within one 14 bytes packets. Our host will have more high priority task to do, so I can't accept so many interrupts to handle one packet. So any method to increase uart idle detection time. If I don't use uart idle interrupt, I will have to  align the packet size to a multiple of a fixed size.this is not what I want, though this works.

Posted on January 19, 2018 at 18:53Hello, I am modifying the code of an STM8S003 that already works.But the code stopped working, even though I have not made any changes yet.The STVD displays the following error message:#error clnk Debug\ajk_strobo_lps_st.lkf:1 @svlreg missing for function f_EXTI_PORTA_IRQHandlerThis code already worked and I can not find any errors, can anyone help me?

Hi, In last (and former) STM32H7 series CMSIS headers, there is some miss-spelling in SYSCFG which is replaced by SYCFG (-s).Regards,Julien FAUCHER.PS :Here is the output of a grep command : stm32h743xx.h:18316:#define SYCFG_PMCR_EPIS_SEL_Pos (21U) stm32h743xx.h:18317:#define SYCFG_PMCR_EPIS_SEL_Msk (0x7U << SYCFG_PMCR_EPIS_SEL_Pos) /*!< 0x00E00000 */ stm32h743xx.h:18318:#define SYCFG_PMCR_EPIS_SEL SYCFG_PMCR_EPIS_SEL_Msk /*!< Ethernet PHY Interface Selection */ stm32h743xx.h:18319:#define SYCFG_PMCR_EPIS_SEL_0 (0x1U << SYCFG_PMCR_EPIS_SEL_Pos) /*!< 0x00200000 */ stm32h743xx.h:18320:#define SYCFG_PMCR_EPIS_SEL_1 (0x2U << SYCFG_PMCR_EPIS_SEL_Pos) /*!< 0x00400000 */ stm32h750xx.h:18578:#define SYCFG_PMCR_EPIS_SEL_Pos (21U) stm32h750xx.h:18579:#define SYCFG_PMCR_EPIS_SEL_Msk (0x7U << SYCFG_PMCR_EPIS_SEL_Pos) /*!< 0x00E00000 */ stm32h750xx.h:18580:#define SYCFG_PMCR_EPIS_SEL SYCFG_PMCR_EPIS_SEL_Msk /*!< Ethernet PHY Interface Selection */ stm32h7