N6 HPDMA Issues

[rphii]

Hi everyone

I am trying to get the DMA working, without success. (Some of this code is from https://community.st.com/t5/stm32-mcus-products/stm32n6-hpdma-not-copying-data/td-p/758276)

I am trying to do some different things with the HPDMA, without success:

1. Memory to memory, within AXISRAM2 (cpu domain)
2. Memory to memory, AXISRAM2 (cpu domain) --> AXISRAM5 (npu domain)
3. Memory to memory, AXISRAM3 (npu domain) --> AXISRAM5 (npu domain)

See the three different cases below...

CASE 1 - within AXISRAM2 (cpu)

static uint32_t *src;
static uint32_t *dst;

void TransferBeginHPDMA(DMA_HandleTypeDef *hdma) {
  uint32_t src2values[10] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10};
  src=malloc(sizeof(uint32_t) * 10); // uses AXISRAM2
  memcpy(src, src2values, sizeof(uint32_t) * 10);
  dst = malloc(sizeof(uint32_t) * 10);
  memset(dst, 0, sizeof(uint32_t) * 10);
  HAL_DMA_Start_IT(hdma, (uint32_t)(uintptr_t)src, (uint32_t)(uintptr_t)dst, sizeof(uint32_t) * 10);
  // --> next in TransferCompleteHPDMA but debugger says dst is all zeroes
}

CASE 2 - AXISRAM2 --> AXISRAM5 (cpu --> npu)

static uint32_t *src;
static uint32_t dst = 0x342E0000;

void TransferBeginHPDMA(DMA_HandleTypeDef *hdma) {
  uint32_t src2values[10] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10};
  src=malloc(sizeof(uint32_t) * 10); // uses AXISRAM2
  memcpy(src, src2values, sizeof(uint32_t) * 10);
  memset(dst, 0, sizeof(uint32_t) * 10);
  HAL_DMA_Start_IT(hdma, (uint32_t)(uintptr_t)src, (uint32_t)(uintptr_t)dst, sizeof(uint32_t) * 10);
  // --> Target is not responding, retrying...
}

CASE 3 - AXISRAM3 --> AXISRAM5 (npu --> npu)

edit: I think this case doesn't make sense, since it is connected via DMA3 to the CPU (?) - so can I just memcpy?

static uint32_t src=0x34200000;
static uint32_t dst = 0x342E0000;

void TransferBeginHPDMA(DMA_HandleTypeDef *hdma) {
  uint32_t src2values[10] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10};
  memcpy(src, src2values, sizeof(uint32_t) * 10);
  memset(dst, 0, sizeof(uint32_t) * 10);
  HAL_DMA_Start_IT(hdma, (uint32_t)(uintptr_t)src, (uint32_t)(uintptr_t)dst, sizeof(uint32_t) * 10);
  // --> next in TransferErrorHPDMA with error 4 (HAL_DMA_ERROR_USE)
}

If anyone can help me, it'd be greatly appreciated, thanks.

P.S. All of the other related code:

///////////////////////////////////////////////////////////////////////////////////////////////////
// hpdma
///////////////////////////////////////////////////////////////////////////////////////////////////

/**
  * @brief HPDMA1 Initialization Function
  * @PAram None
  * @retval None
  */
static void MX_HPDMA1_Init(void)
{

  /* USER CODE BEGIN HPDMA1_Init 0 */

  /* USER CODE END HPDMA1_Init 0 */

  DMA_IsolationConfigTypeDef IsolationConfiginput = {0};

  /* Peripheral clock enable */
  __HAL_RCC_HPDMA1_CLK_ENABLE();

  /* HPDMA1 interrupt Init */
    HAL_NVIC_SetPriority(HPDMA1_Channel2_IRQn, 0, 0);
    HAL_NVIC_EnableIRQ(HPDMA1_Channel2_IRQn);

  /* USER CODE BEGIN HPDMA1_Init 1 */

  /* USER CODE END HPDMA1_Init 1 */
  handle_HPDMA1_Channel2.Instance = HPDMA1_Channel2;
  handle_HPDMA1_Channel2.Init.Request = DMA_REQUEST_SW;
  handle_HPDMA1_Channel2.Init.BlkHWRequest = DMA_BREQ_SINGLE_BURST;
  handle_HPDMA1_Channel2.Init.Direction = DMA_MEMORY_TO_MEMORY;
  handle_HPDMA1_Channel2.Init.SrcInc = DMA_SINC_INCREMENTED;
  handle_HPDMA1_Channel2.Init.DestInc = DMA_DINC_INCREMENTED;
  handle_HPDMA1_Channel2.Init.SrcDataWidth = DMA_SRC_DATAWIDTH_HALFWORD;
  handle_HPDMA1_Channel2.Init.DestDataWidth = DMA_DEST_DATAWIDTH_HALFWORD;
  handle_HPDMA1_Channel2.Init.Priority = DMA_LOW_PRIORITY_HIGH_WEIGHT;
  handle_HPDMA1_Channel2.Init.SrcBurstLength = 1;
  handle_HPDMA1_Channel2.Init.DestBurstLength = 1;
  handle_HPDMA1_Channel2.Init.TransferAllocatedPort = DMA_SRC_ALLOCATED_PORT0|DMA_DEST_ALLOCATED_PORT0;
  handle_HPDMA1_Channel2.Init.TransferEventMode = DMA_TCEM_BLOCK_TRANSFER;
  handle_HPDMA1_Channel2.Init.Mode = DMA_NORMAL;
  if (HAL_DMA_Init(&handle_HPDMA1_Channel2) != HAL_OK)
  {
    Error_Handler();
  }
  IsolationConfiginput.CidFiltering = DMA_ISOLATION_OFF;
  IsolationConfiginput.StaticCid = DMA_CHANNEL_STATIC_CID_0;

  if (HAL_DMA_SetIsolationAttributes(&handle_HPDMA1_Channel2, &IsolationConfiginput) != HAL_OK)
  {
    Error_Handler();
  }
  /* USER CODE BEGIN HPDMA1_Init 2 */

  //handle_HPDMA1_Channel2.XferCpltCallback = DMA_TransferComplete_Callback;

  /* USER CODE END HPDMA1_Init 2 */

}





///////////////////////////////////////////////////////////////////////////////////////////////////
// axisram
///////////////////////////////////////////////////////////////////////////////////////////////////

#define ARRAY_LEN(x)   (sizeof((x))/sizeof(*(x)))

  /* AXISRAM{1,2} => CPU domain
   * AXISRAM{3..} => NPU domain */
  RAMCFG_TypeDef *axisrams[] = {
      RAMCFG_SRAM1_AXI,
      RAMCFG_SRAM2_AXI,
      RAMCFG_SRAM3_AXI,
      RAMCFG_SRAM4_AXI,
      RAMCFG_SRAM5_AXI,
  };
  for(size_t i = 0; i < ARRAY_LEN(axisrams); ++i) {
    hramcfg.Instance = axisrams[i];
    HAL_RAMCFG_EnableAXISRAM(&hramcfg);
  }

///////////////////////////////////////////////////////////////////////////////////////////////////
// risaf
///////////////////////////////////////////////////////////////////////////////////////////////////

  /* RISAF1 => CTM
   * RISAF2 => AXISRAM1
   * RISAF3 => AXISRAM2
   *    (each has 15 REGs) */
  for(size_t i = 0; i < 15; ++i) {
    RISAF1->REG[i].CFGR = 0x00000000;
    RISAF1->REG[i].CIDCFGR = 0x00FF00FF; /* RW for everyone */
    RISAF1->REG[i].ENDR = 0xFFFFFFFF; /* all-encompassing */
    RISAF1->REG[i].CFGR = 0x00000001; /* enabled, non-secure, unprivileged*/
    RISAF2->REG[i].CFGR = 0x00000000;
    RISAF2->REG[i].CIDCFGR = 0x00FF00FF; /* RW for everyone */
    RISAF2->REG[i].ENDR = 0xFFFFFFFF; /* all-encompassing */
    RISAF2->REG[i].CFGR = 0x00000001; /* enabled, non-secure, unprivileged*/
    RISAF3->REG[i].CFGR = 0x00000000;
    RISAF3->REG[i].CIDCFGR = 0x00FF00FF; /* RW for everyone */
    RISAF3->REG[i].ENDR = 0xFFFFFFFF; /* all-encompassing */
    RISAF3->REG[i].CFGR = 0x00000001; /* enabled, non-secure, unprivileged*/
  }



///////////////////////////////////////////////////////////////////////////////////////////////////
// dma callback registration
///////////////////////////////////////////////////////////////////////////////////////////////////

  HAL_DMA_RegisterCallback(&handle_HPDMA1_Channel2, HAL_DMA_XFER_CPLT_CB_ID, TransferCompleteHPDMA);
  HAL_DMA_RegisterCallback(&handle_HPDMA1_Channel2, HAL_DMA_XFER_ERROR_CB_ID, TransferErrorHPDMA);


///////////////////////////////////////////////////////////////////////////////////////////////////
// dma callbacks
///////////////////////////////////////////////////////////////////////////////////////////////////


void TransferCompleteHPDMA(DMA_HandleTypeDef *hdma) {
  __NOP();
}

void TransferErrorHPDMA(DMA_HandleTypeDef *hdma) {

  uint32_t err = HAL_DMA_GetError(&hdma);
  // 4 = HAL_DMA_ERROR_USE
}