STM32 MPUs Products and hardware related

The processor in this application is an STM32MP153. I'm using a Cypress FX3 emulating SRAM so I can use a read path of FMC->MDMA->AXI memory-to-memory and vice versa for the write path. Two independent hardware interrupts on the STM32 GPIOs initiate the relevant transfers (MDMA initiation is via software only).My question relates to the variable data size inherent in the FX3 state machine. What is the advisable method to accommodate this in the STM32MP153?a) set up multiple stream definitions for the MDMA and use extra GPIOs to semaphore the buffer sizes between the processors?b) keep block transfers consistent and have the CPU analyse the result and then drop in a circular link list buffer for isochronous data transfers? (I'm not yet clear on whether the A7 CPUs will have the time to set this up before the full bandwidth data consumption is demanded).c) neither of the above - there's an alternative referred/recommended approach.Note that:1) A0 is the only address pin used to sem

Hello,I would like to make the system below using stm32mp157.- System Description -1. 100Mbps Full-Duplex Ethernet2. Cortex-A7 receives and transmits data from Ethernet on the PC. 3. Cortex-A7 calculates Ethernet data and sends the result to Cortex-M4.4. Cortex-M4 controls peripheral(SPI, I2C, UART, GPIO) using DMA and interrupt  Can I implement a program like the above??I've usually used F4 series or L4 series, so I don't know about MPU lines.If the program is implementable, please let me know what I need to know.If the program cannot be implemented, please recommend MCU or method that can be implemented. 

Kernel version：5.4.31Unable to get STM32 DDR PMU clockstm32-display 5a001000.display-controller: stm_drm_platform_probestm32-display 5a001000.display-controller: drv_load:-517debugfs: Directory 'cpu0' with parent 'opp' already present!remoteproc remoteproc0: releasing m4Unable to get STM32 DDR PMU clockstm32-mdma 58000000.dma: STM32 MDMA driver registeredstm32-dma 48000000.dma: STM32 DMA driver registeredstm32-dma 48001000.dma: STM32 DMA driver registeredreg11: supplied by vddreg18: supplied by vddusb33: supplied by regulator-dummystm32-display-dsi 5a000000.dsi: platform_set_drvdatapanel-ilitek-ili9881d 5a000000.dsi.0: cannot get reset GPIO: -517stm32-display 5a001000.display-controller: stm_drm_platform_probestm32-display 5a001000.display-controller: drv_load:-517stm_thermal 50028000.thermal: stm_thermal_probe: Driver initialized successfullydebugfs: Directory 'cpu0' with parent 'opp' already present!stm32-crc32 58009000.crc: Initializedstm32-hash 54002000.hash: will run requests pump

Running the code "MP13_BSP_BasicTemplates" in the DDR of the STM32MP135F-DK succeeds，But running the code "UART_Receive_Transmit_Console_A7" in the DDR of the STM32MP135F-DK fails（“USE_DDR” Macros added,Link text has been modified），Errors are as follows： 

Hi,I am using a STM32MP151AAA3 and i need to control an RGB LED via PWM control (something like the WS2812B). I was looking into the PWM driver options for Linux side control and can't find options for PWM control for specific buffer sizes or anything like that (only for fixed PWM outputs).On the bare metal MCU's i can control this via PWM and DMA and send a specified data buffer. does anyone know if there is a similar option for a Linux controller PWM driver?The other option is to control these LED's via the secondary M4 core but I rather not if possible.Kind regards,Richard

hello，my custom board use the same ddr as STM32MP135F-DK board. but when I debug the example DDR_Init_A7.erro occus when verify data in address 0xc0000000 + 0x80。as show in picture.pls help me

Hi!! I have STM31mp157C and I want to use the ADC. I am exploring the available GPIOs and have observed that some are present in both ADC1 and ADC2.For example, according to the datasheet, PA4 can be used with ADC1/ADC2.Is there any difference between measuring from ADC1 or ADC2?Is there any use for a GPIO to be in both ADC1 and ADC2 (such as performance improvement, special modes of operation or similar)? Thanks!A.

Dear community,I need your help.I'm using a ES8388 Codec on a custom board with STM32MP157 MPU. ES8388 codec connected on i2c1 and sai2. In the codec driver, ES8388 is in salve mode and MPU is in master mode. mclk cannot be obtained.​​device tree:​kernel source:boot log:

Hi there, I'm using a custom STM32MP153 board with OpenSTLinux distribution (5.15.24) on it, and  I have a problem with the Wake UP. I successfully set PWR gpio to wake up from low power modes. In fact, I can successfully wake from CSleep and CStop mode. But I can't execute a correct wake up from CStandy mode. (setting from M4 firmware is OK I think, I took the example code from FW1.6.0 repo) Is there any common pitfall that I must be awared of?  NOTE: I'm using STPMIC1 . Thanks

Hello everyone, I was attempting to migrate my existing raspberry pi application for GPIO control to the STM32MP157 but I encountered a roadblock. I was using gpiod to drive the pins from the userspace app but the following guide:https://wiki.stmicroelectronics.cn/stm32mpu/wiki/How_to_control_a_GPIO_in_userspacedoesn't mention gpiod C API at all in section 3. Is it possible to use gpiod instead of the character device? How do I add the gpiod library to the toolchain for cross compilation? Thanks,

I have a stm32mp135F-DK and I am attempting to do some GPIO control.  My question is where can I find the mapping of libgpiod chip/line mapping to physical pin.  I am particularly interested in the mapping to the CN8 pins as I will be wanting to read/write signals coming from external sources. I have looked at the toggle_led.sh script and see that LD7 (green LED, PA14) is mapped to gpiochip0 line 14.  One note is when I attempt to run this I get a Device/Resource is busy and when I run gpioinfogpiochip0 - 16 lines:line   0:      unnamed       unused   input  active-highline   1:      unnamed       kernel   input  active-high [used]line   2:      unnamed       kernel   input  active-high [used]line   3:      unnamed       kernel   input  active-high [used]line   4:      unnam

 I'm doing a project, that I need a rotary encoder working on cortex-a7 core of stm32mp157.I met problem, my rotary encoder can not work. This is what I have done:1. In kernel menuconfig I have config: use rotary encoder as a build-in module;2. Write dts, and I am sure these gpio not been use anywhere:    rotary@3 {        compatible = "rotary-encoder";        gpios = <&gpioa 0 GPIO_ACTIVE_LOW>, <&gpiog 3 GPIO_ACTIVE_LOW>;        linux,axis = <6>;         rotary-encoder,encoding = "gray";        rotary-encoder,relative-axis;         status = "okay";    }; In dmesg I can see my roary is startedIn /proc/device-tree, I can see the device nodeIn evtest nothing output, when I turn the knob of encoder. what is the problem, I need your help, thank you!

I am using the SDMMC1 interface without an SD card, utilizing only the data lines. Therefore, the CMD line is not needed, and I have deactivated the CMD pin. However, the HAL_SDMMC library sends CMD data and expects a response from the SD card, causing errors.Even though I have commented out all the sections related to response error handling, it still does not work. Is there a way to use only the data lines and deactivate the CMD line?Thank you for your assistance.

HelloI wrote the following code to activate the display.The code below is written in kernel/stm32mp157a*.dts and u-boot/stm32mp157a*.dts.panel_rgb: panel-rgb { compatible = "panel-dpi"; label = "lcd"; power-supply = <&vdd_panel>; status = "okay"; port{ panel_in_rgb: endpoint@0 { remote-endpoint = <&ltdc_out_rgb>; }; }; panel-timing { clock-frequency = <63700000>; hactive = <1280>; vactive = <720>; hfront-porch = <20>; hback-porch = <20>; hsync-len = <20>; vback-porch = <24>; vfront-porch = <24>; vsync-len = <24>; }; };   &ltdc{ pinctrl-names = "default", "sleep"; pinctrl-0 = <&ltdc_pins_mx>; pinctrl-1 = <&ltdc_sleep_pins_mx>; status = "okay";   /* USER CODE BEGIN ltdc */ port { ltdc_out_rgb: endpoint@0 { reg = <0>; remote-endpoint = <&panel_in_rgb>; }; }; /* USER CODE

Hello all,The startup of the M4 core is easy enough, echoing "start" to the state enables the core.Shutdown is also simple, echoing "stop" to halt the coprocessor. However on shutdown, peripherals such as the PWM sometimes end in a high state. For my application this is unacceptable. Before shutdown I would like to disable these peripherals and drive them low. This page indicated the IPCC mailbox is used to inform the processor, without giving any implementation details. After looking for the IPCC documentation on this, I have not found anything that describes a shutdown channel, or message. Can someone point me towards documentation on this? Going further, are there any examples of a clean shutdown of the M4 core anywhere?TIA.

 Hello, I am in the process of planning and testing the STM32mp13 Line.We have equipped our project board with the STM32mp13 CPU, but we encountered an issue when trying to connect it via St-link; it did not establish a connection.The St-Link version we are using is V2. Could you please provide a response? SL1

I downloaded the STM32MP151AAC3 example model (.zip file) that routes traces to the DDR3L memorySTM32MP151A - MPU with Arm Cortex-A7 650 MHz, Arm Cortex-M4 real-time coprocessor, TFT display - STMicroelectronics Then I measured DDR_Q1 to DDR_7, DQM0, DQS0_P and DQS0_N and filled the Excel table that is included inside the downloaded .zip file.Here is the result:I have been using Altium CircuitMaker (very similar to Altium Designer).I measured by first pressing CTRL+H and then mark one part of the track and then I press this button.But when I look at the Excel spred sheet that ST have made, they show me these numbers.My question is: What are ST doing to getting the length of DQ0, DQ1, DQ5 and DQ6 ? It seems that they are the only ones that differs. Others seems to be similar. If they are changed in the model, but not in the Excel spred sheet, which values should I follow? The values made by ST, or the hard ware example model made by ST? The reason why I'm asking this ques

Hi!I noticed this.The FC-135 32.768 kHz crystall with CL = 12.5 pF, ESR max = 70 kOhm and C0 = 1.0 pF is suitable for MP1 products.The gmcrit is 2.1631 uA/V.When I do the math, i found out that gain margin is below 5.C0 = 1.0*10^-12;CL = 12.5*10^-12;ESR = 70*10^3;F = 32.768*10^3;Cs = 7*10^-12; % Assume that stray capacitance is 7 pFgm = 8.5*10^-6;% Gain margins criticalgm_crit = 4*ESR*(2*pi*F)^2*(C0 + CL)^2gain_margin = gm/gm_crit% CapacitorsC = (2*CL - 2*Cs)*10^12 Output:gm_crit = 2.1631e-06gain_margin = 3.9295C = 11.0000  Because the gm value of 8.5 can be found here Why does ST recommend FC-135 32.768 kHz when the gm_crit_max is below the gm_crit value?

Hi there, I'm trying to configure a CubeMX project, starting from scratch, for a custom board based on a STM32MP153CAC3. And I'm having an issue with the MPU clock setting. In particular, I can't select any MPU Clock Mux option and see the PLL1 tree as not editable:  Is it normal? Do I have to change something to unlock the configuration? It seems very strange to me that I can't change the MPU clock! NOTE: used CubeMX v6.9 and v6.11, standalone version, same result. Please help me :) Thanks 

Hello, I'm planning to create a new board using the STM32MP157FAC.I've referenced the circuit diagrams of both the Discovery board and the development board to design the PCB and assemble the components.I've successfully connected the power chip, STPMIC, and confirmed the output voltages of 5V, 3.3V, and 1.8V.The starter package provided by ST isn't functioning when using the SD card.I'm aiming to run only the A7 on the PCB I've built. Could you tell me if there's any mistake in the circuit or if there's a separate upload process needed?

Hi!I was recommended to use the pre-built basic start-up projects for the STM32MP series, instead of buildning my own from scratch.Solved: Re: Why are the DDR_DQ signals mixed in unsorted o... - STMicroelectronics CommunityThe project files are Altium Designer only, and I have Altium CircuitMaker. Is there any way to export these files into Altium CircuitMaker?  

I am trying to build a custom board for the stm32mp151A using the STM32MP15 Evaluation boards as a reference.U-BOOT starts, but the kernel won't start, and I'm at my wit's end.1. When the device starts up, the console displays "CPU: STM32MP151AAC Rev.Z", but when U-BOOT starts, it displays "CPU: STM32MP157C?? Rev.ZMP157".Could this be the cause of the kernel not starting?2. When U-BOOT starts, it displays "stm32_smc: Failed to exec svc=82001003 op=1 in secure mode (err = -1)".Could this be the cause of the kernel not starting?

1.) HAL_Delay(x) hangs forever when restarting CM4 using Hardware Timer for Systick. Every unit was forced with RESET/RELEASE. Any firmware change could not solve it. Have to repower the board. Happens in Normal and Engineering mode!2.) HAL_Init() hangs endless after throwing an exception if using Software Systick in CM4. Many power off/on's did not solve the problem. Happens in Normal and Engineering mode!3.) CA7 Boot problem from a reliable SD card (Samsung Endurance Pro 32GB). NOTICE: CPU: STM32MP157FAC Rev.ZNOTICE: Model: STMicroelectronics STM32MP157F-DK2 Discovery BoardNOTICE: Board: MB1272 Var4.0 Rev.C-03INFO: PMIC version = 0x21INFO: Reset reason (0x15):INFO: Power-on Reset (rst_por)INFO: FCONF: Reading TB_FW firmware configuration file from: 0x2ffe2000INFO: FCONF: Reading firmware configuration information for: stm32mp_ioINFO: Using SDMMCINFO: Instance 1INFO: Boot used partition fsbl1NOTICE: BL2: v2.6-stm32mp1-r2.0(debug):v2.6-dirty(a1f02f4f)NOTICE: BL2: Built : 13:1

Hello,I follow this guide X-LINUX-AWS Expansion Package cmd) aws iot attach-policy --policy-name ${TOKEN_EXCHANGE_ROLE_ALIAS_POLICY} --target ${CERT_ARN}but, error occurred (ResourceNotFoundException) when calling the AttachPolicy operation: Policy not found PC)yhlee@YoungHan:~/STM32MPU_workspace$ scp root@${BOARD_IP}:${CSR} ${CSR_ON_PC}mykey_csr.pem 100% 899 484.7KB/s 00:00yhlee@YoungHan:~/STM32MPU_workspace$ scp root@${BOARD_IP}:${CSR} ${CSR_ON_PC}-certificate-from-csr --certificate-signing-request file://${CSR_ON_PC} --certificate-pem-outfile ${CERT_ON_PC} --set-as-activescp ${CERT_ON_PC} root@${BOARD_IP}:${CERT}mykey_csr.pem 100% 899 427.4KB/s 00:00yhlee@YoungHan:~/STM32MPU_workspace$ aws iot create-certificate-from-csr --certificate-signing-request file://${CSR_ON_PC} --certificate-pem-outfile ${CERT_ON_PC} --set-as-active{"certificateArn": "arn:aws:iot:ap-northeast-2:590183762918:cert/689ea30a84b838d89f8b06458b33deee0ad11a9c348caa015ebb7f670e90f045","certificateId": "68

Hi, I am trying to create an image for writing to NAND memory.The problem is that when generating a TSV file using Yocto, I get a layout without a bootfs partition.In this case, it is unclear how to load the Linux kernel and the DeviceTree.Can someone explain to me why the bootfs is excluded from the image layout file (TSV) and how to handle this situation?I can try to add this file to the image, but I am confused because this partition is missing even in the examples.Maybe there's a reason for this that I'm not aware of.I would greatly appreciate any help.