STM32 MPUs Products and hardware related

Hello,I want to operate the device in the following manner, but I don't fully understand the concept of the External Loader:Store DDR Init FW and Main FW in the External NOR Flash.These two FW will be downloaded to the Flash during board production.Upon powering on the board, immediately execute the DDR Init FW stored in the NOR Flash.In this case, to access the NOR Flash, QSPI and other GPIOs need to be activated first. Should this role be handled by custom firmware, or does the External Loader take care of this?If that is not the case, do I simply need to set the boot pins to NOR Flash mode to boot directly from NOR Flash? Below are some example files related to the External Loader. I would like to understand what roles each of these files performs.What does "offset" mean? Should it be set differently depending on the address in NOR Flash where the FW is downloaded?Is there a way to obtain the source code for the corresponding bin files? *The MPU being used is STM32MP131FAE

Hi there, I'm trying to start my M4 fw from u-boot ( https://wiki.stmicroelectronics.cn/stm32mpu/index.php?title=How_to_start_the_coprocessor_from_the_bootloader&oldid=76509#Synchronizing_the_remote_firmware_with_Linux ). We finally managed to load the firmware from u-boot and it runs properly (I can see peripherals working at boot time); btw the guide is not correct for the bootcmd section, let's talk about it in a separate thread! Now, I must integrate the RPMSG interface, and, in the guide ( https://wiki.stmicroelectronics.cn/stm32mpu/wiki/How_to_start_the_coprocessor_from_the_bootloader#STM32Cube ), there's a section describing a Synchronization between u-boot and Linux. It cites that, for non-blocking use cases, IPCC interrupts can be used. But I can't find ANY reference to that in any guide or forum. Can please somebody explain to me how to make this synchronization work properly? I understand that I have to implement M4 fw in a way that the&nbsp

Hi,I'm looking at the wic file for STM32MP13 and see two metadata partitions for ATF firmware update. I'm wondering how are these partitions secured from access / modifications from non-trusted world? Since write (and optionally read) operation should only be performed from secure world what is the mechanism that prevents doing this from non secure world? Is there any? If so, how is this configured? I'm also curious whether the same mechanism applies to STM32MP2

I'm trying to debug a problem in my system where on rare occasions, a message gets dropped in the M4->A7 direction of RPMsg channels (M4 sends it without error and A7 never sees a message arrive). The project was started a long time ago using an older version of CubeMX and CubeIDE (versions 5.4.0 and 1.7.0 respectively), so as a first step I wanted to update the M4's SDK and tools to the latest versions to make sure it's not a driver issue that's already been fixed (versions 6.8.0 and 1.12.0). After updating the tools and regenerating the code (and resolving a couple of FreeRTOS conflicts since a couple files moved), everything seems to be running except that the RPMsg TTY devices aren't showing up in /dev/. Since getting those devices to show up is basically just init code at the start of main in the M4 and this code works in the older version of the SDK, I was hoping someone could do a quick sanity check of my startup code and make sure it's correct for the latest versions of the

Background:I'm trying to bring up a custom board with an STM32MP157D and DDR3. When I tried flashing the BSP, I got an error: "ERROR: DDR addr bus test: can't access memory @ 0xc0000004". I decided to try using STM32DDRFW-UTIL to test the DDR before proceeding. I downloaded the code and compiled and debugged the project for an STM32MP157C-DK2. The image sucessfully loaded via the ST-Link in engineering mode and I saw the UART with the expected DDR tool interface. My custom board does not have an ST-Link connection, so I was going to try to flash the image into sysram using USB. I'm still working with the DK2 as a proof of concept.Issue:When I try to flash the image using STM32_Programmer_CLI, the utility does not start. I am using the binary in the Binaries folder of STM32DDRFW-UTIL and trying to flash it with "STM32_Programmer_CLI -c port=usb1 -d STM32MP157C-DK2_DDR_UTILITIES_A7.stm32 0x01 -s 0x01". I get the following output and nothing on the UART:--------------------

I'm getting the following log when trying to boot to a custom DTS. I've already attempted the suggestion mentioned in this st forum post (https://community.st.com/t5/stm32-mpus-products/op-tee-error-tzc-permission-failure-on-new-v5-0-0-sdk/td-p/584339) with no luck.I/TC: Primary CPU switching to normal world bootD/TC:0 tee_entry_exchange_capabilities:101 Asynchronous notifications are disabledD/TC:0 tee_entry_exchange_capabilities:110 Dynamic shared memory is enabledD/TC:0 0 core_mmu_xlat_table_alloc:526 xlat tables used 4 / 10F/TC:? 0 entry_open_session:362 entry_open_sessionF/TC:? 0 entry_open_session:373 uuid: 1880204936 56798 16467F/TC:? 0 tee_ta_open_session:675 uuid: 1880204936 56798 16467D/TC:? 0 tee_ta_init_pseudo_ta_session:296 Lookup pseudo TA 7011a688-ddde-4053-a5a9-7b3c4ddf13b8D/TC:? 0 tee_ta_init_pseudo_ta_session:309 Open device.ptaD/TC:? 0 tee_ta_init_pseudo_ta_session:326 device.pta : 7011a688-ddde-4053-a5a9-7b3c4ddf13b8F/TC:? 0 plat_prng_add_jitter_entropy:73 0x24BDD/T

i am facing the issue like i could  not able to access the PWM pinsi want like this only (/sys/class/pwm/pwmchipX/).but i get output like this only. {root@stm32mp1:~# cd /sys/class/pwm/root@stm32mp1:/sys/class/pwm# lsroot@stm32mp1:/sys/class/pwm# ls}Note: i am using qt quick i want to read Pins as a PWM and get back to display.

As the title says, when I add the (with or without "regulator-always-on") vdd: vdd { compatible = "regulator-fixed"; regulator-name = "vdd"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; }; or vdd_ddr: vdd_ddr { compatible = "regulator-fixed"; regulator-name = "vdd_ddr"; regulator-min-microvolt = <1350000>; regulator-max-microvolt = <1350000>; regulator-always-on; };  the boot stops  NOTICE: CPU: STM32MP135D Rev.Y NOTICE: Model: MYIR STM32MP135F Board ERROR: nvmem node board_id not found without any further messages. Why? JHi 

Hello,I am currently using the STM32MP157D to develop some tests. It seems that a specific U-BOOT has been developed by ST and flashed in the default factory eMMC.On this specific U-BOOT, some self-test commands are interesting.Could it be possible to share the software of these commands in order to re-implement on my u-boot version the "Self-Test-NAND" ?The version is :U-Boot 2019.10-stm32mp-20-01-15-00229-gdffcf0a (Feb 20 2020 - 16:55:29 +0100)Regards,MJ

Hi, I have a board that I designed that's not booting and I am struggling to workout why.I don't see any output on UART4 when booting and I also noticed that openocd reports the program counter as the following which I believe means that its still in the BootROM.pc: 0x0000f738 .I have built the image by using Yocto (St-Image-Core) and flashed it onto an SD Card.I have attached the log file from the ROM Trace analyzer.I do have a design issue where I failed to add a pull down onto OSC_OUT and I am using the HSE in Bypass mode, could this be the reason I am failing to boot into the FSBL when booting from an SD card?

MP135 是否具有带双网络端口的裸机程序？客户使用 ThreadX+NetDuoX。

I would like to only use cgroup v2 and would like to modify the kernel cmdline boot arguments as follows:, .  I searched internet and suggestion is to useadd systemd. unified_cgroup_hierarchy=1 under /etc/default/grub , followed by sudo update-grub .My current command line is:cat /proc/cmdlineroot=PARTUUID=e91c4e10-16e6-4c0e-bd0e-77becf4a3582 rootwait rw console=ttySTM0,115200root@stm32mp1:/dev# stat -fc %T /sys/fs/cgrouptmpfs**cgroup v1 and cgroup v2 enabled.I added to new file /etc/default/grouproot@stm32mp1:/dev# cat /etc/default/grubGRUB_CMDLINE_LINUX="$GRUB_CMDLINE_LINUX systemd.unified_cgroup_hierarchy=1"I tried update-grub and grub2-mkconfig, but both commands did not executeroot@stm32mp1:/dev# update-grub-bash: update-grub: command not foundroot@stm32mp1:/dev# grub2-mkconfig-bash: grub2-mkconfig: command not foundroot@stm32mp1:/dev# echo $PATH How do I update GRUB on STM32MP157F-EV1 system?  

NOTICE: CPU: STM32MP157FAC Rev.ZNOTICE: Model: STMicroelectronics STM32MP157F-DK2 Discovery BoardINFO: PMIC version = 0x21INFO: Reset reason (0x14):INFO: Pad Reset from NRSTINFO: FCONF: Reading TB_FW firmware configuration file from: 0x2ffe2000INFO: FCONF: Reading firmware configuration information for: stm32mp_ioINFO: Using SDMMCINFO: Instance 1INFO: Boot used partition fsbl1NOTICE: BL2: v2.8-stm32mp1-r1.0(debug):lts-v2.8.6-dirty(ff0bd5f9)NOTICE: BL2: Built : 17:57:15, Apr 21 2023INFO: BL2: Doing platform setupINFO: RAM: DDR3-DDR3L 16bits 533000kHzINFO: Memory size = 0x20000000 (512 MB)INFO: BL2: Loading image id 1INFO: Loading image id=1 at address 0x2ffff000INFO: Image id=1 loaded: 0x2ffff000 - 0x2ffff1eaINFO: FCONF: Reading FW_CONFIG firmware configuration file from: 0x2ffff000INFO: FCONF: Reading firmware configuration information for: dyn_cfgINFO: FCONF: Reading firmware configuration information for: stm32mp1_firewallINFO: BL2: Loading image id 4INFO: Loading image id=4 at addre

Hello,Would it be possible to have an updated guide on how to use a custom device tree within my own layer for latest STM32MP1 Ecosystem ?The one provided here  "How to compile the device tree with the Distribution package" is clearly outdated, as the Yocto delivery mentionned in the exemple is Kirkstone (should be now Mickledore) and the step : Replace STM32MP_MX_BASE by STM32MP_MY_DEMO_BASEIs impossible to do, as the variable STM32MP_MX_BASE does not exist in latest machine configurations.In the meanwhile, any ideas of how to implement this solution for latest? I'm currently using this solution "How to create your own machine" in the wiki, but that is not the way I would like to work in the long term.

Hello,We're trying to boot our prototype which contains an STM32MP157FAA.Unfortunately, we didn't implement an oscillator/quartz on the board, so we are unable to use HSE and can only use HSI.We have access to USB1, USB2, SDMMC3, and UART4.Is there a way to load U-Boot with these options using HSI ?Best regards,François

Hello STM32 Community,I hope this message finds you well.I’m currently working with an STM32 Linux board and have encountered an issue where the TSV Flashing Service fails and the code is not dumping correctly. I would greatly appreciate any assistance or guidance you can provide to resolve this problem.Here are some details that might be relevant:TSV Flashing service failedFile does not exitstep 1step 2:step 3:step 4:step 5:Thank you very much for your time and support. I look forward to your advice.Best regards,EM-TECH

HiI have recently been working on the board model mentioned in the title. At the moment I have a problem with two things:1. when trying to debug the kernel drivers, the kernel is inactive for a period of time which causes the watchdog to run. This behavior makes it impossible to debug the drivers. Is there any convenient solution to disable the watchdog?At this point I have disabled support for watchdog in both the uboot and kernel, but this has caused the board to reset itself no matter what I do (there is information on the wiki about the possibility of disabling it from the build root level). Looking through the information available on the Internet, I found out that you could directly modify the memory, but this option does not suit me. Another piece of advice is in the course from bootlin: ```However, it turns out that this pre-defined configuration enables the STM32 watchdog, and since our Linux user-space does not have a watchdog daemon to tick the watchdog regularly, it wo

Hello to everyone!We have develop a System on Module board based on the STM32MP153AAB. Currently it have a custom Yocto Image build, that it's working. The process followed  almost all the steps in the wiki for the STM32MP157F-DK2 discovery kit, however, some pins had to change due to the custom design. Now we have encountered a problem debugging the M4 firmware in the custom SOM. This firmware currently works in the MP157F-DK2 discovery kit (The debug too). Trying to fix this, we have used the STM32CubeIDE 1.14.0 to develop a blinky example on the M4, and the STLINK-V2 to start the debugging. The STLINK-V2 it's correctly recognized by the STM32CubeIDE. Besides that, we have not been able to debug. We can download and run the .elf manually on the board, following the steps in the wiki using sys and remoteproc interface: https://wiki.st.com/stm32mpu/wiki/Linux_remoteproc_framework_overview  LED blinks okay. Because we are in a custom PCB, don't have ac

I want to test the memory by using U-boot.I'm reading the DDR memory from 0xC0000000 to 0xE0000000 with the pattern 0xFFFFFFF. But I don't have premision to read the memory. How can I solve this issue?  STM32MP> mtest 0xC0000000 0xE0000000 0xFFFFFFFF Testing c0000000 ... e0000000: Iteration: 1 Pattern FFFFFFFF Writing... Reading...Iteration: 2 Pattern 00000001 Writing... E/TC:0 tzc_it_handler:79 TZC permission failure E/TC:0 dump_fail_filter:420 Permission violation on filter 0 E/TC:0 dump_fail_filter:425 Violation @0xf8803000, non-secure privileged read, AXI ID 4a0 E/TC:0 tzc_it_handler:79 TZC permission failure E/TC:0 dump_fail_filter:420 Permission violation on filter 0 E/TC:0 dump_fail_filter:425 Violation @0xf8804000, non-secure privileged read, AXI ID 4a0  My U-boot Device Tree for the memory.  memory@c0000000 { device_type = "memory"; reg = <0xc0000000 0x20000000&

Dear All,I have been developing touch screen with XPT4096.When press touch screen, interrupt is generated.Read Y, X, Z1, Z2, power down is sent to XPT4096.During transferring message to XPT4096, transfer setup failed.Please refer to waveform.1CH : spi clock2CH : interrupt3CH : MOSI(to 4096)4CH: MISO(from 4096)  

I can fix the problem by enabling interrupts for the DMA channel. But WHY should this be necessary?I'd prefer to do this with no interrupts. I allow ample time between calls so data transfers have plenty of time to complete.(G4 chip, MX set up as SPI3 transmit only master with DMA on DMA2 channel1)Thanks!

Why does the STM32MP157AAD3 have a higher heat or temperature? We have an STM32 board that has interfaces for PMIC, DDR3, temperature sensors, VOC, EMMC, LEDs, push buttons, WIFI+BLE modules, 8-pin connectors, wake-up switches are build in same board Sir, we have observed that the board can get as hot as 90 degrees Celsius when it is operating at full load. How can we deal with this heat problem? Could you please elaborate? I've included pictures of the board for your reference.

Hi, we have a custom design with an STM32MP13xx CPU.We currently see random issues during boot. Some of the prototypes randomly stuck on boot without any output on the serial console, sometimes they are booting well. When a board has booted it runs stable without any issues.In error case, the oscillator does not start, we don't see any i2c communication to the PMIC and also the RAM power supply is not there.After review of the layout we saw that PDR_ON is floating and not connected to VDD as required in the datasheet and AN5474 (Getting started with STM32MP13x lines hardware development).My question:- can a floating PDR_ON pin lead to this random boot issues?- what else can be checked or is required if the oscillator does randomly not start running?Thanks in advance and best regardsRuben 

Hi all, we are trying to start our own board running a STM32MP157DAC1We have so far been able to load the TF-A, OPTEE (only when configured in SYSRAM) and u-boot, our starting point is the openst-linux framework (5.0.2 - mickledore), on top of which we have added our layer to add our dts* and defconfig.Right now, I am not able to program anything into eMMC (set to mmc1)I got this message from STM32CubeProgrammer_CLI : -------------------------------------------------------------------STM32CubeProgrammer v2.14.0 -------------------------------------------------------------------USB speed : High Speed (480MBit/s)Manuf. ID : STMicroelectronicsProduct ID : DFU in HS Mode @Device ID /0x500, @Revision ID /0x0000SN : 002A00173432510E33363738DFU protocol: 1.1Board : --Device ID : 0x0500Device name : STM32MP15xxDevice type : MPURevision ID : -- Device CPU : Cortex-A7Start Embedded Flashing serviceMemory Programming ...Opening and parsing file: tf-a-stm32mp157d-copro-usb.stm32File : tf-a-st

Hi,I am trying to migrate my project (custom board using stm32mp153a and 256MB mem) from 4.1.0 to 5.0.0 but I am getting a panic when booting u-boot:Board: MBfdd8 Var2.15 Rev.B-14 DRAM: 256 MiB E/TC:0 tzc_it_handler:79 TZC permission failure E/TC:0 dump_fail_filter:420 Permission violation on filter 0 E/TC:0 dump_fail_filter:425 Violation @0xcff09000, non-secure privileged write, AXI ID 480 M/TC: CPU : 0 M/TC: usr_sp : 0x00000000 M/TC: usr_lr : 0x00000000 M/TC: irq_spsr : 0x00000000 M/TC: irq_sp : 0x00000000 M/TC: irq_lr : 0x00000000 M/TC: fiq_spsr : 0x00000000 M/TC: fiq_sp : 0x00000000 M/TC: fiq_lr : 0x00000000 M/TC: svc_spsr : 0x00000000 M/TC: svc_sp : 0xcdef2ca0 M/TC: svc_lr : 0xcff0a2f0 M/TC: abt_spsr : 0x00000000 M/TC: abt_sp : 0x00000000 M/TC: abt_lr : 0x00000000 M/TC: und_spsr : 0x00000000 M/TC: und_sp : 0x00000000 M/TC: und_lr : 0x00000000 M/TC: pmcr : 0x41072000 E/TC:0 Panic M/TC: CPU : 0 M/TC: usr_sp : 0x00000000 M/TC: usr_lr : 0x00000000 M/TC: irq_spsr : 0x00000000 M/TC: irq