STM32 MPUs

 Hello, I am in the process of planning and testing the STM32mp13 Line.We have equipped our project board with the STM32mp13 CPU, but we encountered an issue when trying to connect it via St-link; it did not establish a connection.The St-Link version we are using is V2. Could you please provide a response? SL1

I downloaded the STM32MP151AAC3 example model (.zip file) that routes traces to the DDR3L memorySTM32MP151A - MPU with Arm Cortex-A7 650 MHz, Arm Cortex-M4 real-time coprocessor, TFT display - STMicroelectronics Then I measured DDR_Q1 to DDR_7, DQM0, DQS0_P and DQS0_N and filled the Excel table that is included inside the downloaded .zip file.Here is the result:I have been using Altium CircuitMaker (very similar to Altium Designer).I measured by first pressing CTRL+H and then mark one part of the track and then I press this button.But when I look at the Excel spred sheet that ST have made, they show me these numbers.My question is: What are ST doing to getting the length of DQ0, DQ1, DQ5 and DQ6 ? It seems that they are the only ones that differs. Others seems to be similar. If they are changed in the model, but not in the Excel spred sheet, which values should I follow? The values made by ST, or the hard ware example model made by ST? The reason why I'm asking this ques

Hi!I noticed this.The FC-135 32.768 kHz crystall with CL = 12.5 pF, ESR max = 70 kOhm and C0 = 1.0 pF is suitable for MP1 products.The gmcrit is 2.1631 uA/V.When I do the math, i found out that gain margin is below 5.C0 = 1.0*10^-12;CL = 12.5*10^-12;ESR = 70*10^3;F = 32.768*10^3;Cs = 7*10^-12; % Assume that stray capacitance is 7 pFgm = 8.5*10^-6;% Gain margins criticalgm_crit = 4*ESR*(2*pi*F)^2*(C0 + CL)^2gain_margin = gm/gm_crit% CapacitorsC = (2*CL - 2*Cs)*10^12 Output:gm_crit = 2.1631e-06gain_margin = 3.9295C = 11.0000  Because the gm value of 8.5 can be found here Why does ST recommend FC-135 32.768 kHz when the gm_crit_max is below the gm_crit value?

Hi! I have tried to compile OP-TEE version 3.19.0-stm32mp-r1.1 for the STM32MP157F-DK2 board. With the official source on STMicroelectronics OP-TEE Github repo ,but I get the following error:$ make CROSS_COMPILE=arm-none-eabi- PLATFORM=stm32mp1-157F_DK2 all GEN out/arm-plat-stm32mp1/core/include/generated/arm32_sysreg.h [...] CC out/arm-plat-stm32mp1/core/mm/core_mmu.o core/mm/core_mmu.c:1514:6: error: conflicting types for 'core_mmu_get_mem_by_type' due to enum/integer mismatch; have 'void(unsigned int, vaddr_t *, vaddr_t *)' {aka 'void(unsigned int, long unsigned int *, long unsigned int *)'} [-Werror=enum-int-mismatch] 1514 | void core_mmu_get_mem_by_type(unsigned int type, vaddr_t *s, vaddr_t *e) | ^~~~~~~~~~~~~~~~~~~~~~~~ In file included from core/include/mm/tee_pager.h:13, from core/include/mm/fobj.h:11, from core/include/mm/sp_mem.h:10, from core/arch/arm/include/kernel/secure_partition.h:14, from core/include/kernel/user_mode_ctx.h:11, from core/mm

Hi there, I'm trying to configure a CubeMX project, starting from scratch, for a custom board based on a STM32MP153CAC3. And I'm having an issue with the MPU clock setting. In particular, I can't select any MPU Clock Mux option and see the PLL1 tree as not editable:  Is it normal? Do I have to change something to unlock the configuration? It seems very strange to me that I can't change the MPU clock! NOTE: used CubeMX v6.9 and v6.11, standalone version, same result. Please help me :) Thanks 

I am using the FMC peripheral of the STM32MP157 to access the FPGA, the FMC is configured as a Synchronous read synchronous write PSRAM. For the simplicity of the FPGA logic design I would like to have the burst reads and burst writes with CRAM page size (CPSIZE) fixed at 1024 bits.This is the device tree configuration: &fmc { pinctrl-names = "default", "sleep"; pinctrl-0 = <&fmc_pins_mx>; pinctrl-1 = <&fmc_sleep_pins_mx>; status = "okay"; psram@0,0 { compatible = "mtd-ram"; reg = <0 0x00000000 0x100000>; bank-width = <2>; st,fmc2-ebi-cs-transaction-type = <8>; st,fmc2-ebi-cs-cclk-enable = <1>; st,fmc2-ebi-cs-mux-enable; st,fmc2-ebi-cs-buswidth = <16>; st,fmc2-ebi-cs-clk-period-ns = <60>; st,fmc2-ebi-cs-cpsize = <128>; st,fmc2-ebi-cs-data-latency-ns = <0>; st,fmc2-ebi-cs-write-bus-turnaround-ns = <0>; st,fmc2-ebi-cs-max-low-pulse-ns = <0>; }; psram@1,0 { compatible

Hi there, I'm developing a Linux Embedded system on an STM32MP153-based custom board. I have a problem regarding shutdown vs low power modes. I have a gpio (active low) that acts as a "final switch off" for the whole system (a.k.a. when that gpio goes down, the board is no longer powered). I need this gpio to act like that only when the user asks for a shutdown. When entering any low-power mode (sleep/stop/standby), that gpio is not toggled. Of course, I could lower the signal of the gpio in the user space, but this would cause a dirty power off of the whole system, and that's not good (I think?). Is there a clean/official way to achieve that result? Thanks for your help! 

Hello, I'm planning to create a new board using the STM32MP157FAC.I've referenced the circuit diagrams of both the Discovery board and the development board to design the PCB and assemble the components.I've successfully connected the power chip, STPMIC, and confirmed the output voltages of 5V, 3.3V, and 1.8V.The starter package provided by ST isn't functioning when using the SD card.I'm aiming to run only the A7 on the PCB I've built. Could you tell me if there's any mistake in the circuit or if there's a separate upload process needed?

Hello ST Dear ST Community, I'm currently trying to migrate my solution from stm32mp1-openstlinux-5-4-dunfell-mp1-20-06-24   to stm32mp1-openstlinux-5.15-yocto-kirkstone-mp1-v22.06.15 Im using a ST7789V Based LCD, and its working trough /dev/fb0 and fbdev under /video/fbtft and /video/fbdev under dunfell sourceshowever in the kirkstone distro stuff are different , i only see staging/fbtft , i managed to get the right configuration and activate it the LCD driver is loadedin the boot it shows this    [ 0.516659] SPI driver fb_st7789v has no spi_device_id for sitronix,st7789v [ 9.137538] systemd[1]: System time before build time, advancing clock. [ 9.248500] ipv6: module verification failed: signature and/or required key missing - tainting kernel [ 9.274214] NET: Registered PF_INET6 protocol family [ 9.314553] Segment Routing with IPv6 [ 9.316896] In-situ OAM (IOAM) with IPv6 [ 9.383063] systemd[1]: systemd 250.4-1-gc3aead5+ running in system mode (+PAM

Hi!I was recommended to use the pre-built basic start-up projects for the STM32MP series, instead of buildning my own from scratch.Solved: Re: Why are the DDR_DQ signals mixed in unsorted o... - STMicroelectronics CommunityThe project files are Altium Designer only, and I have Altium CircuitMaker. Is there any way to export these files into Altium CircuitMaker?  

I am trying to build a custom board for the stm32mp151A using the STM32MP15 Evaluation boards as a reference.U-BOOT starts, but the kernel won't start, and I'm at my wit's end.1. When the device starts up, the console displays "CPU: STM32MP151AAC Rev.Z", but when U-BOOT starts, it displays "CPU: STM32MP157C?? Rev.ZMP157".Could this be the cause of the kernel not starting?2. When U-BOOT starts, it displays "stm32_smc: Failed to exec svc=82001003 op=1 in secure mode (err = -1)".Could this be the cause of the kernel not starting?

Hi,I am in the process of migrating from Yocto Dunfell to STM kirkstone and using layers from oe-manifest/default.xml at kirkstone · STMicroelectronics/oe-manifest (github.com).Also, I am using a modified Flashlayout tsv file:#Opt Id Name Type IP Offset Binary - 0x01 fsbl-boot Binary none 0x0 arm-trusted-firmware/tf-a-stm32mp157f-dk2-serialboot.stm32 - 0x03 fip-boot FIP none 0x0 fip/fip-stm32mp157f-dk2-trusted.bin P 0x04 fsbl1 Binary mmc0 0x00004400 arm-trusted-firmware/tf-a-stm32mp157f-dk2-sdcard.stm32 P 0x05 fsbl2 Binary mmc0 0x00044400 arm-trusted-firmware/tf-a-stm32mp157f-dk2-sdcard.stm32 P 0x06 metadata1 Binary mmc0 0x00084400 arm-trusted-firmware/metadata.bin P 0x07 metadata2 Binary mmc0 0x000C4400 arm-trusted-firmware/metadata.bin P 0x08 fip-a FIP mmc0 0x00104400 fip/fip-stm32mp157f-dk2-trusted.bin P 0x12 rootfs FileSystem mmc0 0x05984400 image-stm32mp157f.ext4 I also have enabled `earlycon` in Linux Kernel configuration for debugging purpose.I am able to make the Boar

# How to use the device tree generated by CubeMX to generate images and add a serial port to MP135My hardware platform is MP135, and now I want to add a serial port UART8 to it, so I plan to modify the device tree.  But I encountered some issues while using the SDK.According to the official 'how to do. txt', I compiled u-boot and generated the following content in the deploy folder:```bash~/workspace/STM32/stm32mp1-openstlinux-6.1-yocto-mickledore-mp1-v23.06.21/sources/arm-ostl-linux-gnueabi/u-boot-stm32mp-v2022.10-stm32mp-r1-r0/deploy$ lsdebug                       u-boot-stm32mp157c-ed1.dtbu-boot-nodtb-stm32mp13.bin  u-boot-stm32mp157c-ev1.dtbu-boot-nodtb-stm32mp15.bin  u-boot-stm32mp157d-dk1.dtbu-boot-stm32mp135f-dk.dtb   u-boot-stm32mp157d-ev1.dtbu-boot-stm32mp157a-dk1.dtb  u-boot-stm32mp157f-dk2.dtbu-boot-stm32mp157a-ev1.dtb  u-boot-stm32mp157f-ed1.dtbu-boot-stm32mp157c-dk2.dtb  u-boot-stm32m

1.) HAL_Delay(x) hangs forever when restarting CM4 using Hardware Timer for Systick. Every unit was forced with RESET/RELEASE. Any firmware change could not solve it. Have to repower the board. Happens in Normal and Engineering mode!2.) HAL_Init() hangs endless after throwing an exception if using Software Systick in CM4. Many power off/on's did not solve the problem. Happens in Normal and Engineering mode!3.) CA7 Boot problem from a reliable SD card (Samsung Endurance Pro 32GB). NOTICE: CPU: STM32MP157FAC Rev.ZNOTICE: Model: STMicroelectronics STM32MP157F-DK2 Discovery BoardNOTICE: Board: MB1272 Var4.0 Rev.C-03INFO: PMIC version = 0x21INFO: Reset reason (0x15):INFO: Power-on Reset (rst_por)INFO: FCONF: Reading TB_FW firmware configuration file from: 0x2ffe2000INFO: FCONF: Reading firmware configuration information for: stm32mp_ioINFO: Using SDMMCINFO: Instance 1INFO: Boot used partition fsbl1NOTICE: BL2: v2.6-stm32mp1-r2.0(debug):v2.6-dirty(a1f02f4f)NOTICE: BL2: Built : 13:1

I enabled fmc in arch/arm/boot/dts/stm32mp157f-dk2.dts:&fmc { status = "okay"; };And this is how i read or write its registers:static inline unsigned int readl(const volatile void *addr) { unsigned int val; __asm__ __volatile__("": : :"memory"); val = *(volatile unsigned int *)addr; __asm__ __volatile__("": : :"memory"); return val; } static inline void writel(unsigned int value, volatile void *addr) { __asm__ __volatile__("": : :"memory"); *(volatile unsigned int *)addr = value; __asm__ __volatile__("": : :"memory"); } int main() { fd = open ("/dev/mem", O_RDWR | O_SYNC); if(fd == 0) { DBG("open mem failed\n"); return -1; } iobase = mmap(NULL, 0x1000, PROT_READ|PROT_WRITE, MAP_SHARED, fd, 0x58002000); if(iobase == MAP_FAILED) { DBG("iobase mmap failed\n"); ret = -1; goto close_fd; } bcr0 = readl(iobase+FMC2_BCR(0)); ... writel(bcr0, iobase+FMC2_BCR(0)); ... }But I guess I did not read the proper values of its registers, which are all 0x000030db. And

Hello,I follow this guide X-LINUX-AWS Expansion Package cmd) aws iot attach-policy --policy-name ${TOKEN_EXCHANGE_ROLE_ALIAS_POLICY} --target ${CERT_ARN}but, error occurred (ResourceNotFoundException) when calling the AttachPolicy operation: Policy not found PC)yhlee@YoungHan:~/STM32MPU_workspace$ scp root@${BOARD_IP}:${CSR} ${CSR_ON_PC}mykey_csr.pem 100% 899 484.7KB/s 00:00yhlee@YoungHan:~/STM32MPU_workspace$ scp root@${BOARD_IP}:${CSR} ${CSR_ON_PC}-certificate-from-csr --certificate-signing-request file://${CSR_ON_PC} --certificate-pem-outfile ${CERT_ON_PC} --set-as-activescp ${CERT_ON_PC} root@${BOARD_IP}:${CERT}mykey_csr.pem 100% 899 427.4KB/s 00:00yhlee@YoungHan:~/STM32MPU_workspace$ aws iot create-certificate-from-csr --certificate-signing-request file://${CSR_ON_PC} --certificate-pem-outfile ${CERT_ON_PC} --set-as-active{"certificateArn": "arn:aws:iot:ap-northeast-2:590183762918:cert/689ea30a84b838d89f8b06458b33deee0ad11a9c348caa015ebb7f670e90f045","certificateId": "68

Hi, I am trying to create an image for writing to NAND memory.The problem is that when generating a TSV file using Yocto, I get a layout without a bootfs partition.In this case, it is unclear how to load the Linux kernel and the DeviceTree.Can someone explain to me why the bootfs is excluded from the image layout file (TSV) and how to handle this situation?I can try to add this file to the image, but I am confused because this partition is missing even in the examples.Maybe there's a reason for this that I'm not aware of.I would greatly appreciate any help.

Dear Community,we currently try to set up a Murata  LBEE5KL1YN with an Ocatavo System OSD32MP157c. We use ecosystem5 and kernel 6.1.28. The problem is, the brcmfmac driver is not loaded. We do not see any output of brcm in the boot log and also not in dmesg. It seems that the driver is never loaded. There is no error message no load error, nothing to find which would indicate a load or crash of brcm drivers.It seems that SDIO detection on sdmmc3 works. We geht the following dmesg output[ 3.903290] mmc2: new high speed SDIO card at address 0001and also in the booted system we seesudo cat /sys/kernel/debug/mmc2/ios clock: 50000000 Hz actual clock: 49500000 Hz vdd: 21 (3.3 ~ 3.4 V) bus mode: 2 (push-pull) chip select: 0 (don't care) power mode: 2 (on) bus width: 2 (4 bits) timing spec: 2 (sd high-speed) signal voltage: 0 (3.30 V) driver type: 0 (driver type B)We do see communication on the CMD line and also the power up sequence on the oscilloscope.The relevant device tree secti

Looking at AN5478 implies that the entire line of STM32MP13x has a DCMIPP interface. However for STM32MP131 DCMIPP is not mentioned in the datasheet.Does the STM32MP131 have a DCMIPP interface? If so, are the pins and the functionality matching that on the one on the STM32MP135?Thanks.

I am trying to update dunfell to kirkstone on stm32mp157f-dk2. I am observing below issue in systemd_create_users Configuration error - unknown item 'SYSLOG_SU_ENAB'  (notify administrator) Configuration error - unknown item 'SYSLOG_GU_ENAB'  (notify administrator)   DEBUG: Executing shell function systemd_create_users configuration error - unknown item 'SYSLOG_SU_ENAB' (notify administrator) configuration error - unknown item 'SYSLOG_SG_ENAB' (notify administrator) Usage: useradd [options] LOGIN useradd -D useradd -D [options] Options: --badnames do not check for bad names -b, --base-dir BASE_DIR base directory for the home directory of the new account --btrfs-subvolume-home use BTRFS subvolume for home directory -c, --comment COMMENT GECOS field of the new account -d, --home-dir HOME_DIR home directory of the new account -D, --defaults print or change default useradd configuration -e, --expiredate EXPIRE_DATE expiration date of the new account -f, --inactiv

how i can solve it : Error in final launch sequence: Failed to execute MI command:target extended-remote localhost:3333 Error message from debugger back end:Truncated register 16 in remote 'g' packetFailed to execute MI command:target extended-remote localhost:3333 Error message from debugger back end:Truncated register 16 in remote 'g' packetTruncated register 16 in remote 'g' packet

Hello     We are planning to work on STM32MP2x processors in our custom design boards. We tried with latest version of CUBEMX for pinmux but it's not available. So, we would like to know when we can expect the pinmux support for STM32MP2x processors.       Thank you in advance.regardssrikanth

Hello, I am looking for an MCU/MPU for some application development and the STM32MP looked very interesting. I understand that the STM32MP257F is still in preproduction and there is no "-EV1" development board for it... on the other hand, the STM32MP157C-EV1 is obsolete and the STM32MP157F would be a problematic option for me because I need the automotive temperature range offered by the 157C.  Thus, I have the following questions:- Is there a planned release date for the 257F and its development board?- What is the EOL date for the 157C? Why does it appear as "active" but its development kit is "obsolete"?- Is it possible to use any of them (or both of them) in a bare-metal set-up with only one core active? I am trying, as much as possible, to avoid a multi-core configuration or any sort of RTOS. Thanks,Ricardo

I want to connect AWS IoT on STM32mp135f-dk board. so, I install pkgsudo apt-get install gitsudo apt-get install cmakesudo apt-get install build-essentialbut, can't auto install build-essential, so dpkg manual install.(build-essential_12.10_armhf.deb)gcc pakage already installed, but occured errorerror)root@stm32mp1:/usr/local/pkg# dpkg -i build-essential_12.10_armhf.deb(Reading database ... 29989 files and directories currently installed.)Preparing to unpack build-essential_12.10_armhf.deb ...Unpacking build-essential (12.10) over (12.10) ...dpkg: dependency problems prevent configuration of build-essential:build-essential depends on gcc (>= 4:12.3); however:Package gcc is not configured yet.dpkg: error processing package build-essential (--install):dependency problems - leaving unconfiguredErrors were encountered while processing:build-essentialroot@stm32mp1:/usr/local/pkg# how can I fix it?

I found something interresting.If we look at the STM32MP15XXAC (package TFBGA361) we can see that:DLCD_B1 is connected to K4 and Y17OTG_HS_ID is connected to Y17ETH_PHY_INTN is connectes to K4In this case, I need DLCD_B1 and OTG_HS_ID for flashing the eMMC with Linux. What I found is that ETH_PHY_INTN is actually connected to AC8 for the STM32MP157 dev-kit, and that leads me to the question:Is AC8 an interrupt or a wakeup pin for the Ethernet PHY? Why is AC8 selected? Should I declare it as an External Interrupt in CubeMX?If I look at CubeMX, there is an option for Ethernet Interrupt.