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I need some clock synchronization between M4 and A7 cores. So I need steady clock values from A7 and M4 for single time point
I don't know What Can I Do.Please Help Me. Can you share the information or guide StmCubeMX and StmCubeIDe Programing
Hi, everyone. :)I am planning to make communication system with stm MCU.AND, at the same time, I should boot up 'Linux' OS on stm MCU, for matching with other systems.I'm just wondering that stm MCU can carry on Linus OS.If stm MCU can use Linux OS, Which MCU is suitable for debugging and operating?Please, give wisdom.Thank you!
I am working with a custom board, and are using the CM4 core to configure and mange FPGAs via the FMC. In my system the FPGA configuration requires the transfer of a large data buffer (3MByte-10MByte) between the CA7 core and the CM4 core. I understand this is sub-optimal due to the asynchronous connection between the AHB and AXI busses, but as the FPGAs are not configured very often that is okay.I’ve set up shared data buffers using the indirect method, similar to the example described in How to exchange large data buffers with the coprocessor - example - stm32mpu. The difference in my current implementation is that I am transferring data from CA7 core to CM4 core, and for now I am not using DMA, just memcpy. Plan to add DMA later after getting a functional system for customer demo. Also I am using the standard rpmsg/OpenAMP framework for control messaging.There is no problem on the CA7 side, the data buffer device is created by the CM4
While learning how eMMC partitioning works, I issued a mmc create gp command from Linux and since then I cannot flash a new image on a EV1 board. The error message I get is:Message from Embedded Flash Loader : ssbl (0x6): invalid address 0x80000 (min=0x400000)I can boot using the sdcard and access eMMC from there, I need to know how to restore eMMC so it will accept flashing commands.I could recreate partitions using the gpt command on u-boot and "dd" ext4 fs images to the partitions. The boot process start on the eMMC but since UUIDs don't match what is in the image, it does not finish booting. Which leads back to cube programmer and being unable to flash a new linux image.My question is essentially how to put eMMC back in a state I can flash it.Regards.
I'm working on STM32MP157a-dk1I followed the link https://wiki.st.com/stm32mpu/wiki/STM32MP1_Distribution_Package and used these steps to create a imageSteps:PC $> cd <working directory path>/Distribution-PackagePC $> mkdir openstlinux-5.10-dunfell-mp1-21-03-31 PC $> cd openstlinux-5.10-dunfell-mp1-21-03-31PC $> repo init -u https://github.com/STMicroelectronics/oe-manifest.git -b refs/tags/openstlinux-5.10-dunfell-mp1-21-03-31PC $> repo syncPC $> DISTRO=openstlinux-weston MACHINE=stm32mp1-disco source layers/meta-st/scripts/envsetup.shPC $> bitbake st-image-westonbuild creates the image openstlinux-5.10-dunfell-mp1-21-03-31/build-openstlinuxweston-stm32mp1-disco/tmp-glibc/deploy/images/stm32mp1-disco/flashlayout_st-image-weston/trusted/FlashLayout_sdcard_stm32mp157c-dk2-trusted.tsvbut it doesn't create image for stm32mp157a-dk1.how to make image for stm32mp157a-dk1 with additional debian packages
Hi,I'm working on STM32MP157A-DK1. By following this linkhttps://wiki.st.com/stm32mpu/wiki/STM32MP1_Distribution_Package tried building the image for STM32MP157A-DK1 but i facing the error ERROR: icu-66.1-r0 do_compile: oe_runmake failed during build. attached build log.i tried to resolve with the command "bitbake -c cleanall icu-native" and build still it fails. if i separately build "bitbake icu-native" it build fine but if i run command bitbake st-image-westonthe error comes up.
Hi, Everybody! Could anyone help with correct device tree for qspi-nand flash. I can't see any activity on pins connected to flash. If I try to boot from spi-nand with BOOT0..2 set to 1, I can see clear SPI transactions... So, flash connection looks correct.Flash type is MT29F1G01ABAFDWBConnected to following pins:PF10 - CLKPB6 - NCSPF8 - IO0PF9 - IO1PF7 - IO2PF6 - IO3TF-a device tree:pinctrl node: qspi_bk1_pins_a: qspi-bk1-0 { pins1 { pinmux = <STM32_PINMUX('F', 8, AF10)>, /* QSPI_BK1_IO0 */ <STM32_PINMUX('F', 9, AF10)>, /* QSPI_BK1_IO1 */ <STM32_PINMUX('F', 7, AF9)>, /* QSPI_BK1_IO2 */ <STM32_PINMUX('F', 6, AF9)>; /* QSPI_BK1_IO3 */ bias-disable; drive-push-pull; slew-rate = <1>; }; pins2 { pinmux = <STM32_PINMUX('B', 6, AF10)>; /* QSPI_BK1_NCS */ bias-pull-up; drive-push-pull; slew-rat
I would like to run Azure RTOS application on Cortex-M of STM32MP1 SOC. Is Azure RTOS available for Cortex-M of STM32MP1 devices? any example code?
Hello everyone, i want to onfigure my stm machine on yocto using the meta-st layer:i want to make two root partitions on the sd card (since i'm using the stm32mp157c-dk2)the root partitions i need to integrate rauc updater in my machine.since i installed rauc the generated st-image-weston won't boot anymore. And i think it's because of the root partitions. (rauc uses two partitions to installl an update on the first one and boot from the second one).Please help me. Thank you
I'm connecting a X-NUCLEO-PLC01A1 with my DK2 card. The Inputs are working fine and for the outputs I can read the fault status , I'm getting 0000 0000 1000 0101, then all is right, the 3 error leds are off, and the OE signal is in 0 (I tested also with OE = 1); but I not getting anything in the outputs. I can see in the diagram that one of the leds is named PG (Power good) but it's off. I connected the GND / 24V to the left of the input connector. The led turns flash when I power on/off the system.Then I have two problems, the PG led and the outputs.I appreciate any insights Thanks
Hello,I'm trying to define some GPIOs as simple input/output for STM32MP157. I'm using the STM32CubeMX tool, but I can't find where to assign the GPIOs to A7 or M4. In the pinout view, I correctly set them as input/output but when I generate the code, I don't find their definition, nor in the device tree .dts, neither in the m4 code (only clock enable is present).Thanks
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We are having issues with STM32MP157 UART7 (address 40018000) exiting low power CStop mode and waking up Linux (v4.19 from ST github).We have confirmed that CStop mode is entered, and it can be exited using an external interrupt (55 pmic_irq), however it does not exit CStop mode with UART7 RX.The stm32mp175c.dtsi defines uart7 interrupts as GIC interrupt 82 and EXTI interrupt 32, and defines the uart as a wakeup source uart7: serial@40018000 { ... interrupt-names = "event", "wakeup"; interrupts-extended = <&intc GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>, <&exti 32 1>; ... wakeup-sou
I would like to understand why I cannot find and enable STM32 SPI support in the Linux kernel and resolve conflicting information in the Wiki articles I am using.When I use menuconfig, I cannot locate STM32 SPI support in the menu. If I use the search option (/) I can see the reasons are that SPI_STM32 depends on ARCH_STM32 which is set to [N]. In addition, ARCH_STM32 depends on ARM_SINGLE_ARMV7M which is also set to [N].Are there any other parameters I should be adding to the invocation of 'make menuconfig'?Any ideas why these variables are not set correctly and how to resolve the issue?I suspected something about my environment. I am using the Developer Package and running the following to setup the terminal environment:source /opt/st/stm32mp1/3.1-openstlinux-5.4-dunfell-mp1-20-06-24/environment-setup-cortexa7t2hf-neon-vfpv4-ostl-linux-gnueabiI have applied the patches and fragments and not had an issue building or running the kernel or adding a device tree change from the Cube code
I was trying to test the ADC of a STM32MP157C-DK2. I downloaded a basic example program to perform the data acquisition in the M4 processor (https://github.com/STMicroelectronics/STM32CubeMP1/tree/master/Projects/STM32MP157C-DK2/Examples/ADC/ADC_SingleConversion_TriggerTimer_DMA)The results that I'm having in the DMA buffer don't correspond with de DAC configuration guided by the USER1 button, getting values such as 0xfff or 0x800 instead of the values I'm expecting ( from 0 to maximum range in 4 steps as stated in the documentation) Should I connect some input to some output? The documentation doesn’t seem clear to me. It states that "If same pin is used no connection is required, it is done internally. Otherwise, user need to connect a wire between PA4 and PA4". I searched PA4 in the DK2 schematics with no luck. What could be the source of this behavior?
I apologize in advance as the question is really a basic and obvious one ... My custom board is using an STM32MP151 SoC.Is it possible to re-write programmed OTP bits (namely, OTP Word 3 for boot modes).My feeling is that, this is not possible (One Time Programming). A complementary question: I try to do a soft selection of the boot source (instead of dealing with hardware pins), so I thought about fusing the OTP word so that it'd start from SPI NAND by default, then force the Serial boot using the TAMP backup register 20 if needed.Does it makes sense ?Thanks,Jacques
Hello,I am using an stm32mp157c-dk2 and browsed the stm32mp1 workshop MOOC : https://www.st.com/content/st_com/en/support/learning/stm32-education/stm32-moocs/STM32MP1_workshop.htmlI tried launching the pre-configured VM given here : https://drive.google.com/drive/folders/1eHO37VljVpbTt-TBJFZ2-Yack5fZPj-vBut the updated archive files (OpenSTLinux-1.2, 2.0, etc.) are corrupted.This may be due to their extension (.7z.003 instead of .7z).Any way to fix this?Thanks.
Hello everyone,I'm currently working with a STM32MP157c. This microcontroller includes multiple timer peripherals (General-purpose timers / Advanced-control timers) and also ADC peripherals. Therefore it is possible to trigger the ADC conversion by a timer. This is working without any problems using the timer as PWM Generator following the instructions in https://wiki.st.com/stm32mpu/wiki/How_to_use_the_IIO_user_space_interface#How_to_set_up_a_TIM_or_LPTIM_trigger_using_the_sysfs_interface .When the Timer is used in PWM Capture Mode, I haven't managed to trigger an ADC conversion. My approach so far:1) Adjusting Device Tree as follows (according to https://wiki.st.com/stm32mpu/wiki/TIM_device_tree_configurationand https://wiki.st.com/stm32mpu/wiki/ADC_device_tree_configuration) :[...] &adc{ pinctrl-names = "default", "sleep"; pinctrl-0 = <&adc_pins_mx>; pinctrl-1 = <&adc_sleep_pins_mx>; status = "okay"; vdd-supply = <&vdd>; vdda-suppl
Hello, I'm trying to create the Distribution package for my STM32MP157D-DK1. When I first installed and ran, it said it was running, It stayed that way for the afternoon. I let it 'run' overnight to the same line. I ^C'd out of it. Since then I get this (I just gave the last try)NOTE: Retrying server connection (#7)... (Traceback (most recent call last): File "/mnt/c/projects/Distribution-Package/openstlinux-5.10-dunfell-mp1-21-03-31/layers/openembedded-core/bitbake/lib/bb/main.py", line 438, in setup_bitbake server = bb.server.process.BitBakeServer(lock, sockname, configuration, featureset) File "/mnt/c/projects/Distribution-Package/openstlinux-5.10-dunfell-mp1-21-03-31/layers/openembedded-core/bitbake/lib/bb/server/process.py", line 407, in __init__ self.sock.bind(os.path.basename(sockname))OSError: [Errno 95] Operation not supported)WARNING: /mnt/c/projects/Distribution-Package/openstlinux-5.10-dunfell-mp1-21-03-31/layers/openembedded-core/bitbake/lib
I want to know how to use ta to get the startup log information during the bl32 startup phase or if there is another way to store the log information so that I can get it in the bl32 phase
Hello,we are bringing-up our custom STM32MP157AAB3 board and we are facing some errors in linux with the uSD that it's connected to the SDMMC1 interface.Here follows our setup:HWSDMMC1 cabled to a uSD connector, PE9 used as card detectSDMMC2 cabled to a 4GB eMMCSDMMC3 cabled to a custom connector (mainly for WiFi modules)SWOpenSTLinux-2.1.0Custom devicetree created starting from STM32CubeMX tool with USER CODE derived from EVKs dtstf-a and u-boot are read via SDMMC1kernel is loaded via tftpRFS is mounted via NFSWhen we insert the uSD card the kernel periodically prints this error:[ 134.448880] mmci-pl18x 58005000.sdmmc: error -110 requesting statushowever the device is usable.Using several uSD cards (of different manufacturers) we see that some are detected at the insertion and the volumes are automatically mounted, some are detected (the kernel creates the devices) but non other actions are performed (trying to manually mount the volumes stucks the tool), some other are not even detec
Hello,I am going through building the base Android Distro for use in the STM32MP1 Discovery board, when I go to call the disco i.e. lunch aosp_disco-eng I get the error listed in the question.When I call lunch aosp_eval-eng then I get no error and we begin building. Do I need to custom generate a make file for the discovery board of the STM32MP1? Or am I forgetting to download a file?Best regards and thank you for assisting with this!Oscar
Hi!During loading flash_layout image to custom STM32MP1 I've got following error after staring u-boot and truing to load information to partition 0x04 fsbl1:U-Boot 2020.01-stm32mp-r1 (Jan 06 2020 - 20:56:31 +0000)CPU: STM32MP157DAB Rev.ZModel: STMicroelectronics STM32MP157A-DK1 STM32CubeMX boardBoard: stm32mp1 in trusted mode (st,stm32mp157a-stm32mp151-dk1-mx)DRAM: 512 MiBClocks:- MPU : 650 MHz- MCU : 208.878 MHz- AXI : 266.500 MHz- PER : 24 MHz- DDR : 533 MHzFastboot key pressed, STM32Programmer key pressed, entering download mode...WDT: Started with servicing (32s timeout)NAND: 0 MiBMMC: STM32 SD/MMC: 0In: serialOut: serialErr: serialinvalid MAC address in OTP 00:00:00:00:00:00stm32 vrefbuf timed out: -110adc@0: can't enable vdd-supply!board_check_usb_power: single shot failed for adc@0[18]!Net: No ethernet found.Hit any key to stop autoboot: 0Boot over usb0!Error: fsbl1 (0x4): invalid address 0x4400 (mi
Hi!Could you please give me exact details of following eth PHY error:[ 95.822137] stm32-dwmac 5800a000.ethernet eth0: no phy at addr -1[ 95.826911] stm32-dwmac 5800a000.ethernet eth0: stmmac_open: Cannot attach to PHY (error: -19)Why it searches addr -1?I'm using LAN8720 PHY on custom board. Here is kernel device tree: eth1_pins_mx: eth1_mx-0 { pins1 { pinmux = <STM32_PINMUX('A', 1, AF11)>, // ETH1_RX_CLK ** <STM32_PINMUX('A', 7, AF11)>, // ETH1_RX_CTL ** <STM32_PINMUX('C', 4, AF11)>, // ETH1_RXD0 <STM32_PINMUX('C', 5, AF11)>; // ETH1_RXD1 bias-disable; }; pins2 { pinmux = <STM32_PINMUX('A', 2, AF11)>; // ETH1_MDIO bias-disable; drive-push-pull; slew-rate = <0>; }; pins3 { pinmux = <STM32_PINMUX('B', 11, AF11)>, // ETH1_TX_CTL <STM32_PINMUX('C', 1, AF11)>, // ETH1_MDC /// <STM32_PINMUX('C', 2, AF11)>, /
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