STM32 MCUs Security

Hi everyone,We’re developing an IoT node for agricultural applications and plan to make it compliant with certification requirements (CE, CRA, RED).We’re using the X-CUBE-AZURE package as our starting point and want to use TF-M (Trusted Firmware-M) for security.We’re new to cybersecurity and TrustZone, so I’d like to ask the community:Which peripherals and parts of the application stack should be implemented on the secure side of TF-M in this case?In our design we have various interfaces: UART, I2C, SPI, Wi-Fi module, Digital I/O, Analog I/O, CANBus, Modbus, and SDI-12.Which of these should be configured as secure or non-secure, and which parts of the Azure IoT stack are typically expected to run in the secure vs non-secure world?Any practical examples or recommendations based on your experience with X-CUBE-AZURE and TF-M would be very helpful. Thanks in advance!

I’m working with a NUCLEO-H533RE board (STM32H5 series, TrustZone enabled) and using ST-LINK for debugging.Here is the issue:Debug Authentication succeeds (certificate-based).Immediately after, the tool disconnects and shows:Error: Unable to get core ID Error: Cannot connect to access port 1! If you are trying to connect to a device with TrustZone enabled please try to connect with HotPlug mode. If you are trying to connect to a device which supports Debug Authentication with certificate and password, please open your device using it.Log shows:SDMAuthenticate: Authentication successful Debug Authentication Success Disconnected from device. ST-LINK FW: V3J16M8 Board: NUCLEO-H533RE Voltage: 3.28VST-Link configuration:Port: SWDMode: HotPlugAccess Port: 0Reset Mode: Software ResetSWD Frequency: 8000 kHzShared: DisabledI've tried:HotPlug Mode as recommended for TrustZone.Debug Authentication with valid certificate and key.ST-Link firmware is up to date.Still, after authentication, I cannot

 Hello,My device contains both a bootloader and an application. I’m currently trying to protect the bootloader using PCROP on the STM32G0B1.As a first approach, I attempted to configure PCROP using STM32CubeProgrammer. However, this failed — once PCROP was activated for the bootloader region, the bootloader was unexpectedly erased.Here’s what I did:Flashed the bootloader to address range 0x08000000–0x0800BFFF.Activated PCROP by setting the start and end addresses for the bootloader region (see screenshot below). After this, the bootloader was erased.Even when I deactivated PCROP_END, the result remained the same — the bootloader was still erased.I would greatly appreciate any insights into why this is happening and how to properly activate PCROP without losing the bootloader.Best regards,Alexander     

Hi ST team,I am using STM32U5G9 as secondary MCU. It has simple firmware upgrade feature. It would be reset by main MCU and enter system memory bootloader using Boot0 pin. The system memory bootloader would receive upgrade image (application) from main MCU by USART and write the image into internal flash. (AN3155 and AN2606)This method is simple but it does not have any sercrity feature. I would like to ask if I could add MCUBoot and secure boot into this method with minimum effort?1. System memory bootloader would receive signed image (application) from main MCU and write it into non-secure area.2. Exit system memory bootloader and enter secure boot3. Secure boot verifies the authenticity and integrity of the application.4. Execute the application.Is this possible? 

Hi.During production, we use USB to test the board. Finally, the MCU is supposed to be password-protected against flash reads. Unfortunately, it turns out that as long as the USB cable is connected, it's impossible to program the OBK. Segger Device Provisioner returns an "Error writing OBK". Using STLink and CubeProgrammer also doesn't work. After disconnecting the USB, changing the state to Closed works. BOOT0 is connected to ground. Is there a solution?Artur

Hi, I have a doubt. I made some changes in the secure bootloader to achieve certain functionality, but I am unsure whether the code in the secure bootloader is developed by ST (such as drivers or APIs), or if it is intended for user modifications. Specifically, I modified the sfu_interface_crypto_scheme.c file to achieve my functionality.As far as I understand, apart from the Secure Engine project and the we can't modify Bootloader project HAL and LL APIs, CMSIS APIs, and middleware like Secure Engine, KMS, and Crypto. Please correct me if I am wrong.For reference, I am using the STM32WLE5CC controller.

Hi Team, I am working on project where we are implementing Secure upgrade feature using SBSFU package, we followed the steps as mentioned by ST community and to integrate SBSFU in our project. we have two modes Debug mode and Release mode.in Debug Mode: below Protection flags are disable#define SFU_WRP_PROTECT_ENABLE#define SFU_RDP_PROTECT_ENABLE#define SFU_TAMPER_PROTECT_ENABLE #define SFU_DAP_PROTECT_ENABLEand bootloader and application are working fine. we can see the software upgrade is happening. In Release mode:all above Protection flags are enable. bootloader is not working I think it is not coming up properly.I can see through STMCubeprogrammer the protection changes applied to flash.worst part is, I couldn't debug bootloader code.it would be great somebody help me in building SBSFU in Release mode.Thanks in Advance. 

Hello,In a project with STM32 using SBSFU in a U575 microcontroller, why can a local variable of type structure within a function cause failures or unexpected behaviour in the secure zone, while a global variable of the same type works correctly?

Section 6.1 of AN5056 (for X-CUBE-SBSFU) states that the projects are delivered with the highest level of compiler optimizations turned on for size aspects.If the Optimization Level was set to 'None', then how much larger is the generated code expected to grow for the mapped regions (SE, SBSFU, etc.) excluding the image regions? (% increase in general)Which of the regions will be impacted the most?Update: To aid debug via IAR EWARM, I prefer to develop without any optimizations enabled, understanding that the code output size will be larger. I have no issues if the mappings are allowed to be adjusted to accommodate the larger code outputs.

Hello , I am trying to calculate a MAC using `cmox_mac_compute()` from this lib on an STM32L562 in the Secure code.The code looks like this :auto r = cmox_initialize(NULL); /*default template with stm32l5xx.h included*/ auto ret = cmox_mac_compute(CMOX_CMAC_AES_ALGO, in, in_s, key, 16, NULL, 0, out, 16, NULL);This exact code works when run on non secure mode if everything is set as non secure in stm32CubeMX.I tried to debug the library to understand what was wrong and found out that the issue comes from the fact that cmox_mac_compute tries to access my crc peripheral from 0x40023000 instead of 0x50023000 (CRC non secure and secure addresses).I am also almost sure that my GTZ and SAU are correctly set because i was able to write at address 0x50023000 and not at 0x40023000 when running from Secure code.I also have :CRC_BASE_S => 0x50023000 CRC_BASE_NS => 0x40023000 CRC_BASE => 0x50023000So this looks fine. I also tried to forcefuly set CRC_BASE_NS to

Hello! I want to implement secure boot / secure firmware install on my STM32u5A9 custom board. I am starting by trying to modify the SBSFU example code from B-U585I-IOT02A example project to run on my board. I followed the instructions in the README to tailor the project for STM32U5A9. I also made the following changes:My debug terminal is connected to UART5 so I modified the com.h file (attached snippet below)I also changed TFM_TAMPER_ENABLE in boot_hal_cfg.h to NO_TAMPER as I was initially having trouble with that engaging during my testing.I uncommented the MCUBOOT_EXT_LOADER in Linker/flash_layout.h as our custom board has an external flash chip but its pinout is different than the standard dev boards and I have not gotten any of my attempts at a custom loader to work. I’m trying to get secure boot working without an external loader first.Running SBSFU_Update.sh (as is from the B-U585I-IOT02A project)  results in successful programming and verification of sbsfu_app_init.b

We have an application running on an STM32WB55M. This user application makes use of standby mode, and the device is able to exit it when the configured pin changes state.However, once the SBSFU is integrated with the BLE_ota application, the user application works correctly, we can perform OTA updates, but when entering standby mode, the device does not wake up/resets.In another different product, where standby mode is not used, everything operates correctly.What could be causing the system not to exit standby mode when the SBSFU is integrated? I know the system restarts upon exiting standby mode, do I need to configure something before entering standby mode? (Restarting the application with the 'NVIC_SystemReset' function, as I do when entering OTA mode, works correctly).Thank you in advance.

Hello,STSELib development is under progressToday (version 1.1.4), STSELib uses some services from STM32_Cryptographic library instead of interfacing STSAFE-A120 component (for example HKDF)Is there any development planning for STSELib giving availability of next versions and their content ?Thx

hello, I'm run a STM32H573DK in OEMiROT example.but following errors occured.[INF] TAMPER Activated[INF] BANK 1 secure flash [0, 15] : OB [0, 14][ERR] Unexpected value for secure flash protection so, I find why occurred this error.  In the ob_flash_programming.bat file, sec1_end was set to 0x0E. but In the code end value is set to 0x0F end = (S_IMAGE_PRIMARY_PARTITION_OFFSET + FLASH_S_PARTITION_SIZE - 1) / PAGE_SIZE;( end = 0x1E000 / 0x2000 = 0x0F ) what is correct? what do i fix?  ps. I'm using STM32Cube_FW_H5_V1.1.1 

Hello @Jocelyn RICARD ,I’m integrating SBSFU v2.7.0 on an STM32WB55 to enable secure OTA firmware updates. I’m hitting a problem where the runtime hash verification fails: the hash computed by SBSFU at boot does not match the hash in the image header, so the image is erased.I dump the decrypted bytes in RAM (before programming) over LPUART and convert them to a binary for comparison with the build output. Assuming the dump/conversion are correct, the streams match up to ~60 KiB, then diverge consistently until the end of the file. This suggests the symmetric key is correct and the early pipeline is fine, but later bytes are corrupted before or during the decrypt-in-place / program sequence.Here is how printing every decrypted chunk within DecryptImageInPlace function:For context, I'm using:Internal MCU flashSingle-bank (no swap/rollback)OTA via ST BLE Sensor appProtections temporarily disabled for debugging; verbose logs enabledWhat worksRan 1_Image example on NUCLEO-WB55RG succes

 Hello everyone,I am working with the STM32H7B3-DK and evaluating the SBSFU package with a dual image slot configuration using SECBOOT_ECCDSA_WITH_AES128_CBC_SHA256. I have a few questions and kindly request your guidance:Please confirm if we can load sbsfu.bin or sbsfu.out via USART with BOOT0 = 1 and then program UserApp.sfb via the secure bootloader (BOOT0 = 0). Do we need a header bin? If yes, how can we merge only sbsfu.bin and the header bin while excluding UserApp.bin?With RDP Level 2 set, is it still possible to update UserApp.sfb via USART when BOOT0 = 0?Can SFU_SECURE_USER_PROTECT_ENABLE be enabled or disabled during development, and can reprogramming still be done via USART or SWD outside development mode?During development, can we disable all security IPs, load sbsfu_userapp.bin, and later enable protections over USART followed by a power cycle? Is this workflow possible?If RDP Level 1 is configured, can option bytes and protections (PCROP, secure user area) be reset v

Hello,I’m working on STM32H7 firmware using the STM32 Cryptographic Library (CryptoLib) for firmware decryption.I have the following scenario:Firmware is encrypted with AES128-GCM.Integrity and authenticity are verified separately using ECDSA + SHA-256.I want to decrypt firmware using AES-GCM in counter mode (CTR) without relying on the GCM authentication tag.My questions are:Does AES-GCM in STM32 CryptoLib support CTR-only operation, bypassing the Galois-field authentication step?If not, is there a recommended way to perform AES-CTR decryption using CryptoLib on STM32H7 without tag verification?Are there any known limitations or caveats when skipping GCM tag verification in STM32H7 CryptoLib?Thanks in advance for guidance.@Jocelyn RICARD @Fred 

To secure USB against unauthorized usage while maintaining regular operation, implement authentication and encryption for all USB communication, ensuring only authorized devices or users can access the interface for parameter and log management, open-source information, and updates.1. how to enable and disable the stm32 for booting using a debug probe / stm32 flasher from unauthorized access2. How to enable and disable the USB access from Unauthorized access3. Even after locking also authorized user can read and write in the stm32we can do it manually by setting the RDB for read access and WRP for write access but we want it to do it at runtime in software.    

Hi All,  Does anyone know how to enable the MCO2(PC9) output after secure manager enabled? its work in project without secure manager and it could be enabled in systemClock config function as below:  ,but it's not work any more after secure manager on,and we could not call system clock config any more(the demo in repository v1.5.0 are calling).Summarize:1.How to enable MCO2 output in non-secure application;2. It seems after trustzone enabled, rcc would not work in non-secure side, is the demo on repository right or not(call system clock config)? Thanks!  

Hi,I am trying to send encrypted data between a C# application and STM32 in AES GCM mode.Currently, I am only doing encryption of a known test vector.Key and IV are both all zeros.AAD length is 0.My testvector is: 00 00 00 00 00 01 00 00 00 00 00 00 00 00 42 49Using the code below, I get the same ciphertext in both applications:03 88 DA CE 60 B7 A3 92 F3 28 C2 B9 71 B2 BC 31 But the tag never matches.I suspect there is something wrong in the final stage, where the tag is calculated.void AesTest() { uint8 iv[12]; uint8 plainText[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x42, 0x49 }; uint8 header[0]; uint8 cipherText[sizeof(plainText)]; uint8 authTag[16]; memset(iv, 0, sizeof(iv)); uart_printf("ENCRYPT\r\n"); if (!AesEncryptGcm(iv, header, sizeof(header), plainText, sizeof(plainText), cipherText, authTag)) return; } bool AesEncryptGcm(const uint8 *iv, const uint8 *header, uint8 headerLen, const uint8 *plainText, uint16

Dear,For a given HDPL, how many 256-bit AHKs (Application Hardware Keys) can be stored in the option byte keys?And how many of those are:only usable by SAES?usable by software?The reference manual states the following:5.2 FLASH main features:"Up to 1 Kbyte of protected non-volatile option byte keys, readable either by software orusable as a secret AES key through SAES peripheral (as AHK keys)"It is unclear whether this is for just one HDPL, or whether this is a grand total comprising all three HDPLs that support option byte key storage (HDPL0, HDPL1, HDPL2).Suppose it is for just one HDPL, then this would be able to store 32 (= 1 K byte * (8 bit / byte) / 256 bit) 256-bit AHKs. This seems to be a reasonable assumption since if it were for all three HDPLs, this number would have to be divisible by 3, which it is not (32/3 = ~10.667).5.9.18 FLASH option byte key control register (FLASH_OBKCR):"OBKSIZE[1:0]: Option byte key sizeApplication must use this bitfield to specify

How can the debug interface on the STM32H573 be permanently locked via nonvolatile configuration or fuse?The SBS chapter of the manual saysThe debug configuration can be locked thanks to DBGCFG_LOCK in SBS_DBGLOCKR.SBS_DBGCR is then no longer writable.When DBGCFG_LOCK is set to 1, it can be reset only by system or power-on reset.So SBS_DBGLOCKR is not what I want, as it is not permanent.The manual refers to PRODUCT_STATE in several places. The "SBS Signals" table in the manual says that the sbs_product_state signal comes from Flash memory:Signal based on PRODUCT_STATE option byte to activate the different securitymechanisms depending on the product use. Expected values are described inSection 7: Embedded flash memory (FLASH).However, there is no mention of this signal in Section 7. What is the Flash programming procedure to change sbs_product_state?

Hello,We are working on an STM32F469/79-based device that uses SBSFU, which we are seeking to modify to use the STSAFE-A120 to perform the authentication and decryption algorithms.Section 2.7 of the STSAFE-A120 datasheet includes that the STSAFE-A120 supports the following symmetric ciphers for encryption and decryption.AES in CCM*/CTR modeAES in CBC modeAES in ECB modeAES in GCM/GMAC modeSection 4.7 of the STSAFE-A120 datasheet includes that the STSAFE-A120 supports symmetric decryption by chunks via the "Start decrypt", "Process decrypt", and "Finish decrypt" commands.We planned to use X-CUBE-STSE01 (v1.0.0) to interface with the STSAFE-A120. However, we were surprised to see that AES-CBC decryption does not seem to supported. This prevents us from using the STSAFE-A120 with SBSFU crypto scheme "SECBOOT_ECCDSA_WITH_AES128_CBC_SHA256". X-CUBE-STSE01 seems to also lack support for AES-GCM decryption by chunks. This prevents us from using the STSAFE-A120 with SBSFU crypto

If, like me, you are attempting to use this device and believe there are gaps in the information available, you are correct. However, the information you seek, plus additional advice and assistance is available from ST, you simply have to ask via a ticket on ST.COM. I will update this post when I have completed my project.

What is the meaning of the FLASH_OBKCR.NEXTKL field while executing within HDPL_0 (e.g., during execution of ST RSS)?This question might seem irrelevant to me as I'm a user and user code will never execute within HDPL_0, but it might be important from a threat modeling point of view: does ST (by means of its RSS code) have access to HDPL_x user-provisioned AHKs (Application Hardware Keys) where x >= 1?The reference manual states the following:5.9.18 FLASH option byte key control register (FLASH_OBKCR)"NEXTKL[1:0]: Next key level00: OBKINDEX represents the index of the option byte key stored for the hide protection levelindicated in SBS_HDPLSR.01: OBKINDEX represents the index of the option byte key stored for the hide protection levelindicated in SBS_HDPLSR plus one (e.g. if HDPL=1 in SBS_HDPLR the key of level 2 isselected).10 or 11: reserved"Does this mean ST RSS (HDPL_0) can access:HDPL_0 AHKs (when NEXTKL=00)HDPL_1 AHKs (when NEXTKL=01)but not:HDPL_2 AHKs (no applicable NEXTKL v