Solved
Simple Multicore Core to Core Communication with STM32H7
Hello Team,
how can a simple core to core communication on the STM32H7 be implemented? We want to exchange 2kByte of data in bidirectional way between CM7 and CM4.
Best regards,
Jochen
Or just create a shared memory region common to the two cores on each Core's linker. But you need to ensure at least two things:
- Synchronization of read and write operation between the two cores using HSEM to ensure the consistency of the data.
- Either to manage the data coherency from CM7 side when Cache is enabled or declare that region as Strongly-Ordered or Device (non cacheable) using MPU.
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