STM32 MCUs Embedded software

Post edited by ST moderator to be inline with the community rules especially with the code sharing. In next time please use </> button to paste your code. Please read this post: How to insert source code Hello   We would like to inquire whether the STM32N6570-DK board and the NUCLEO-N657X0-Q board support Ethernet TSN (Time-Sensitive Networking). Additionally, we would like to know if there are any STM-provided drivers or libraries for Ethernet TSN for these boards. If such resources are available, we would appreciate it if you could share them with us. Currently, we are working on Ethernet transmit and receive functionality on the NUCLEO-N657X0-Q board using the driver generated from STM32CubeMX. However, we are encountering a HardFault when attempting to transmit in interrupt mode. The code execution jumps to the HardFault handler at the following segment in ETH_Prepare_Tx_Descriptors: if

I have a project which can pass the flash test while starting address is at 0x08000000. After changing the starting address to 0x08008000, the flash test failed. I have made the following changes: 1. main.c  // #define TEST_ROM_START_ADDR 0x08000000U #define TEST_ROM_START_ADDR 0x08008000U 2. system_stm32f4xx.c #define USER_VECT_TAB_ADDRESS #if defined(USER_VECT_TAB_ADDRESS) /*!< Uncomment the following line if you need to relocate your vector Table in Sram else user remap will be done in Flash. */ /* #define VECT_TAB_SRAM */ #if defined(VECT_TAB_SRAM) #define VECT_TAB_BASE_ADDRESS SRAM_BASE /*!< Vector Table base address field. This value must be a multiple of 0x200. */ #define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field. This value must be a multiple of 0x200. */ #else #define VECT_TAB_BASE_ADDRESS FLASH_BASE /*!< Vector Table base address field. This value must be a multiple of 0x200. */ //#define VECT_TAB_OFFSET 0x00000000U /*!< Vector T

I am trying to convert the G491re openbootloader example to the F413 mcu. I take it that everything that needs to changed is in the openbootloader_conf.h  file. I believe I have the correct map configuration as shown below, but I am confused as how I figure out how to define the parameters at lines 74 and beyond. Are those just command codes? Also, how does the bootloader know there is only 1 bank instead of 2 like in the example?/** ****************************************************************************** * @file openbootloader_conf.h * @author MCD Application Team * @brief Contains Open Bootloader configuration ****************************************************************************** * @attention * * Copyright (c) 2019 STMicroelectronics. * All rights reserved. * * This software is licensed under terms that can be found in the LICENSE file * in the root directory of this software component. * If no LICENSE file comes with this software, it i

Hi there.I’m trying to generate a 12 ns pulse for a time-of-flight (ToF) application.I’m using an STM32U5 microcontroller, and I’d like to know whether one of the general-purpose timers (TIM2/TIM3/TIM4/TIM5) can produce a pulse that narrow. With a 160 MHz timer clock, the time resolution is about 6 ns, so in principle it seems feasible, but I may be overlooking something.Thanks!

  I’m using the Class B Flash self‑test on an STM32F407. My post‑build step injects CRCs with: STM32_Programmer_CLI -sl Firmware.elf 0x08000000 0x08100000 0x400   I Inspected the CRC of the first section via arm-none-eabi-objdump -s -j "CRCs area" Firmware.elf | head -n2 After this I re‑computed the CRC to verify which method it used. I used srec_cat and I used the following method: arm-none-eabi-objcopy -O binary Firmware.elf full_flash.bin dd if=full_flash.bin of=region.bin bs=1 count=1024 srec_cat region.bin -Binary \ -CRC32_Little_Endian 0x400 \ -crop 0x400 0x404 \ -output - -binary \ | hexdump -e '1/4 "CRC32: 0x%08X\n"' After this I figured out that the CRC checksum stored in the memory for the first 0x400 section matched with the srec_cat output.   However at runtime, when STL_SCH_RunFlashTM() (compiled with both -DSTL_SW_CRC and without it) computes the CRC over the exact same 0x400 bytes which is different than the expected value. As a result,&n

Hello everyone. This is my first post so pardon me if I do something wrong.  I have a custom made board with STM32H7S7 MCU and external NOR Flash. Since it is some cheap chinese IC from LCSC I had to make my own External Loader. I didn't use the generated ExtMemLoader project from CubeIDE because it seemed too complex, was hard to understand how it works and mainly it didn't worked at all. I made the external loader with help of some YouTube videos and forum posts. Writing, reading and sector erasing works fine (though I have a problem to erase more than one sector at once) but only if I pull the BOOT0 pin HIGH, so my undestanding is that when BOOT0 is LOW the code in internal flash is executed and intializes the system and some peripherlas so if external loader tries to do the same then some conflict occurs. I have a limited options when debugging the external loader (I am using LED blinking to signalize at which part it breaks) but I found out the code execution won't get p

Hi everyone. I am relatively new to working with STM32 devices, and I am currently attempting to design a USB microphone with an analog input using the Nucleo-L476RG development board in combination with the X-NUCLEO-CCA02M2 USB audio expansion board. To configure the system parameters in STM32CubeIDE, I followed the procedure described at the following reference: STM32F4 USB microphone | Details | Hackaday.io. Using this configuration, the computer successfully recognizes the device as a USB microphone; however, no audio data is being transmitted. I have attached the relevant configuration files—usbd_audio.c, usbd_audio.h, and main.c—in case someone might help identify any mistakes or oversights in my implementation. The analog signal is acquired through a single ADC channel using DMA with interrupt callbacks. The USB audio streaming is configured for a sampling rate of 48 kHz, and Timer 8 is used to trigger the ADC conversions. Any assistance or guidance would be greatly appreciated.

Dear allI have a complex Flash problem. But even with NUCLEO-C092RC Board and the provided FLASH_EraseProgram example I have Flash erase and/or program problems.I adapted the original provided ST code a litte to get more information of the problem with the on board LED's.This is the code I changed: (all the rest is 100% original code)Problem description (with Keil uVision):/** * @brief The application entry point. * @retval int */ int main(void) { /* USER CODE BEGIN 1 */ /* STM32C0xx HAL library initialization: - Configure the Flash prefetch - Systick timer is configured by default as source of time base, but user can eventually implement his proper time base source (a general purpose timer for example or other time source), keeping in mind that Time base duration should be kept 1ms since PPP_TIMEOUT_VALUEs are defined and handled in milliseconds basis. - Low Level Initialization */ /* USER CODE END 1 */ /* MCU Configuration------------------------------

Hi there,Chip: STM32L053R8TxI've encountered an issue where the code generated in tsl_user.h at the "/* Channel IOs definition */" is incorrect and does not match the chosen settings in the .ioc.In TOUCHSENSING in the .ioc, with TSLPRM_TOTAL_TOUCHKEYS_B set to 8 (one key per sampling capacitor), the first three #define lines in the above section in tsl_user.h is incorrect. It would appear that these lines are hardcoded and unaffected by the code generator. I used the following settings in the .iocIO_TOUCHKEY_B1 is set to G5_IO4IO_TOUCHKEY_B2 is set to G7_IO4IO_TOUCHKEY_B3 is set to G1_IO2IO_TOUCHKEY_B4 is set to G2_IO4IO_TOUCHKEY_B5 is set to G3_IO3IO_TOUCHKEY_B6 is set to G6_IO4IO_TOUCHKEY_B7 is set to G8_IO3IO_TOUCHKEY_B8 is set to G4_IO3...and with these settings, the following code was generated:/* Channel IOs definition */ #define CHANNEL_0_IO_MSK (TSC_GROUP1_IO2) #define CHANNEL_0_GRP_MSK (TSC_GROUP1) #define CHANNEL_0_SRC (TSC_GROUP1_IDX) /* Index in source register (TSC->IOG

Hi, i'm trying to make a firmware that can read an SD card with filex but that can also connect that SD card to USBX MSC device (no simultaney). i'm able to do the two functionality in two separate firmware, but the problem is to merge. for now is sufficient that the card is read at start up and next i can see the SD card with USBX MSC devicewhen i can do that the firmware shall evolve to connect the SD card to USBX MSC and after a modification by PC disconnect the SD card the time necessary to see if something is changed and do stuff unfortunately the first step is totally ok, at startUp i can read the SDcard with  FILEX but.. after that USBX wont work i'm using a threadX flag to indicate at the USB that is possible to use the SD card, there is some example about myu goal?i will attach to this message the relevant files.. thank you in advance for any hint. best reguards 

Hi, I’m working on an STM32G491 MCU and facing an issue with GPIO PB9.In my project, I initialize PB9 as a digital output and try to set it HIGH, but the pin always stays LOW on the board.However, if I configure PB9 as input and toggle the pin externally in the same circuit, I can read HIGH and LOW correctly.Why would PB9 not go HIGH when configured as output? What could be the possible reasons or things to check?

Hello ST Team,I am using an STM32H755ZIT6 where CM7 handles a high-speed Quad-SPI flash interface with 100Mhz and UART communication with flow control 115200 baud.The same firmware runs on two hardware revisions:Revision V2: Works perfectlyRevision V3: Same firmware → occasional failure in UART frame processingThe QSPI itself receives data correctly (verified with CRC), but the “end of frame” indication is occasionally not processed.Observed Firmware Behavior1. Using RTOS Event Flags (original implementation)In the UART receive callback, when “end of frame” (EOF) is detected, we set an RTOS event flag:  osEventFlagsSet(dataReceiveEvent, DataReceived);Problem on V3:Sometimes the event flag is not triggeredEven though all received bytes are correctCRC validation passesThe callback executes, but the main task does not wakeThis leads to missed packets even though the data is fully received.2. Switching to Polling Loop (temporary workaround)We replaced the RTOS event flag with a s

Hello Everyone,I designed pcb while to use STM32H723VGT6. I used an Ethernet phy called DP83848 to communicate via Ethernet.I have previously used this Ethernet phy with F4 series processors and communicated via Ethernet without any problems. I am using CubeIDE version 1.18.0. I make the settings from CubeIDE as follows.I am setting RMII mode in ETH from connectivity. I am changing MAC address and i am enabling ethernet global interrupt from NVIC.I am enabling LWIP from Middleware and software Packs. I am disabling DHCP Module and i am setting IP and Subnetmask from general settings. Then I set my phy from platform settings. Only LAN8742 appears in the list.I build the code by selecting this Phy.Then I add the dp83848.c and .h files that I generated for the F4 series to my own project. In ethernetif.c, I replace everything related to LAN8742 with DP83848 functions. All of the functions have the same name. I build the code and no problems occured during the build.I uploaded th

stack:Zephyr on stm32n6 (nucleo_n657x0_q)When sending a buffer over sai via i2s_write data is written into the buffer.I expected the TX buffer to be treated as read-only and remain unchanged by the driver.It's only ever the first 2 numbers.Why is that?  Example code:int16_t tx_block_test[96] = {0}; In attachment a minimal version of a project that displays this issue.

Hi everyone, I'm encountering an issue with the STM32H747 dual-core MCU during the transition from bootloader to application. Here's a summary of the setup and observed behavior: Setup: Bootloader (CM7 core): When the BCM4 option byte is enabled, the CM4 core starts as expected. Application (CM7 core): After the bootloader jumps to the CM7 application, the CM4 core stops responding. What We have Tried : Manual CM4 Enable in Application Disabled CM4 in option bytes. Attempted to enable CM4 manually in the CM7 application:                  SYSCFG->UR1 = (1 << 0); // Set BCM4 = 1                   RCC->GCR |= (1 << 3);   // Set BOOT_C2 = 1 Result: System hangs. Recovery requires setting BOOT pin = 1, flash erase, and reprogramming. The issue seems to be with SYSCFG->UR1 = (1 << 0)       2. Option Byte Update via Flash APIManual CM4 Enable in

I'm going to use the STEVAL-MIC008A Dual MP23DB01HP MEMS daughter board with the STM32N6570-DK (by connecting to CN5). I looked at the STM32N6570-DK example project MDF_AudioRecorder and noticed that for using on board MIC (only one micophone) it uses instance0 (MDF1_SDIO, Pin PE8) with the following configuration:Bitstream Matrix: Falling frontInterleaved mode: No (which makes sense since it uses only one MEMS microphone)Since the STEVAL-MIC008A includes two microphones that share the same data and clock lines, can I still use instance 0 to receive interleaved data (left and right channels) from the STEVAL-MIC008A, or do I need to enable instance 1 as well? 

Hi all,Is there documentation that shows the ThreadX functions with an explanation of the function's parameter? and which are mandatory and which optional?This is an example of a simple function call generated by cubeMX: /* Create tx first thread. */ tx_thread_create(&tx_app_thread, "tx first thread", tx_first_thread_entry, 0, pointer, TX_APP_STACK_SIZE, TX_APP_THREAD_PRIO, TX_APP_THREAD_PREEMPTION_THRESHOLD, TX_APP_THREAD_TIME_SLICE, TX_APP_THREAD_AUTO_START) I can tell what some of the parameters are by looking at their name but not all of them. I read "Azure RTOS ThreadX User Guide" from Microsoft. I've looked at the STM32 wiki and the threadX documentation on github but I can't find a document just for the functions calls (threads, semaphore, queues, etc) and its parameters (even a summary would be good). Is there such a document? Thanks 

Hello, I am using the Zephyr operating system with the STM32U5G9J-DK2 hardware. I intend to collect voltage data using the ADC, but so far, no progress has been made. Here are the steps I have taken: I used the zephyr\samples\drivers\adc\adc_sequence example from Zephyr 4.2.0. I created a new app.overlay file in the root Vmakelists.txt directory with the following content: / { aliases { adc0 = &adc1; }; }; &vbat1 { status = "okay"; io-channels = < &adc1 5 >; };   I compiled using this command:west build -p always -b stm32u5g9j_dk2 --sysbuild . Then I supplied 1V to the PA0 pin (silkscreen labeled PWM/D6), and the log is as follows:     [16:22:28.487] RX←◆*** Booting Zephyr OS build v4.2.0 ***ADC sequence reading [0]: [16:22:29.493] RX←◆- adc@42028000, channel 5, 5 sequence samples: 2684 = 2162mV 1788 = 1440mV 1571 = 1265mV 1532 = 1234mV 1492 = 1202mV adc@42028000, channel 12, 5 sequence samples:

Hi, I'm on a applicaiton involving USBX MSC and FileX. The final memory for the application is a NOR flash so I also use LevelX.Acutally, I'm working on a nucleo-U575ZI-Q without NOR flash so I use NOR Simulator on LevelX.My problem is that a file created with FileX is detected by windows, have the right number of bytes but data are wrong.My program do this:1) FileX format the device2) FileX create the file STM32.TXT and put the data "This is FileX working on STM32". I can see this data on the RAM3) FileX close and open the file STM32.TXT and I can read the text4) FileX close the media.5) USBX open the media and on Windows I see the file STM32.TXT but data are not correct. It's like if this data comes from another part on my RAM.When the device is connected to a computer, I can create new file, write on it then unplug / plug USB and the new file is still here. I can also edit STM32.TXT.Has somebody an idea about why FileX can read right data but windows doesn't read

__LL_ADC_CALC_VREFANALOG_VOLTAGE macro presumes that VREFINT calibration value is from a 16-bit ADC. However, for STM32H723, the value I see (1522) is from 12-bit ADC conversion. So this macro returns incorrect value. On STM32H747, it works as expected (the value is 24074 which corresponds to 16-bit ADC value). I have not found any information about conversion width in the reference manual nor in the datasheet.#define __LL_ADC_CALC_VREFANALOG_VOLTAGE(__VREFINT_ADC_DATA__,\ __ADC_RESOLUTION__) \ (((uint32_t)(*VREFINT_CAL_ADDR) * VREFINT_CAL_VREF) \ / __LL_ADC_CONVERT_DATA_RESOLUTION((__VREFINT_ADC_DATA__), \ (__ADC_RESOLUTION__), \ LL_ADC_RESOLUTION_16B) \ )

Hi. How can I build the Demo FW initially running on NUCLEO-H563ZI ?The is a number of projects in Cube under STM32Cube_FW_H5_V1.5.0\Projects\NUCLEO-H563ZI but it is not clear which one is the factory used to initially program the board. Thanks.  

Hi, I am using an STM32N6570-DK running in XIP mode with XSPIM configured in multiplex mode.Setup:XSPIM in multiplex modeXSPI1 / XSPI2 → Port 2 → external flashXSPI3 → Port 1 → PSRAMXSPI2 memory-mapped at 0x70000000FSBL configures external flash and jumps to the application at 0x70100400(VTOR = 0x70100400, MSP = 0x34200000, PC = 0x7010BA01)Everything works correctly in direct XSPIM mode, but in multiplex mode the application HardFaults or hangs immediately after the FSBL jump.The faults occur during early HAL initialization (e.g., in HAL_MspInit() or MX_GPIO_Init()), specifically when executing functions such as: HAL_PWREx_EnableVddIO3();__HAL_RCC_GPIOO_CLK_ENABLE();HAL_RCCEx_PeriphCLKConfig();  If I comment out these lines, the application runs, but then I face issues whenever adding new peripherals (like UART).It seems that reinitializing power domains or clocks related to XSPI pins while executing from external flash triggers a crash. I am using STM32Cube FW

Hi all,I'm trying to use Livetune to make an mp3 player but it only works once connected to a board. I have a custom Nucleo-U5A9 (originally a Nucleo-U575, I replaced the MCU and added xtal). I'm reading UM3297 Getting started with X-CUBE-AUDIO-KIT and on page 6 (picture below) says:"The connection is successful only if the firmware running on the device includes the Designer communication firmware."I would like to include this "Designer communication firmware" into my custom board/firmware but I can't seem to find any reference to it anywhere. I'm pretty sure is part of the examples firmware but I rather not hunt for it that way unless there is an example for the U5A9 which I don't see. Even so ... this "Designer communication firmware" doesn't seem to be designated as such in the example projects.where is this "Designer communication firmware"? How do I integrate it into my custom U5A9 board?Any help is appreciated... thanks.  

Post edited by ST moderator to be inline with the community rules for the code sharing. In next time please use </> button to paste your code. Please read this post: How to insert source code. Hi,I want to jump to system memory boot with SW using UART1.I tested it using code I found by searching forums and the internet, but it doesn't work.For reference, the STM32G071 shares the BOOT0 and SWCLK pins. By pulling the BOOT0 pin high and resetting the device, I can perform a system memory boot. After that, I connected the UART connect in STM32CubeProgrammer and verified the update. However, after jumping to the code below and pressing the UART connect in STM32CubeProgrammer, the following message appears and the device fails. RTS lowDTR lowSerial Port COM15 is successfully opened.Port configuration: parity = even, baudrate = 115200, data-bit=8, stop-bit=1.0, flow-control=0ffTimeout error occurred while waiting for acknowledgment.Error: Activating device: KO. Please verify the boot mo

Hi : I want to use MTP & HID simultaneously in stm32f103RE, but there is not  CompositeBuilder and MTP in stm32f1 STM32_USB_Device_Library, so can I use stm32f4 STM32_USB_Device_Library directly? Or is there any other solution to use MTP & HID simultaneously in stm32f103RE?