Solved

Hi, I have been using NemaGFX on STM32U5G9J-DK2 kit with no problems however my luck with the STM32H7S78-DK kit is different.1. The NemaGFX for this platform only seems to work with 32-bit framebuffers, not 24-bit ones. Or am I doing something wrong?2. The NemaGFX for this platform uses the beginning of the framebuffer as a sort of workspace. We see random dots at the beginning. I think I'm having trouble allocating buffers correctly.3. I can draw filled rectangles, but filled circles with 'nema_vg_draw_circle()' only show the edge slightly and produce small images in a sort of workspace at the beginning of the frame buffer.nema_vg_set_fill_rule(NEMA_VG_FILL_NON_ZERO); does not fill the shape, as it should.Well, 'nema_vg_draw_rect()' works fine with nema_vg_set_fill_rule(NEMA_VG_FILL_NON_ZERO).4. Many more graphics functions don't work properly on the STM32H7S78, but they all work fine on the STM32U5G9J, which one uses 24-bit framebuffers, while the STM32H7S78 can o

Please i need help. The datasheet, says the VDDA voltage level must be always greater or equal to the VDD voltage leveland must be provided first. My qustion is: will my circuit work, if I tie the VDDA and VDD together, to be powered by the same  LDO DC-DC converter?   Thanks in advance.

I could successfully operate the X- NUCLEO IKS4A1 in the MEMS Studio with the default sensor selection on the board. However, when I tried to select the LSM6DSV, which is connected on the DIL24 socket of the  X-NUCLEO IKS4A1 board, for the accelerometer and gyroscope sensor configuration in MEMS Studio, I get the following error window: The WHO AM I register value does not match the device selected I also connect two jumpers between 9-10 for the headers J4 and J5 on the X-NUCLEO IKS4A1 board and removed the two jumpers between 11-12 for the header J4 and J5. Do you have some recommendation, what I miss here?Many thanks in advance. Best regardsChristian

Hi,Looking into STM32CubeN6\Projects\STM32N6570-DK\Examples\SD\SD_ReadWrite_DMA example,I see that quite heavy operations are used:SCB_CleanDCache_by_Addr (aTxBuffer, BUFFER_SIZE); // ... SCB_InvalidateDCache_by_Addr (aRxBuffer, BUFFER_SIZE);while the aRxBuffer[] and aTxBuffer[] are located in a noncacheable memory region.uint8_t aTxBuffer[BUFFER_SIZE]__NON_CACHEABLE; uint8_t aRxBuffer[BUFFER_SIZE ]__NON_CACHEABLE;Could you please explain why?Regards,A

STM32H757 has FreeRTOS running. The goal is to stream JPEG data to the display using HAL interfaces to get performance. However, it is not working yet and I am here to get some guidance.  I have it working with using third party library libJPEG. HAL Interfaces I am relying on: HAL_JPEG_DeInit(m_phjpeg) HAL_JPEG_Init(m_phjpeg) HAL_JPEG_DecodeCpltCallback() and HAL_JPEG_ErrorCallback() have been setup to release semaphore.  HAL_JPEG_Decode_DMA()  for non blocking decode DMA2D: RGB888 To ARGB8888 HAL_DMA2D_Init(&hdma2d) HAL_DMA2D_ConfigLayer() HAL_DMA2D_Start() HAL_DMA2D_PollForTransfer() with 1000 timeout DMA2D: BlendARGB To RGB888 (Blend to FG) stm32h7xx_hal_dma2d.h has the following macros that I am using: #define DMA2D_BACKGROUND_LAYER 0x00000000U /*!< DMA2D Background Layer (layer 0) */#define DMA2D_FOREGROUND_LAYER 0x00000001U /*!< DMA2D Foreground Layer (layer 1) */ Once the dma2d handle members are setup, the following happens: HAL_DMA2D_Init(&hdm

I porting yolov11 model to stm32mp257. and The target detection model I use ,The output tensor is a combination of [1x7x8400] and [1x4x8400]. [1x7x8400] should be our classification because I have set 7 categories, and [1x4x8400] should be our positional information. 1. best.pt changed to best.onnxfrom ultralytics import YOLO# Load the YOLO11 modelmodel = YOLO("best.pt")# Export the model to ONNX formatmodel.export(format="onnx") # creates 'yolo11n.onnx' 2. best.onnx changed to best.nb./stedgeai generate -m path/to/onnx/model --target stm32mp25 3. into broad stm32mp257 ,and get output shape. #C++float *pfloatdata = static_cast<float*>(nn_model->get_output(0));std::vector<ObjDetect_Results> returnx = parseModelOutput(pfloatdata); std::vector<ObjDetect_Results> parseModelOutput(float* output, int num_classes = 7, float confidence_threshold = 0.55f){std::vector<ObjDetect_Results> detections;float *data = output;const int num_boxes = 8400

Hello everyone,I'd first like to mention that this project is being developed with support from ST Brasil, which has provided important components to aid in this development.I'm working on firmware for motor control and, being new to this area, I'm looking for guidance on the best way to implement a specific part of the logic. 1. Summary and Context Here is a summary of the hardware and MCU configuration:Hardware: 3 low-side shunts. The signal from the Phase U shunt resistor is shared, acting as a common input for two of the MCU's integrated op-amps.MCU Config:1.1. Timer 1: Configured for Center-Aligned Mode 1. * CH1/CH1N, CH2/CH2N, CH3/CH3N are complementary PWM outputs. * CH4 is used to generate a capture-compare interrupt.1.2. ARR Value: The ARR (Auto-Reload Register) value is 1000.1.3. Interrupt Trigger: Timer 1 CH4 is set to generate a capture-compare interrupt when the CNT (counter) reaches 900.1.4. Modulation Index: For modulation index purposes, the maximum value for

Hello Expert, I am working on an STM32F303VET6 project using the MCSDK. I want to configure TIM16 to generate a 10 ms periodic interrupt . However, I noticed that on this MCU, TIM16 shares its NVIC vector with TIM1 (TIM1_UP_TIM16_IRQHandler), which is already used by MCSDK for motor control.Could you please advise:Can I safely use TIM16 for my 10 ms task while TIM1 is used by MCSDK?If yes, what is the recommended way to handle the shared interrupt? Are there any potential conflicts or timing issues I should be aware of?If the solution could be illustrated with an example, it would make me so happy. In MCSDK- 6.41 , #define TIMx_UP_M1_IRQHandler TIM1_UP_TIM16_IRQHandlervoid TIMx_UP_M1_IRQHandler(void){/* USER CODE BEGIN TIMx_UP_M1_IRQn 0 *//* USER CODE END TIMx_UP_M1_IRQn 0 */LL_TIM_ClearFlag_UPDATE(TIM1);R3_2_TIMx_UP_IRQHandler(&PWM_Handle_M1);TSK_DualDriveFIFOUpdate(M1);/* USER CODE BEGIN TIMx_UP_M1_IRQn 1 *//* USER CODE END TIMx_UP_M1_IRQn 1 */}

Dear STM experts:     I am using the STM32G473RET6 chip for classic mode communication debugging in FDCAN, but there is a phenomenon where I cannot send information. In FDCAN-PSR, I can see an error of LEC being 5. After removing the CAN chip (SN65HVD230, R pin floating), an error of LECt being 2 appears. I am preparing to replace it with SN65HVD232,Is there any STM with similar routines to refer to? If so, where can I find it? Thanks. Best regards!

We have a batch of custom boards using the STM32H725IGK3 and have experienced several failures getting started with them as the SWD interface appears to be fried. Initially we thought just bad luck with the first couple (inexperienced engineers or ?) but the most recent unit failed after a few successful programming and debugging sessions. Do these processors need special handling or design considerations ? Our debug header follows previous designs, with Vcc, GND, nRST, SWDIO, SWCLK provided. nRST is gated with a couple other inputs to the MCU while SWDIO and SWCLK just have 100R series resistors to protect possible voltage conflict. So far just default 3v3 supply.When the boards were working, SWDIO showed Vcc while SWCLK showed 0V before any connections (expected based on internal pullups) while now the pins show about 0.8V until the STLINK/V2 is connected (upon which its pullup/downs take over). The STLINK pod has been tested and working on a NUCLEO_H723.It looks like we'll

Testing a board with STM32U5A5. VDD is 3.3VI have configured one GPIO as input with an external pullup to 3.3V through a 470k ohm resistor.The input reads high, but when I measure the input with a scope, I read 2.2V on the input, which is below 0.7VDD which is guaranteed as V_IH, but above 0.5VDD+0.2 which is specified by design as V_IH.Is 470k ohm too high of a pullup resistance?

Hello ST Community teamThe pin F11 on the TFBGA216 figure (figure 4 of the AN4660) should be VDD and not VSS according to the products datasheets (for the STM32F469N and STM32F769Nx6). That should be rectified on the next doc revision. Best Regards.II

Title edited with correct board part number. Hello ST Community, I’m working on integrating the NUCLEO-W67W62M1 Wi-Fi module with an STM32H723ZG(spi ptotocol) board using the Arduino connectors.I followed the official documentation for the CLI example and generated the .ioc project accordingly. The project builds and flashes successfully, but I’m getting stuck during the modem initialization. Host MCU: STM32H723ZG (Nucleo-H723ZG board) Wi-Fi Module: NUCLEO-67W61M1 Connection: Arduino connectors Firmware on Wi-Fi module: t01.bin (flashed in standalone mode) Example used: CLI project generated from STM32CubeMX (following ST documentation) RTOS: FreeRTOS(cmsis-v2) (default configuration) problem1: During initialization in W61_AT_ModemInit(W61_Object_t *Obj), the function fails at the semaphore wait:     xReturned = xSemaphoreTake(mdm->sem_if_ready, pdMS_TO_TICKS(4000)); if (xReturned != pdPASS) { SYS_LOG_ERROR("sem_if_ready not received\n"); ret = -1; g

Hello, our company is concerned about potential export control restrictions affecting Nexperia products.We currently use several automotive logic devices from Nexperia and would like to know if STMicroelectronics offers equivalent parts as alternatives. Could you please advise?Thanks,Claude.

The STM32CubeG4 package comes with CMSIS v5.6 (https://github.com/STMicroelectronics/STM32CubeG4/tree/master/Drivers/CMSIS) which I think was released in July 2019.Is it necessary to use this version or can I upgrade it to a later release? Currently v6.1 is the latest CMSIS release. 

Hi ST Community,I’m using the STM32MP257F-DK board and successfully followed this guide: Modify, rebuild and reload the firmware Everything worked fine during the initial setup and firmware modification. Now I’m trying to flash a new image to the SD card and connect to the board again, but I’m unable to establish a connection via ST-LINK. Here’s the error I get:ST-LINK SN : 003E004A3234510636303532 ST-LINK FW : V3J16M8B5S1 Board : STM32MP257F-DK Voltage : 3.29V Error: Unable to get core ID Error: No STM32 target found! If your product embeds Debug Authentication, please perform a discovery using Debug AuthenticationI’ve set the boot switches to the OFF position (boot from UART/USB), and I suspect that during the previous steps, Secure Boot may have been enabled or modified without me realizing it. Could this be preventing me from accessing the board now?I’ve already tried:Updating ST-LINK firmware“Connect under reset” modeChecking physical connections and voltageIs there

Section 6.1 of AN5056 (for X-CUBE-SBSFU) states that the projects are delivered with the highest level of compiler optimizations turned on for size aspects.If the Optimization Level was set to 'None', then how much larger is the generated code expected to grow for the mapped regions (SE, SBSFU, etc.) excluding the image regions? (% increase in general)Which of the regions will be impacted the most?Update: To aid debug via IAR EWARM, I prefer to develop without any optimizations enabled, understanding that the code output size will be larger. I have no issues if the mappings are allowed to be adjusted to accommodate the larger code outputs.

Hello everyone,I am working with an ST M 32 U 585 V I T micro controller and I would like to use an SD card for file read/write operations using Azure File X.I have enabled Thread x and File X middle ware in S T M 32 Cube IDE (Cube M X), but I am not completely sure about the hardware connections, Cube M X configuration, and code implementation for SD M M C with File X.

In the UM3475 at page 10 it says "Mission 2 mode (LwIP running in ST67W611M1)".I think it should be "Mission 2 mode (LwIP running in STM32)".

HelloHRTIM´s ADC Triggers post scalers on STM32G474 have 5 bits (0..31) , but in CubeMX you can set 10 bits (0..1048575). Upper bits are trimed so it can be confusing when you set value above 31. My versions:STM32CubeMX Version: 6.15.0-RC7 Build: 20250701-1659 (UTC)STM32Cube MCU Package for STM32G4 Series  1.6.1STM32CubeIDE Version: 1.19.0

I want the specific Ron data corresponding to different VGS values (e.g., 8V–15V) when the MOSFET switch SCTWA70N120G2V is in the linear region.

Hi Everybody1) There are some technical o specific reasons, that I was not able to find in the various documentations, to use external SMPS for VDDCORE insted of the internal one ?2) Working on NUCLEO-N675X0-Q, to configure various bridge for internal SMPS, documentation report to remove R103.But if this, VDDA1V8 is missing and board doesn't work.I remove and install all bridge as reported in the documentation (UM3417) , just I left R103 ON, only in this way the board work.RegardsDanilo 

I have followed all the instructions to creating a project in MXCube and importing it into VS Code, however there is no option to select STM32F100VBT6 (Or any MCU in the F1 series for that matter). Is the STM32F1 series not supported? 

Hi everyone! hope you can help me. I have an issue on the STM32H7A3ZIT6.I already used the BKPRAM on other project, like the STM32H753 and I had no issue, work perfectly.So I don't understand why it is not OK, here below is what I do to test the BKPRAM : (I work on IAR Workbench)__HAL_RCC_BKPRAM_CLK_ENABLE(); // unlock backup domain HAL_PWR_EnableBkUpAccess(); // enable the backup SRAM if (HAL_OK != HAL_PWREx_EnableBkUpReg()) { Error_Handler(); } /* I tried with MPU config enable and disable also, I tried also with Cache enable or Cache disable. same issue. */ //MPU_RegionConfig(); // Test read and write to backup SRAM uint32_t magicNumber = 0xAA55; uint32_t *pBackupSram = (uint32_t *)(0x38800000); //If I look at the value of the pBackupSram I can see on the watch "unavailable" so I know it will hard fault... // when I execute the line below I got an hardfault. *pBackupSram = magicNumber; if (magicNumber != *pBackupSram) { Error_Handler(); } *pBackupSram = 0; if (0 != *pBac

Could you please let me know at what point we can confirm that the ASM330LHH has successfully started up at the hardware level?If the WHO_AM_I register returns the expected response, can we consider that the device has initialized correctly?Additionally, after enabling the sensors via CTRL1_XL and CTRL2_G, is it possible to verify proper startup by checking whether the value of STATUS_REG changes?In a situation where the STATUS_REG value sometimes changes and sometimes does not, is it appropriate to judge that “no change” indicates the hardware has not successfully started?Thank you very much for your guidance.