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Im using stn32f413zh nucleo board.I want to voltage to BJT from stm32 using DAC ,how can i do it or what to configure?please any thoughts.

Hi,I am trying to port a software written for STM32L486QX to my STM32L476RG Nucleo board. I have made the board modifications as described in the User manual, except I adjusted the capacitor values for a 19.2 MHz clock. I ran a small program to printf to UART using the HSE clock and it worked, I also measured with a frequency counter and was getting the correct 19.2 MHz within the specified tolerance. Now when I try to run the code written for the STM32L486QX it gets stuck in the loop where it's waiting for the HSE ready bit. Is there any difference as to the location of this bit for these two CPU's? Or is there something else that obviously jumps out? Thanks in advance for your answers

I am trying to configure the CR95HF (using either CR95HF.dll V0.9 or V1.2) to communicate with an M24SR02-Y, with an eventual view to read/writing NFC Forum Type 4 NDEF files. All I2C coding has been completed for "internal" access to the EEPROM/NDEF files. I now need to get things going from the RF interface.I'm struggling to get information on the correct sequence of commands to be sent. In particular, the meaning of the various parameters and responses (e.g. the whole anti-collision algorithm) would be useful. The CR95HF datasheet gives examples (e.g I've tried to follow D.1.5), but I come unstuck with Anti-collision and RATS/ATS commands.I can see that once past these, the remaining commands are very similar to the I2C commands.Any help would be much appreciated!

HelloIs there a possibility to reduce the time gap between two consecutive SPI Frames? Background: I would like to use only the MOSI signal without the clock to send information to some addressable LED (WS2812). They just measure the time between rising and falling edge of the signal to determine the data. With gaps between the frames, the timing of the MOSI signal is destroyed for a MOSI without Clock usage.I have the following Setup:Atollic TrueSTUDIO for STM32 9.0.1 STM32F042K6T Nucleo Board, with internal HSI48 Clock CubeMx HAL (STM32Cube FW_F0 V1.9.0) SPI Configured with baud rate 3MBit/s, 16bit data size, transmit only, SPI Tx DMA, highes priority In the main programm I have a uint8_t array with values to send over SPI.uint8_t DataToSend[]={0xBB,0xBB,0xBB,0xBB,0x88,0x88,0x88,0x88,0xBB,0x88,0x88,0x88,0x88,0,0,0,0,0,0};In the main loop, I call the following functions: HAL_SPI_Transmit_DMA(&hspi1,DataToSend,sizeof(DataToSend)); HAL_Delay(1000);With an attached scope, I can mea

I was trying to figure out what datasheet says with the following sentence highlighted bold for STM32F303R8T6The PWM mode can be selected independently on each channel (one PWM per OCx output) by writing ‘0110’ (PWM mode 1) or ‘0111’ (PWM mode 2) in the OCxM bits in the TIMx_CCMRx register. You must enable the corresponding preload register by setting the OCxPE bit in the TIMx_CCMRx register, and eventually the auto-reload preload register (in upcounting or center-aligned modes) by setting the ARPE bit in the TIMx_CR1 register.Do we have to set the ARPE bit for a basic PWM generation .. ? I experienced setting or clearing it in debug mode but I can't see the difference , It still generates the same PWM wave form .In my application I will be working with a fixed PWM frequency with a variable duty cycle , and I don't know if I should set or reset the ARPE bit .. I meant basic by Edge Aligned mode .. But I want to know what it changes with Center Aligned mode ..

I can connect with JTAG via SWD and load a simple program but after load the system won't run to main. The chip seems to be stuck in some hardware system reset loop. Attached is an image of the nRST pin. I've gone through AN4661 many times and can't figure it out. Power rail looks good and I have BOOT0 strapped low, PDR_ON strapped high. Any ideas?

Hi All,I am developing an application for the STM32H753II using IAR toolchain, STM HAL and Micrium OS-II.Most of the linker script files in the STM32Cube example suite only specify DTCM RAM for data storage (addresses 0x20000000-0x2001FFFF). I have been using the stm32h753xx_flash.icf (with only DTCM region specified) file with no issues up until now. I now need more RAM space.I have been attempting to use the chip's SRAMs however each time I change the linker to place data there, my application starts crashing somewhere in the init to UsageFault due to a jump to address 0x0...EDIT: I've narrowed down the instruction that breaks. At the end of an OS function when it's supposed to branch to the calling function, the instruction POP {R0, R4, R5, PC} is executed which is supposed to branch to a location in flash but instead it branches to 0x00000000. It tries to execute code from there and ends up in a UsageFault. Hope this adds useful context.EDIT 2: Turning off D-Cache seems to solve th

Hi,I'm using the evaluation board STEVAL-IDS001V4M which has a STM32L152 mounted on.I'm having some trouble on the initialization of the UART2 peripheral.I'm using the ST library contained into the STSW-CONNECT009 packet.To initialize the UART2, I'm doing the following steps:>> RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOA); //activate clock on peripheral>> USART_StructInit(&USART_InitStruct); //initialize parameters (parity, stop bit, bauderate....)>> USART_Init(USART2, &USART_InitStruct); //initialize USART2 parameters>> USART_Cmd(USART2, ENABLE); //enable usart2Then I use the following function to send multiple times a character 'A' to my PC.void USART_SendData(USART_TypeDef* USARTx, uint16_t Data){ /* Check the parameters */ assert_param(IS_USART_ALL_PERIPH(USARTx)); assert_param(IS_USART_DATA(Data));  /* Transmit Data */ USARTx->DR = (Data & (uint16_t)0x01FF);}But nothing arrives at my COM port!What did I miss in the init

I've used a Nucleo-F410RB to develop my application. I'm now trying to minimally configure the chip (STM32F410RB) on a separate PCB breakout board (LQFP64 package) after studying the schematic diagram and specs in the Nucleo documentation. Sadly, I cannot get the separated ST-LINK/V2-1 to recognize the chip on my breakout. Have no problem getting the LINK to connect and program a separated Nucleo-F410RB.Could anyone validate that the minimal connections to the chip (for it to be recognized by LINK programmer) would be as below (also shown in attached minimal schematic):3.3V (VCC) connected to pins 1,13,19,32,48,64 (with 0.1uF caps as applicable)GND connected to pins 12,18,30,31,47,634.7uF (Low ESR) connected to pin 54 and GND10K resistor connected to pin 60 (BOOT0) and GNDSWCLK on CN7 of LINK to pin 49 (PA14)SWDIO on CN7 of LINK to pin 46 (PA13)NRST on CN7 of LINK to pin 7 (NRST)VDD_TARGET on CN7 to 3.3VGND on CN7 to GNDSWO on CN7 left unconnectedI have crystals as well

Where do you connect JTAG (e.g. TMS, TCK, TDO, TDI, NRESET) to the STM32F091RC? I can't find this anywhere in the datasheet (r4-1/17), is this supported?

Hello,I would like to implement the M24SR02 in my design, with an NFC antenna.The problem is that, in order to have a resonant frequency of 14.2MHz, the inductance of the NFC antenna needs to be around 5µH in order to resonate with the 25pF capacitance inside the M24SR02, but this value of inductance is difficult to reach with a small size antenna (<10mm).Is it possible to add a capacitor between AC0 and AC1 pin, or two capacitors between the ACx pins and the ground, in order to make the capacitance higher, which will make the needed inductance of the antenna lower, and thus allows me to use a smaller antenna ?Best regards,Guillaume

I am working on M24Sr64-Y chip. I am able to read Chip using I2C as per application note AN4433. But in that application note there is nothing mentioned about writing to the NFC chip using I2C. So I followed commands as for RF writing,Because Reading commands for both are same.Now I want to know in which format it writes the data in chip? If I write '1' to the chip, it shows one extra byte '0x05' in memory before '1'. What does that byte mean?What procedure to follow for writing into the tag in NDEF format?

Hi everyone,I'm having troubles with the internal ADC (STM32F072CBTX): a significant offset is present in the values provided by the converter. I performed a set of test measurments on the ADC: the results are shown in Table1.jpg.Where:Vmis is the voltage measured with a voltage meter at the ADC input pin (voltage drop on a resistor, in a voltage divider).ADC is the value produced by the converter.Vcalc is the correspondent voltage value with 12 bits resolution: Vcalc = Vmis * ADC / 4096Err = Vmis - VcalcThe values reported in the table of which above have been obtained with the following conditions:VDDA = 3.3VVSSA = 0VNo autocalibrationI tried autocalibration as well, by calling HAL_ADCEx_Calibration_Start before starting conversions: strangely, with autocalibration, things get even worse, as shown in Table2.jpg.Does anyone have any idea on what is going on?Am I doing something wrong?Any help is appreciated.Thanks.Marco

Hi,I am using Keil V5.26.2.0. Although I have installed DFP for my particular MCU, from where I may get bsp for my board. Please be gentle guys, I am pretty new to the world of MCUs.Cheers and a happy dayTahir

Posted on August 01, 2017 at 16:03Hi ForumI'm trying to implement USART Rx of variable, unknown length messages at a 1Mbps baud rate through DMA. I would like to minimize the latency from receiving to consuming the data, so I'm trying to do this with some sort of idle detection as opposed to having my consumer code periodically drain a buffer.I can attach my code if necessary, but for right now I'm mostly looking for high-level answers on how this is best accomplished to make sure I'm on the right track.My first attempt was to configure a buffer in DMA and enable the USART IDLE interrupt. In the USART interrupt handler, I first disable DMA (and wait for the enable bit to clear on the DMA stream) and then clear the IDLE flag (by reading the bit and then reading the data register). I copy the data out of the DMA buffer and then re-enable DMA in the interrupt to be ready for the next message.Doing this gets mixed results -- I do get valid packets occasionally, but most often my received

Hi , I encountered an interesting problem while I was trying to calculate the Bit-Banding Address of GPIO registers .The peripherals working on AHB2 and AHB3 busses are overflowing when trying to calculate their bit-banding map .. For Example ;I wanted to ease the syntax of reading some IO pins and here is the result for GPIOA , IDR register..--------------------------------------------------------------------------------------PERIPH_BASE =0x40000000Address offset of IDR is = 0x10AHB2PERIPH_BASE=(PERIPH_BASE + 0x08000000)GPIOA_BASE =(AHB2PERIPH_BASE + 0x00000000)GPIOA_BASE=0x48000000---------------------------------------------------------------------------------------For GPIOA_IDR_Bit0;GPIOA_IDR_Bit0=0x42000000 + ((GPIOA_BASE +0x10-0x40000000)*0x20);GPIOA_IDR_Bit0=0x142000200 .... Which is out of 0x42000000 -- 0x43FFFFFF Range !Is there something I misinterpret ? or This is the reality of bit-banding exception such that doesn't work on some peripherals ... ?? Please tell me

Hi,It says on page 107 of stm32f777bit6 manual that:"Each OTP data block can be programmed until the value 0x00 is programmed in the corresponding OTP lock byte."I understand that OTP is supposed to be one time programmable but the above statement seems to imply that I can reprogram the OTP data until I write 0x00 in the lock byte.I haven't programmed the lock byte but I cannot reprogram the OTP. I used these commands: HAL_FLASH_Unlock(); __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_WRPERR); HAL_FLASH_Program(FLASH_TYPEPROGRAM_WORD, 0x1FF0F3A0, 0x55555555); HAL_FLASH_Lock();It worked the first time but if I change 0x55555555 it doesn't write the new value.So what's the problem? And if the OTP is only one time programmable then why create a separate lock-byte if you can't reprogram it anyway?Thanks

I am using a STM32H7 USB in MSC mode. When I generate the source code with STM32CUBEMX 4.26.1 and STM32CubeH7 Firmware Package V1.3.0 / 04-July-2018, i noticed that inside USBD_HS_USR_BOSDescriptor() in usbd_desc.c, USBD_HS_BOSDesc definition can not be found. Looks like USBD_HS_BOSDesc is not defined anywhere in code

Hello there,I am using this shield:https://www.st.com/en/ecosystems/x-nucleo-nfc05a1.htmlConnected to the Nucleo64 L476RG board.I wanted to utilize this demo:https://www.st.com/content/st_com/en/products/embedded-software/st25-nfc-rfid-software/x-cube-nfc5.htmlThe problem was that there is the source code generated by CubeMX provided, without the actual CubeMX project available. Because of that, instead of generating code from CubeMx, I had to generate CubeMx project from code by hand. I have placed the whole project here in case anyone needs that:https://github.com/bremenpl/NFC5The project works and the demo reads some data from a tag placed on the PCB antenna.I need to read the tags memory (that 256 bytes of data) but I dont know how to do that. In the demo, there are a lot of hardcoded variables and the whole architecture is merely readable. After a while I found out that in this function the data is exchanged:demo.c:/*! *************************************************************

I am currently working on an embedded firmware development which uses FreeRTOS running on an STM32F777II microcontroller. Resource wise, I have around 10 tasks (total sum of stack size will be under 40 KByte) at the same priority, around 4 queues of 1KByte each, 4 binary semaphores. I know this would be an incomplete question without posting the actual code, but I really do not have any specific portion in my firmware that I think will be worth sharing related to my issue. I have a ton of business logic in my code which I cannot fully share as well.I have a struct which consists of multiple char and int arrays of a specific length. 4 of the tasks uses these structures each. Each structure consumes around 15KByte of space and is defined in the global space of the FreeRTOS environment, not local to a task. The structs are allocated statically only and not dynamically on runtime. And since I initialize few members of the struct when declaring, so they go to the .data section only if I am

Hello,can ADC3 be programmed in independant mode if ADC1 and ADC2 are programmed in Dual regular simultaneous mode ?(in CubeMX with STM32F205 , the menu independant mode can't be selected for ADC3 if the menu Dual regular simultaneous mode is selected for ADC1 and ADC2)thanksbest regards

I am using a STM32H7 ADC in multimode. When I generate the source code with STM32CUBEMX 4.26.1 and STM32CubeH7 Firmware Package V1.3.0 / 04-July-2018, i noticed that inside MX_ADC1_Init() in main.c, the following line of code is written:multimode.DualModeData = ADC_DMAACCESSMODE_DISABLED;which is throwing compile time exception.As I understand it should bemultimode.DualModeData = ADC_DUALMODEDATAFORMAT_DISABLED;Also I noticed that STM32CubeMX IDE is showing "DMA Access Mode" on the second line in ADCs_Common_Settings which is probably is root cause of this issue

Hello,I'm using a STM32L031G6U7 in a new product design, but when I try to program it using the flash loader released by ST(STMFlashLoader v 2.8.0) the flash map(STmap) for this processor is not there. I'm missing something or this release doesn't support this processor? In that case are there any other solutions for uart programming?

I am using the stm32f0discovery development board, I want user manual for stm32f0xx firmware library. can you please share the link

Hi, I'm looking for the CR95HF library code, which is described in the application note AN3375. Unfortunately I couldn't find it anywhere. Can somebody please point me into the right direction!? :folded_hands: