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Hello everyone, for a few days I have been struggling with skipping and running the bootloader on stm32g474ret6 via usart.I have an STM, 12MHz crystal, and an FTDI chip on my own PCB, with RTS/CTS disconnected for now. After sending a command via USART, the control LED lights up, but the bootloader doesn't start. What am I doing wrong?#include <stdint.h> #include "stm32g4xx.h" #include "stm32g4xx_hal.h" #define SYS_MEM_BASE 0x1FFF0000 void JumpToBootloader(void) { __disable_irq(); SysTick->CTRL = 0; for (int i = 0; i < 8; i++) { NVIC->ICER[i] = 0xFFFFFFFF; NVIC->ICPR[i] = 0xFFFFFFFF; } __DSB(); __ISB(); HAL_DeInit(); HAL_RCC_DeInit(); __HAL_RCC_HSI_ENABLE(); while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET); __HAL_RCC_SYSCLK_CONFIG(RCC_SYSCLKSOURCE_HSI); __DSB(); __ISB(); uint32_t msp = *(__IO uint32_t *)(SYS_MEM_BASE + 0x0); uint32_t reset = *(__IO uint32_t *)(SYS_MEM_BASE + 0x4); SCB->VTOR = SYS_MEM_BASE; __DSB(); __ISB(); __

Hello, I am working with an STM32G431 MCU and referring to the STM32G4 Series Safety Manual (UM2454). In section 3.6.4 (Embedded Flash Memory) — Table 21: FLASH_SM_0, it describes a periodic software test for Flash memory using signature-based methods (e.g., CRC). According to the document, this diagnostic can be implemented via X-CUBE-STL, but I would like to implement it manually, without using the STL library. My goal is to verify Flash memory integrity periodically or at startup by computing a CRC over a defined Flash region and comparing it with a stored “golden” reference signature in Flash. I would like to understand the following: What is the correct approach to implement FLASH_SM_0 manually according to the safety manual’s requirements? How should I select the Flash regions for testing (code, data, unused memory)? What is the recommended way to store and update the reference (golden) CRC signature in Flash? Are there any STM32 hardware CRC peripheral examples or best p

Hello everyI want to increase STM32G473 FDCAN Tx buffer and Rx buffer size,In STM32G473 datasheet    >> "A 3-Kbyte message RAM memory implements filters, receive FIFOs, receive buffers, transmit event FIFOs, transmit buffers. This message RAM is shared between the threeFDCAN modules."In my project, I used three FDCAN（FDCAN1 FDCAN2 FDCAN3），However, after testing, if there is no delay, each FDCAN can only send a maximum of 3 data.This seems to match the SRAMCAN_TFQ_NBR parameter.But when I modified this parameter, the data sent became very strange, and the CAN analyzer could not receive normal data. Does anyone know how to increase the tx buffer size of FDcan? Besides this, I would also like to know how to increase the size of the rx bufferIf you have any questions, please feel free to discuss with us，Thanks！ 

In STM32G474 UART4 pin no PC11(Rx) is 5 Volt tolerant . If I pull up this pin to +5V with 4.7kOhms then it will affect life or operation of microcontroller? please Suggest.

Post edited by ST moderator to be inline with the community rules for the code sharing. In next time please use </> button to paste your code. Please read this post: How to insert source code. Hello to all, I'm coding a simple project for STM32WL55IC7 MCU, for the NUCLEO-WL55JC2 board. I didn't use the BSP for the board, in other words i didn't select the NUCLEO board option, but I started the project using the MCU. The Project name is STM32WL55IC7_foo. The CubeIDE build the following 3 projects: 1. STM32WL55IC7_foo  2. STM32WL55IC7_foo_CM0PLUS (the code for Cortex M0+ code) 3. STM32WL55IC7_foo_CM4 (the code for Cortex M4 code) When I try to compile the project, while the CM4 core code is compiled without any error, the code for the M0PLUS core issued errors, on the following snippet during the EXTI interrupt initialization: /* EXTI interrupt init*/ HAL_NVIC_SetPriority(EXTI1_0_IRQn, 1, 0); HAL_NVIC_EnableIRQ(EXTI1_0_IRQn); HAL_NVIC_SetPriority(EXTI15_4_IRQn, 1, 0); H

I’m working on a custom STM32MP257DAK3 board.In STM32CubeMX, I need both SDMMC1 (SD card) and SDMMC2 (eMMC) to be supported as possible boot devices.When I check both:SDMMC1 → Memory Boot DeviceSDMMC2 → Memory Boot DeviceThe following error appears in IPs assignment rules: Faulty state detected for SDMMC1, SDMMC2 : Only one Memory Boot Device can be assigned to TF-A simultaneously. I understand that TF-A allows only one memory boot device at a time.However, our hardware design supports dual boot options (either from eMMC or SD card). How can I fix this error? 

Hi,We are using STSPIN958 for BLDC control, and under 33V, 2A, when external force applies to servo, and the current goes up to about 2A, the chip burns before the thermal shut down kicks in.I would also like to know the value of "Tsd" delay timing parameter in thermal shutdown sequence: Figure 16 of page 21/34 of its datasheet. This value is not published.Thanks,Amin

When trying to build an STM32CubeMX V6.13.0 generated cmake+gcc project with clang there are two files that generate errors:sysmem.cthe linker script (STM32L431RCTX_FLASH.ld and stm32l476rgtx_flash.ld)sysmem.c produces the following error:Core/Src/sysmem.c:30:35: error: use of undeclared identifier 'NULL'[build] 30 | static uint8_t *__sbrk_heap_end = NULL;This is caused by the fact that only errno.h and stdint.h are included. None of them officially define NULL. But they probably do in gcc. Also ptrdiff_t is undefined.sysmem.c can easily be modified by either:The easiest is not to use NULL but (void*)0. This is something ST could do. including stddef.h . This defines NULL and also ptrdiff_t.or modifying build to forcebly include such a file in all files (adding "-include stddef.h" to compile command). I did this so I wouldn't have to modify the file (which would get overwritten by regenerating code). But it's kind of a hack.Linker script:Linker scmemory region not defined: RAM[bui

Hi everyone,I’m working on a project using the SPC58NH92 MCU with SPC5 LLD (RLA) drivers.The setup runs FreeRTOS on Core2 and bare-metal code on Core0.Both cores share data through a dedicated RAM region, with synchronization handled by SEMA4 for access control and cache invalidate/flush operations to maintain data coherence.The application works perfectly when compiled without optimization (-O0). However, when I build with optimization level -O2, the system throws an unhandled exception during runtime.I’m using FreeGCC as the compiler (SPC5Studio environment).Has anyone faced a similar issue on SPC58 multicore systems?Are there any additional recommendations or known considerations regarding shared memory, cache management, or compiler optimization in this setup?Thanks in advance for any help or insights!

Hi Everyone,We are using an STM32F401RE Nucleo board with the IHM16M1 power board, running a sensorless FOC algorithm generated using ST Motor Control Workbench. The motor parameters were averaged over several runs using ST Motor Profiler, and the control is implemented in 3-shunt topology.Observed Issues:Humming noise becomes audible and increases as RPM increases.This is more prominent at higher speeds.At low RPM, noise is tolerable but increases as speed ramps up. Speed graphModifications done in Motor Control Workbench to mitigate issues:Increased Kp divider to reduce aggressive control at low speeds (reduces noise at low RPM but not high RPM).Reduced Ki to prevent instability.Reduced Observer G2 gain to prevent speed feedback faults in Motor Pilot.PWM Mode Testing:Switching from center-aligned to discontinuous PWM seems to delay the onset of the humming noise slightly, but noise still eventually appears at high RPM. Is there a recommended strategy to suppress audible noi

Hello,we do have a custom motor control board based upon B-G431B-ESC1.A custom inverter board is created with the board designer and the project is created with MotorControl Workbench 6.3.1. The system is running fine at higher RPMs (>2500 RPM; max RPM of the motor is 2900).However when running at lower RPMs the system is becoming instable after some time. I see in the motor pilot that IQ_MEAS and ID_MEAS are increasing till the overcurrent limit is triggered. In this error case the motor RPM is remaining constant, but power consumption is increasing. I can also see that a shift between the HALL_EL_ANGLE and the STOPLL_EL_ANGLE (this is the auxiliary sensor) is becoming visible in this case. When the system is working normally the two are aligned.I can delay this behaviour by decreasing the integral part of the PI parameters for Iq and Id or increasing FOC rate to 5, but I can not get it to stop. Does anyone have any tipps how to get the PI regulators to become stable

Hi everyone,I’m using the new Arm Toolchain for Embedded with CMake. I generated a project template from STM32CubeMX using the following settings:Toolchain/IDE: CMakeDefault compiler/linker: Arm-ClangCompilation works fine, but when linking starts, I get this error:ld.lld: error: STM32G474XX_FLASH.ld:105: symbol not found: READONLYIt looks like the Arm toolchain (even the latest v21.1.1) doesn’t support the READONLY keyword. It’s not a big deal to adjust the .ld file - just remove the READONLY keywords - but it would be nice if the generated template worked out of the box.Am I missing a setting somewhere? Is there an alternative/better way to obtain the linker file?Edit: I'm using the STM32G474.

Hi,  Has anyone managed to Trigger Timer 2(Combined PWM Mode, One-Pulse) with Internal Trigger 3(ITR3). The TIM14 OC1 waveform is the trigger. When I run Timer 14 in output compare mode, with an active level on match between Couner and CCR1. I cannot trigger the Timer nothing happens. If I go an manually trigger the timer, everything works.  Here is my Software to setup Timer 2 in Combined PWM Mode 2, on channel 2, One-Pulse Mode.  Image on the left is the TIM2 code and imagine on the right code for Timer 14. I have verified this works by using the debugger and seeing that TIM2 is never enabled even if the OC1 Signal on Timer 14 goes high  

Hello,I have modbus master and slave device, where I have design modbus master for testing in that way that it will continuously send modbus request  after each successfull response, and if any response fail then it stop.Now on  I'm getting continuous response from slave device and working fine. The issue is with slave device having undesired behavior if we restart the slave device.Slave device has custom bootloader and slave device. So once we start the device it will start bootloader and bootloader will take care to check integrity of slave application and if all well, then jump to slave application.So, if I dump the code in release mode (via bootloader) first time then slave device continuously give response on each request and it continue until I stop or reset and even after master reset and ON again, the slave device still continue to work well.Note: It works in all the way if we dump a debug code, only issue with release code. I have remove bootloader and allow to run s

 Hello, I write this post because I have a question while using the ST67W61 chip. First,I tested soft-AP function with a NUCLEO-H563ZI board and an X-NUCLEO-67W61M1 board.I used sdk example project ST67W6X_CLI of x-cube-st67w61-v1.0.0.It worked well. And then,I tested AT command with a NUCLEO-H723ZG board and an X-NUCLEO-67W61M1 board.I received some report. -- ①MOSI : 0x00  0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00  0x00 0x00 0x00 0x00 0x00MISO : 0xAA 0x55 0x09 0x00 0x00 0x00 0x00 0x00 0x0D 0x0A 0x72 0x65 0x61 0x64 0x79 0x0D 0x0A 0x00 0x00I understood this report as ready st67 chip.and,I sent AT command.MOSI : 0x41 0x54 0x0D 0x0A 0x00 0x00 0x00 0x00 0x00  0x00  0x00  0x00MISO : 0xAA 0x55 0x00 0x00 0x00 0x00 0x00 0x00 0xDD 0xCC 0xBB 0xAAafter I send this AT command, there was no longer report from st67 chip. so, I checked SPI signal with NUCLEO-H563ZI and X-NUCLEO-67W61M1, sdk.First, it received same ① report. and

Hello there-Is there a way to add own commands/requests to the ASPEP protocol like retrieving own custom introduced values?I´m running the B-G431B-ESC1 board and adapted the esc.c file to my needs and it now holds a value I´d like to be able to retrieve. As far as I understand from looking at the code, callbacks are registered through uint8_t MCP_RegisterCallBack (uint8_t callBackID, MCP_user_cb_t fctCB)defined in mcp.h / implemented in mcp.c-Searching the project for this text I didn´d find locations where it is called / callbacks registered. - br, Justus

I am able to do a line reset, enter into JTAG_SWD mode and read the SWD_ID. I want to know how to configure the core registers for SWD initialization process. 

Description:My RTOS application on NUCLEO-H563ZI board runs a thread CollectSamplesThread. I generate an interrupt every 8Khz using a timer and the ISR triggers a non blocking SPI transfer:The application code: void InitAdeSpi() { // SPI1 Initialisation if (hSPI.hdmarx != NULL) { HAL_DMA_RegisterCallback(hSPI.hdmarx, HAL_DMA_XFER_CPLT_CB_ID, AdcSpiRxCallback); } } void AdcSpiRxCallback() { BaseType_t xHigherPriorityTaskWoken = pdFALSE; // Release the sempahore thats blocked to validate the frames in CollectSamplesThread xSemaphoreGiveFromISR(xSpiRxSemph, &xHigherPriorityTaskWoken); portYIELD_FROM_ISR(xHigherPriorityTaskWoken); }  void TIM3_IRQHandler(void) { EvbDataRdyTimerHandler(); } void EvbDataRdyTimerHandler(void) // Ensure this matches the existing declaration { __HAL_TIM_CLEAR_FLAG(&hTimDready, TIM_FLAG_UPDATE); // Release the sempahore that is blocked in the CollectSamplesThread for Dready callback xSemaphoreGiveFromISR(xSamplesAvailS

Hello everyone,I created a project using Motor Control Workbench, configured for FOC with Hall sensors and 3-shunt current sensing, PWM at 20 kHz. The initial setup used:NUCLEO F303RE boardSTDRIVE101 evaluation boardA BLDC motor with a nominal current of 4 ADuring testing, everything worked perfectly: the current reading matched the expected load (4 A at constant effort).Based on this setup, I developed a custom electronic board using an STM32F303VC. The schematic is identical to the EVALSTDRIVE101 board (same components).I reconfigured the project in MC Workbench using exactly the same parameters as in the evaluation setup. However, when testing the custom board under the same load conditions, I read a current of 8 A.I’ve double-checked the hardware: shunt resistor values, op-amps, connections — everything is identical. I suspect a configuration issue or a subtle difference I may have overlooked.Questions:Are there any specific parameters in MC Workbench or Motor Pilot that depend on

 Subject: PMSM Motor Drawing Higher Power at Low RPM – Guidance on Parameter TuningHello Expert,I have developed a custom board based with STM32F303VET6X, using two IPMs and 0.47 Ω shunt resistors, similar to the STEVAL-IHM045V1 design. The board utilizes the internal op-amps and comparators for current sensing and protection.With MCSDK 6.41, I have successfully run two PMSM motors using this custom board, equivalent to the setup with STEVAL-IHM045V1 power board and STM32F303E-EVAL control board.However, I am observing that at lower RPM, the motor exhibits audible noise and higher input power consumption compared to a typical ECM motor operating at similar conditions/ airflow/rpm. In the custom board livewatch target RPM is achieved always, but I am unsure which parameters should be optimized in MCSDK to reduce input power and improve efficiency.As an random experiment, I thought to play with RSH.  I changed the shunt resistor values to see the effect on power consu

I am trying to flash and debug on CM4 on stm32 H755 ZI-Q board.1. Firstly i tried debugging CM7 , with debug configurations --> Connecting under reset and halt all cores.2. Then i tried debugging CM4, with debug configuration -->None(no reset)3. Also added .elf files in startup while debugging CM7.4. I separately debugged cm7 and then cm4, but got only cm7 prints output.5. So then i tried in other way,I launch the group debug, adding cm4 and cm7 both elf files,, still the cm7 i could able to see prints,, cm4 no prints.. basically, I think cm4 is not able to get up from stop mode.So, provide me solution 1.How to run cm4 independently? If this is not possible,  2. How to run the code written in m4, along with m7 in stm32 h755 zi-q series board.

 Description of the IssueI am experiencing a configuration validation warning related to RCC when generating code in STM32CubeMX version 6.15.0 for the STM32MP257DAK3 MPU. Although the code can be generated, CubeMX reports the following RCC warning during validation:  Main Config: These peripherals still have some not configured or wrong parameter values: [RCC]This warning appears even when the RCC configuration seems complete and valid.Steps to ReproduceOpen STM32CubeMX v6.15.0Create a new project for STM32MP257DAK3Navigate to System Core → RCCSet HSE to Crystal/Ceramic ResonatorClick GENERATE CODECubeMX displays the above warning during pre-generation configuration checkI've selected Pin Context Assignment from the dropdown menu, but it's empty.   

in interrupt read program as follow 

Hi! I have a board based on STM32U585CIU, and I'm trying to enable a USB CDC on it. The problem is: when I generate a project in CubeMX for MDK-ARM, the code I've attached works fine, USB CDC device is being recognized by PC, and I can see messages via COM port. However, once I generate it for CubeIDE or Makefile, it just goes to hard fault in MX_USBX_Device_Init. Considering it works in Keil uVision, seems like hardware is completely okay, so there is something in the difference between gcc-arm and arm compiler. 

Hi,I would like to know if the STSW-IMG041 code that is flashed into the device is available somewhere. My goal would be to use the same code but on a custom board to verify that the sensor is working properly.Thank you!