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Hi everybody,I'm trying to make a bootloader in my STM32F446. The aim if this one is the possibility to update the firmware but with keeping the previous one in case of issue. So, I'll have two slots for firmware.For now, I have the following sectors in my flash :BOOTLOADER : 0x0800 0000 -> 0x0800BFFF (it only uses sector 0 & 1 for code, so I use last word of sector 2 (0x0800 BFFE & 0x0800 BFFF) to write a "magic word" which gives me the information, if we're currently running on SLOT 1 or 2).SLOT 1 : 0x0800 C000 -> 0x0800 3FFFSLOT 2 : 0x0804 0000 -> 0x0807 FFFFMy FW is running on slot 1. It receives the order to update, so it restarts, checks on which slot the new FM must be copied, writes into the flash, and starts again on new slot (and this is done at each update, so FM is running on SLOT1/2 alternatively).Everything works well, except the last step, it always run on slot 1 (even if all the code has been written in the slot 2).In the two first 32 bytes (0x0800 0000
Hello,I'm new to this STM32 products. We designed custom module with STM32F103CBT6TR. We are facing issue with serial boot loader.I'm using CH340 UART to USB converter module. CH340 MOD TX --> Our Module's RXCH340 MOD RX --> Our Module's TXCH340 MOD GND --> Our Module's GNDAnd our module is powered by USB connector.Boot mode configurationBoot 0 is HIGHBoot 1 is LOWI'm using STM32cube programmer tool.When I try to connect our module, I'm seeing the above error. Just to confirm CH340 module, I tried that with Nucleo board. With Nucleo board I can see it is able to connect without throwing any error.I tried other reccomondations which are mentioned in this community post like hold reset button and plug USB and then try pressing connect in the STM32cube programmer. But that also, didn't help. Any help will be really appreciated.Thank you.
From the ES0335 errata there are two errata that look pretty significant for dual bank boot (which I'm planning to use as the basis of field firmware update):2.2.8 Dual-bank boot not working when the boot in flash memory is selected by BOOT0 pinDescriptionWhen the nSWBoot0 option bit is set and the BOOT0 pin level is low, the dual‑bank boot does not work (BFB2option bit = 1).The user code is only executed when BANK 0 is valid.WorkaroundDo not rely on the BOOT0 pin to select the boot in flash memory. Instead, use the option bytes for that purpose,setting the nSWBoot0 option bit to 0, the nBOOT0 option bit to 1, and the BFB2 option bit to 1. This setting allowsthe correct check of the address 0 of the two memory banks, in order to execute from the correct one.2.2.9 Dual-bank boot fails with stack pointer placed within aliased SRAM2DescriptionIf dual-bank boot is selected through option bits, the bootloader checks the contents of either flash memory bankfor validity. It conside
The board was designed incorrectly, they have pins for a JTAG but forgot to actually route them to the MPU. The eMMC is not going to have a first-stage bootloader on it, and it's looking like it's not possible to flash an SPL to the eMMC over USB alone? Management won't be happy to do another board spin but it's sure looking like that's the only path forward.ChatGPT says:USB DFU alone cannot flash first-stage bootloader (SPL) to eMMC on a totally blank STM32MP135.This is not a dfu-util bug — it’s how the STM32MP1 ROM works.You need hardware access to write SPL + U-Boot to eMMC:Option A: SWD / JTAG (ST-LINK)CubeProgrammer can directly write SPL + U-Boot to eMMC.Option B: SD card bootThe ROM can load a SPL + U-Boot image from SD into RAM and then copy it to eMMC.
I have an I2C device that only operates with 1.8V logic (Pins are not 3.3V tolerant) that I want to connect to the STM32N6. I don't want to add an I2C redriver if I can avoid it. I want to keep as many of my I/O pins on the STM32N6 powered from 3.3V as I can. Which power rail on the STM32N6 determines the logic high voltage for the I2C bus? I want to use the 1.8V rail on my design for the I2C SDA and SCL pull-up resistors.Thanks
How can I activate CSI i STM32CubeIDE for STM32MP257?As you can see, I'm missing something.Any special clock I need to activate?I have activated CSI from DCMIPP. But still the CSI cannot get its pinns green.
Greetings everyone!I've been quite busy this year with other MCUs and haven't been able to continue my STM32 learning, but this year, 2026, it will be a priority. With that in mind, I've already started creating project templates with LwIP and other protocols, as well as useful drivers and libraries to facilitate my work.The big difference is that I'm releasing these projects as Open Source under the CC-BY-4.0 license, which will allow others to use them and learn along with me. I'm also open to suggestions to enrich these examples. Another great advantage is that I'm using CMake. I chose this approach to make project creation as easy and decoupled as possible.The pileline works as follows:* You can create the project via CubeMX, inserting all the necessary resources and middleware.* Then, simply make the desired adjustments and customizations.* From this point forward, the project build orchestration will be entirely via CMake.If any colleague would like to contribute to this in
Heyho,I'm working with a STM32G431 on a Nucleo-32.I've played with it before some years ago, so I already put on a 24 MHz crystal "HSE".I'm using only the in-built ST-Link's USB power as a source.Problem:after connecting USB, the reset button must be toggled to start the controller.Any ideas how this can be prevented?We want to use the Nucleo for some in-house testing, and it would be nice if the controller started instantly at power-up without the reset button (which might be "hidden" in a small case).Google and search here didn't really show this problem.Thanks!
I have an Queary ,How to design Firmware Of Bridge less Pfc Circuit ?For Below Specifiction input Voltage is varrible(Comes In AC) input current is constant (2.8 amps and 6.6amps )output voltage is constant 24vDCoutput Current Is 1.5AmpsNote : Input Device Name Is Constant Current Regulator .So kindly Suggest How To Design Firmware And Calculation Of Frequency As Per Circuit (Like Inductor RIpple And All)Circuit Digram Is Attached . Regards,Nilmani
Hello, I’m trying to transmit data at 2.5 Mbps (2500000 baud), but I’m not receiving any output. The same code works correctly at 2 Mbps, so the issue only appears when using 2.5 Mbps.I tested both 64 MHz and 40 MHz clock configurations for the UART. At 64 MHz, CubeMX shows a warning:“Real Baudrate set at BRR register is 2.461538 Mbits/sec. Error: -1.54%.”Because of this error, I switched to a 40 MHz configuration, which gives the exact 2.5 Mbps baud rate—but I still don’t receive any data.Is there any additional configuration required to make the MCU reliably transmit at 2.5 Mbps?
Dear STM32 Support Team, I am working on implementing CAN communication using the standard SAE J1939 protocol on an STM32-based platform and would like your guidance. Could you please suggest: Recommended STM32 example projects or application notes for J1939 over CAN. Any official STM32Cube examples, middleware, or partner stacks for J1939. Best practices for configuring the CAN peripheral (bitrate, filters, extended ID usage) specifically for J1939 on STM32. Recommended approach for reading GPIO inputs (three switches) and mapping them to different J1939 messages or PGNs. I am happy to provide details about my MCU part number, board, and current code if needed. Your support would be very helpful for moving this feature to completion. STM board: STN32F207ZG Thank you in advance for your assistance. Best regards,Suman Uppala
Hi, may I confirm whether the STM32H755 supports only the muxed PSRAM configuration? I want to experiment something with an unmuxed connection with separate data and address. Is there a work around on this or is it an internal design that I cannot change
Hello,We are using STM32U375xx/85xx MCUs and want to implement firmware update over UART using another MCU (ESP32-S3) in out application.The ESP32 will send the .bin firmware to the STM32 without using any ST utility (e.g., CubeProgrammer).From the STM32 AN2606 bootloader document, I understand that normally BOOT0/BOOT1 pins must be set to enter System Memory.Question 1 — Entering Bootloader via SoftwareWe want to enter the system bootloader purely by software, without toggling hardware BOOT pins.How can this be done on the STM32U3 series?Question 2 — Flashing Over UART from ESP32Could someone provide the correct sequence for flashing a .bin into STM32U375/85 using the UART bootloader protocol?(ESP32 will send the commands directly — no STM32CubeProgrammer involved.)Steps I am looking for:entering bootloaderUART initializationbootloader command sequence (GET, GETID, ERASE, WRITE, GO)any STM32U3-specific notesThanks in advance for any guidance.
Hello everyone.In a couple of past days I was trying to make the code execution from external PSRAM to work. I managed to load the code into external FLASH and then copy it to PSRAM at boot stage. The code runs nice but can't debug it for some reason. Debugging worked when I was running the code directly from external FLASH but when I introduced copying the data to PSRAM and running it from there I started to get errors. It wont even let me Run the program if I dont exit the debugger.I don't understand how it can't access the memory despite the application running fine. Edit: I found out that if I debug Boot project but add symbols from Application project too I can debug both fine.
Questions about the Transparent mode.The ST25R200 is cheaper then discrete components for a non-standard RFID interface ( at 848 KHz subcarrier )Questions about the transparent mode:I am struggling with the receiver in this mode.( An example with signal values from an oscilloscope, to just send a command and get the response would be enough.I assume the reponse being 10% modulation from the tag using the 848KHz subcarrier, for 102Kb/s standard bitrate. )Could someone give an indication about the signals coming out of the transparant mode.Is there a document?Just showing the TX being used to 'send a command' and the response on the receive channel would be really helpfulIn the picture in the datasheet, the receiver does have a 848KHz ( fs/16 ) receiver, followed by a dual ADC.( Is this a real ADC or just a comparator ? )( I and Q , I assume what is their sample rate ? 848 Khz, are these one bitter ? See questions further on)After these ADC there is a correlator ( Is this on the I and Q,
Hello everyone,I am working with the STM32F746G-Discovery board and trying to send ADC sensor data to a cloud server over Ethernet using LwIP (RMII mode). The goal is to send a JSON payload via HTTP POST.What I have implemented so farEnabled Ethernet (RMII) in CubeMXEnabled LwIP (static IP)Enabled ADC1 and UART6 for debuggingGenerated code using AC6/GCCAdded JSON formatting + http_post() callIssues I am facing1) HardFault during LwIP initializationThe system crashes right after:MX_LWIP_Init(); netif_set_up(&gnetif);A HardFault occurs before DHCP/static IP becomes active.2) DMA descriptor memory placement errorsThe compiler/linker shows errors such as:DMARxDscrTab memory out of rangeaggregate value used where integer expectedThe descriptors are currently placed like this:ETH_DMADescTypeDef DMARxDscrTab[ETH_RX_DESC_CNT] __attribute__((section(".RxDecripSection"))); ETH_DMADescTypeDef DMATxDscrTab[ETH_TX_DESC_CNT] __attribute__((section(".TxDecripSection")));I suspect the MPU configur
Hello, I have a problem after updating the system to Android 16. Before, everything was great. I have a custom application to work with ST25DV04KC. Now, the NFC service crashes before connection, and the system app opens NDEEF. Only on the first "tap," after turning NFC on/off, the connection is correct. Is there any workaround before they change it in Android? Thanks for any help.
I have a password obk file:$ xxd PasswordObkFile.obk00000000: 0001 fd0f 6000 0000 0000 0000 5e9b d65f ....`.......^.._00000010: e48e a17e 40ae 126f 76e7 c101 3a73 bf35 ...~@..ov...:s.500000020: c95d 4897 5c5d 1575 a719 8442 184a a46d .]H.\].u...B.J.m00000030: 8134 1172 7da0 dc9e 6418 6bb9 9072 89b5 .4.r}...d.k..r..00000040: aab4 b320 d26f ff5e a45d 8e3d 7750 0000 ... .o.^.].=wP..00000050: 0000 0000 0000 0000 0000 0000 0000 0000 ................00000060: 0000 0000 0000 0000 0000 0000 ............I am running my application with Trustzone disabled (TZEN=C3).I have a C array:static uint32_t obk_data[] = { 0x60000000, 0x00000000, 0x5e9bd65f, 0xe48ea17e, 0x40ae126f, 0x76e7c101, 0x3a73bf35, 0xc95d4897, 0x5c5d1575, 0xa7198442, 0x184aa46d, 0x81341172, 0x7da0dc9e, 0x64186bb9, 0x907289b5, 0xaab4b320, 0xd26fff5e, 0xa45d8e3d, 0x77500000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 };Using a function like this I am writing the contents to the OBK area using functions like this
Hello community,I recently tried to flash the BLE_SerialCom_Central example code onto the STM32WBA55 board. During the debug session, when I clicked the 'Suspend' button, a number of messages appeared in the debug window. I took a screenshot and attached it. I'm still struggling to find a solution to flashing the example code.It would be great if someone who has encountered this issue before could give me some advice.Best regards.
In AN5489, the HSE is recommended to have 40 MHz. Why 40 MHz?Why not 24 MHz HSE? Is 40 MHz a specific value for a certain pheripherial?
Good evening,I have been trying to get the ethernet port of my NUCLEO-H755ZI-Q to talk to my PC - and have been failing to do so now for a week.I found this manual, but it is for Cube IDE 1.9 - and even after following the described steps I fail to talk via ethernet.I did also find this github repo where I used STM32H7-LwIP-Examples/STM32H745_Nucleo_M7_ETH - and after adapting the IPs somewhat communication via UDP did work.So I am rather sure my hardware does work.But the code generated by CubeMX 2.0 does not.Can anyone provide me with eithera short manual how to configure CubeMX correctly,a ready-made example project using the current CubeMX 2.0,or any other input?The current problem with my CubeMX 2.0 generated project is that during reception I get an ETH_DMACSR_RBU /* Receive Buffer Unavailable */inside theHAL_ETH_ErrorCallback En- or disabling ICache, DCache and MPU did not have any effect. I did move the RX_POOL to 0x30040000 as per the article and adapt
Post edited by ST moderator to be inline with the community rules for the code sharing. In next time please use </> button to paste your code and a linker script content. Please read this post: How to insert source code. Hi im using STM32H745 MCU, in this for cache coherency for using DMA with any peripherals and using Clean and Invalidate data cache Functions will solve the full problem. if suppose if both the cache and MPU settings are disabled during this time also cache coherency will occur? MPU_InitStruct.Enable = MPU_REGION_ENABLE; MPU_InitStruct.BaseAddress = 0x00; MPU_InitStruct.Size = MPU_REGION_SIZE_4GB; MPU_InitStruct.AccessPermission = MPU_REGION_NO_ACCESS; MPU_InitStruct.IsBufferable = MPU_ACCESS_NOT_BUFFERABLE; MPU_InitStruct.IsCacheable = MPU_ACCESS_NOT_CACHEABLE; MPU_InitStruct.IsShareable = MPU_ACCESS_SHAREABLE; MPU_InitStruct.Number = MPU_REGION_NUMBER0; MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL0; MPU_InitStruct.SubRegionDisable = 0x87; MPU_InitStruct.DisableE
I have NUCLEO-WB05K/NUCLEO-WB07CC/NUCLEO-WB09KE only the NUCLEO-WB09KE can be connected to with Software Reset mode. The NUCLEO-WB05K/NUCLEO-WB07CC boards have the above error on connect. The Hardware Reset mode doesn't work with the NUCLEO-WB09KE (or the other boards). All STLink firmware up to date - not many jumper options to get wrong on these boards. Windows 11.
I'm trying to drive a display controller and have found it trickier than I anticipated, and I hope you can kindly help. My microcontroller is the STM32U545. My display controller is the UltraChip UC1628c_A, as part of a custom 160x160 monochrome LCD. Our display's only data interface is the S8 4-wire interface described on page 32 of that link. It's half-duplex SPI with an additional pin called Control/Data (CD), or sometimes Command/Data. Each byte of the message that we send is either Control or Data. We tell the controller which by driving the CD pin low for Control or high for Data during that byte (the controller reads that pin in the middle of the final bit). Each message starts with one or more Command bytes, and most messages are followed by one or more Data bytes (up to 160 bytes in my product). I expect that the display controller requires these bytes be sent as one continuous SPI message, without stopping the clock or changing the chip-select (slave-select) li
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