STM32 MPUs Products and hardware related

I realize this is probably a pretty basic question but I haven't found a way to have the M4 portion of the firmware startup when the STM32MP1 is powered up.  I'm currently using an STM32MP157D-DK1 board, if that helps. I was able to debug the code of the OpenAMP_TTY_echo_wakeup_CM4 example and all was working except trying to put the A7 to sleep (which made sense in my head.  Putting it to sleep could be problematic if I'm still debugging.  That said, it's still an issue when not in debug mode but I might save this for a separate thread).  When I end debug mode and reset the device, the program stops (which also makes sense as I assume either the M4 is not actually programmed or the program is not setup to start on reset). I found a video (https://www.youtube.com/watch?v=PsiFDHH87vo&t=600s) that shows how to load the firmware by moving the elf file via a flash drive and placing it in that folder (though apparently, putting it in debug mode essentially

Hi! I am working with stm32mp157c-dk2 and trying to establish communication between m4 and a7 cores. I analyze standard examples for this purpose, namely OpenAMP_TTY_echo. VIRT_UART initialization is presented here for m4 core:  log_info("Virtual UART0 OpenAMP-rpmsg channel creation\r\n"); if (VIRT_UART_Init(&huart0) != VIRT_UART_OK) { log_err("VIRT_UART_Init UART0 failed.\r\n"); Error_Handler(); } log_info("Virtual UART1 OpenAMP-rpmsg channel creation\r\n"); if (VIRT_UART_Init(&huart1) != VIRT_UART_OK) { log_err("VIRT_UART_Init UART1 failed.\r\n"); Error_Handler(); } /*Need to register callback for message reception by channels*/ if(VIRT_UART_RegisterCallback(&huart0, VIRT_UART_RXCPLT_CB_ID, VIRT_UART0_RxCpltCallback) != VIRT_UART_OK) { Error_Handler(); } if(VIRT_UART_RegisterCallback(&huart1, VIRT_UART_RXCPLT_CB_ID, VIRT_UART1_RxCpltCallback) != VIRT_UART_OK) { Error_Handler(); } After flashing is issued: [ 111.672943] virtio_rp

Hello, I've tried measure period of  GPS PPS which is very high accuracy. I'm using TIM5 input capture mode, reset slave mode. The TIM5 CCR1 gives value 208877646 that is wrong because I use high accurate generator for sys clock. The right value is about 209000000. So maybe anyone meet the problem? Thanks,Alex.

Hello,I'm working with the STM32MP15 and have found a problem with USART1 during the boot process on a secure boot enabled (TZEN) hardware. The system freezes when U-Boot tries to reset USART1.The problem is with the RCC_APB5RSTSETR register (0x188). This register, including the USART1RST bit, can only be changed in secure mode (by OP-TEE) because of the TZEN restriction. However, U-Boot (non-secure world) attempts to modify this register by default. This is because of arch/arm/dts/stm32mp15-u-boot.dtsi:&usart1 { resets = <&rcc USART1_R>; };The ST devkits use UART4RST, this is not TZEN protected. But USART1 is and that causes a bus error:The system freezes.I solved this by using SCMI (so that OP-TEE does the actual reset):resets = <&scmi_reset RST_SCMI_USART1>;Initially, I thought to put this change in my stm32mp153c-custom-scmi.dtsi, but that ...u-boot.dtsi overrides it. So, the change needs to go in a stm32mp153c-custom-u-boot.dtsi.It took me half a day to fi

Dears,I use STM32MP151FAD3 together with STPMIC1. Nowdays I monitored the voltage of vddcore and found it's not stable shown as below.Mostly it's around 1.2v while sometimes it's up to 1.33v .Referring to documentation, I guess it's casued by dynamic voltage and freqency scaling (DVFS). Is my thought correct? Also, is it a normal scenario? will the ustable vddcore have any inflence on EMC?

I have a custom board based on stm32mp157f-ev1 and stm32mp157f-dk2 board.In my custom layer:meta-st/meta-st-openstlinux/conf/distro/* copied and a new distro created based openstlinux-weston.confmeta-st/meta-st-stm32mp/conf/machine/* copied and a new machine created based stm32mp15-eval.confa new image recipe created based meta-st/meta-st-openstlinux/recipes-st/images/st-image-weston.bblinux-stm32mp, u-boot-stm32mp, tf-a-stm32mp DTS files tuned using openembedded devtool.Image built using:$ DISTRO=mydistro MACHINE=mymachine META_LAYER_ROOT=layers/mylayer layers/meta-st/scripts/envsetup.sh$ bitbake-layers add-layer ../layers/mylayer$ bitbake myimageFlashed on sdcard and try to boot, but stucked after RAMDISK error message:[    2.714949] hub 2-0:1.0: USB hub found[    2.717446] hub 2-0:1.0: 2 ports detected[    2.726168] RAMDISK: Couldn't find valid RAM disk image starting at 0.[    2.731801] Waiting for root devi

Hello,I need to change the SD card interface voltage on stm32mp157f-evl board.As per my understanding we can control this via uSD_LDO_SEL, it can be 2.9volts or 1.8 volts.I need to change to 1.8 volts, how can one control this one via software?Warm regards,S

On STM32F4 has this and it is very easy to use. Does STM32MP15 -M4 MCU have same one?  

Hi, we make custom board base on STM32MP15 and without PMIC and have problem with power off command.Does anyone know any document or hint about this? All research we have found always include PMIC.  

Hello, i'm currently working on the stm32mp135f-dk with the kirkstone yocto version for layers provided by st. I'm trying to double all fs partitions (rootfs bootfs and userfs) to implement a software update mechanism with an active set of partitions and another one that will be used after being updated. My Flashlayout.tsv file generated by bitbake is the following:#Opt Id Name Type IP Offset Binary - 0x01 fsbl-boot Binary none 0x0 arm-trusted-firmware/tf-a-stm32mp135f-dk-usb.stm32 - 0x03 fip-boot FIP none 0x0 fip/fip-stm32mp135f-dk-optee.bin P 0x04 fsbl1 Binary mmc0 0x00004400 arm-trusted-firmware/tf-a-stm32mp135f-dk-sdcard.stm32 P 0x05 fsbl2 Binary mmc0 0x00044400 arm-trusted-firmware/tf-a-stm32mp135f-dk-sdcard.stm32 P 0x06 metadata1 Binary mmc0 0x00084400 arm-trusted-firmware/metadata.bin P 0x07 metadata2 Binary mmc0 0x000C4400 arm-trusted-firmware/metadata.bin P 0x08 fip-a FIP mmc0 0x00104400 fip/fip-stm32mp135f-dk-optee.bin PED 0x09 fip-b FIP mmc0 0x00504400 none PED 0x0A u-boot-e

hi experts i am not sure this is a right place to use  and  not good at English     please be generousi am not good at linux , i read a wiki "STM32MP15 RAM mapping" and googled some informationi use kernel and u-boot from developerPackagei have no plan to use M4 , so i like to give  MCU sram to linux systemin device tree  if i remove "no map"  property in reseved memory's retram, mcuram,mcuram2  configuration  and also  remove  m4_rproc's memory-region property  is it enough ?without no-map    does  MCURAM which  has  device tree with "compatible = "shared-dma-pool"  be used as linux system shared-dma-pool ? another question is  from wiki  3.3.2.2.MCU SRAM4  i can't find  example  configuration in device tree, where could i get that ? thank you  sincerely  

Hi there, I am working on an OSD32MP157F custom board inspired by STM32MP157F-DK and Octavo Red boards. The pinout is very similar to the stm32mp157f-dk with the main difference that the Murata LBEE5kL1BX-883 is connected to sdmmc3 instead of sdmmc2 and that there is no ethernet peripheral on the board. Some time ago I attempted to configure the LBEE5kL1BX WiFi part and I faced an NVRAM configuration conflict as explained here. After updating bootargs3 on sdio.txt the WiFi firmware was able to load and Wlan0 interface is functioning as expected since then. Last couple of days I attempted to enable Bluetooth on the same board too. After following Bluetooth Overview I enabled all necessary linux drivers including HCI UART driver, Bluetooth HighSpeed features etc. I also enabled Bluetooth on the dts following the BRCM documentation and the DK2 dts example. Main difference is the pinout is slightly different as seen on the dts below:   &nbs

Hi, we need a buffer about 200KB on CM4 MCU (STM32MP153)We change the linker file as below, that allow 256KB heap (combine SRAM2 and SRAM3)But every time the buffer has more than 0x30000 (192KB) then it is failed, seem we can't combine SRAM2 and SRAM3 into one buffer. If the buffer stays on SRAM2 or SRAM3 only then it works, but if the buffer starts on SRAM2 and the end is on SRAM3 then fail.Does anyone know the reason?      

I would like to use the Murata Wi-Fi/BT combo module 2BC on STM32MP1.Is it possible?If it is possible, I would like to know how to integrate 2BC on STM32MP1. I understand following.- Murata 1DX are mounted on STM32MP1 evaluation board.- Murata has the necessary FMAC and other files.  https://github.com/murata-wireless- CYW4373 description in the file below.  https://github.com/torvalds/linux/blob/master/include/linux/mmc/sdio_ids.h  Best Regards,Tsutsumi

Hello!I have a MP1 board (STM32MP157), and i was wondering if one can have control over which individual pins are used when it comes to FMC. I want to use FMC for PSRAM, 8-bit data mode, but the pin that corresponds to FMC_A2 is already in use (PF2), which would leave me with only 2 address pins (A0 and A1). Would it be possible to skip that pin and have for example FMC_A0, FMC_A1, FMC_A2, FMC_A3 as address pins? It doesnt seem to be possible directly with the CubeIDE but maybe it can be configured via the Device TreeThanks in advance

Hi ST Community,I am trying to flash a eMMC with STM32CubeProgrammer, in a STM32MP157F custom board. I am using a GPT partition file and a img.I can see the system is creating partitions and flashing, but the structure is wrong for eMMC, so it does not boot-up. Sometimes, trying different structures, I get an error "wrong memory layout" in the console when I am trying to flash.The tsv file I am using at the moment is:And the gpt table is as follows:I believe the solution is in the right configuration of the table, can somebody detail on how to do it?Thanks.

I have a board where a secondary CPU can select the STM32MP1's boot mode.  On initial boot, the MP1 boots from NOR flash.  I can then send a command to the secondary CPU which switches the MP1's BOOTx pins to enable engineering boot and resets the MP1.  When I am done, I send a command to the secondary CPU to boot the MP1 from NOR flash.  However, after I switch out of engineering mode, the MP1 only runs the serial loader.  I have to power cycle the board to make the MP1 boot from NOR flash.  Also, I have to let the board sit for a few seconds before powering it up or the MP1 goes to serial loader again instead of NOR boot.Is this a limitation of the MP1 boot process, or is there a way I can reset the MP1 to boot from NOR flash without cycling power?

Recently for a design I had used STM32 MPU (part# "STM32MP157FAA1") with DDR3L (part# "NT5CC256M16ER-EK"). For simulating data & address lines from the IBIS model "ibis5_4gbddr3_e_1p35_0c~95c.ibs" in ANSYS for 500MHz frequency the source transmitter eye waveform itself doesn't look proper. Attached the parameter setup and also the eye diagram waveform image for one of the data lines for reference.What would be the cause of this distorted signal from the source itself? Suggest for any changes if required from the parameter setup point of view.  

Hi there, I am developing on an STM32MP157. We are trying to add two Linux virtual network interfaces that specify a VLAN ID using networkd. Specifically, we specify IDs 20 and 30. We do not specify VLAN ID 0. On boot, networkd successfully creates the first interface, but fails to create the second interface with the following error: stm32-dwmac 5800a000.ethernet eth0: Adding VLAN ID 0 is not supported [...] stm32-dwmac 5800a000.ethernet eth0: Only single VLAN ID supported  Looking at the stdwmac.c driver, I see if (hw->vlan_filter[0] & GMAC_VLAN_TAG_VID) { netdev_err(dev, "Only single VLAN ID supported\n"); [...] } I have tried to enable the following kernel configs, to no avail. What is interesting is that with these enabled and not trying to use the VLAN IDs, I still see the `Adding VLAN ID 0 is not supported` error. BRIDGE_VLAN_FILTERING=y NET_ACT_VLAN=y VLAN_8021Q=y `BRIDGE_EBT_VLAN=m`, `VLAN_8021Q_GVRP=y`, `VLAN_8021Q_MVRP=y` are

I have a stm32mp135f board (I'm mainly interested in Linux capable SoC) and I am trying to learn something about trusted firmware a, optee, and secure boot solutions. Although the documentation is pretty decent I don't see how I could test the whole solution from bottom to up, namely how to perform the full boot with all stages being authenticated without writing anything to OTP memory. When it comes to ATF and u-boot I see some ways to stub eg. the part of the implementation to use other keys or perhaps use the debugger to stop bl2 and write a key hash into so-called shadow registers (probably, it's just my guess), however from what I understand there is no way to stub a root of trust key, which is used by the boot ROM to authenticate bl2. I can imagine that there could be eg. some configuration in (in this case) st binary header that would indicate for the boot ROM that it should use key hashes that are eg. appended to the binary instead of OTP. I would like to avoid writing anything

Hi,What am I doing wrong that USART1 returns -2 during the probekernel.dts -> PINS   usart1_pins_mx: usart1_mx-0 { pins1 { pinmux = <STM32_PINMUX('A', 9, AF7)>, /* USART1_TX */ <STM32_PINMUX('A', 12, AF7)>; /* USART1_RTS */ bias-disable; drive-push-pull; slew-rate = <0>; }; pins2 { pinmux = <STM32_PINMUX('B', 15, AF4)>; /* USART1_RX */ bias-disable; }; }; usart1_sleep_pins_mx: usart1_sleep_mx-0 { pins { pinmux = <STM32_PINMUX('A', 9, ANALOG)>, /* USART1_TX */ <STM32_PINMUX('A', 12, ANALOG)>, /* USART1_RTS */ <STM32_PINMUX('B', 15, ANALOG)>; /* USART1_RX */ }; };    Kernel.dts -> Node   &usart1{ pinctrl-names = "default", "sleep"; pinctrl-0 = <&usart1_pins_mx &usart1_pins_z_mx>; pinctrl-1 = <&usart1_sleep_pins_mx &usart1_sleep_pins_z_mx>; status = "okay"; /* USER CODE BEGIN usart1 */ /* USER CODE E

Please tell me how to set the wake-up button (PA0:PWR_WKUP) as a return factor from LPLV-Stop mode and set STM32MP157f-EV1 to LPLV-Stop mode.

Hi all.I am adding a new user to my Linux image. After generating the image I verify the `/etc/passwd` on the rootfs and the new user is not present. When I try to login to this new user on the running image itself, it doesn't work. As I am using the "read-only-rootfs" feature, I think some extra setup is required to fix this issue. In order to build my recipe, I followed the instructions from useradd-example.bb .How to add a new user properly with the read only rootfs feature? PS. I am setting another partition on the /home. So this folder is writable. Thanks

HiI see the STM32MP135 has an ISO7816 interface. Have you developed a compatible Linux device driver for the ISO7816 interface? There exist a software framework to use the SAM (Secure Module Access) Card connected to this interface?Thank you,

Hi!I am trying to have full secure booting on the stm32mp platform, using FIP and fitImage on a custom distribution built using Yocto with the meta-st-stm32mp layer.For the fit image signing, all steps are well described here [st wiki ] :https://wiki.st.com/stm32mpu/wiki/How_to_create_Signed_FIT_image_from_Distribution_packagei haved added those modifications directly on stm32mp13-disco.conf (just for testing)But i have this warning :WARNING: u-boot-stm32mp-v2021.10-stm32mp-r2-r0 do_deploy: Failure while adding public key to u-boot binary. Verified boot won't be available.So my kernel is well loaded but the signature is not checked.I have changed nothing else after doing my repo sync (openstlinux/ yocto [ kirkstone]).Is something there to add on configurations in order to implement FitImage signing ?thanks.