STM32 MPUs Products and hardware related

We are using customised board on stm32mp257f microprocessor. We have used STM32MP257F-DK as a reference for the hardware design. In our customized board, we have used  LVDS panel and kept the LVDS section same as that of STM32mp257f-dk board. The board boots up and kernel is loading properly. But lvds panel is not working. Please find below the error logs in u-boot and kernel.Receiving following uboot log:stm32_ltdc_probe: Startedstm32_display display-controller@48010000: stm32_ltdc_probe: LTDC hardware 0x40101stm32-display-dsi dsi@48000000: stm32_ltdc_get_panel(dsi@48000000): no UCLASS_DISPLAY for remote-endpointstm32-display-dsi dsi@48000000: stm32_ltdc_get_panel(dsi@48000000): no UCLASS_DISPLAY for remote-endpointstm32_display display-controller@48010000: Device failed ret=-22stm32_display display-controller@48010000: stm32_ltdc_display_init(display-controller@48010000): no UCLASS_VIDEO_BRIDGE for remote-endpointstm32_display display-controller@48010000: Device failed ret=

Hello,We are working with the STM32MP257F-FK Discovery board and are facing an issue while calculating the signature of a memory region.We are following the recommended sequence for initiating the signature computation. The CRCEOC flag is being set as expected, indicating that the operation has completed. However, the resulting CRC value in the corresponding register remains 0x00 instead of the expected signature.Could you please help us understand why the CRC result is not being populated and advise if there are any additional steps or configuration requirements specific to this device?Below is the exact sequence we followed, as documented:Write 0x0 to CRCC[1:0] in RAMCFG_xCCR1 to deactivate the CRC.Write 1 to SRAMHWERDIS in RAMCFG_xCR to disable hardware erase.Select the buffer size for the CRC computation by configuring CRCBS[2:0] in RAMCFG_xCCR1.Write 0x1 to CRCC[1:0] in RAMCFG_xCCR1 to activate the CRC.Write 1 to CRCCS in RAMCFG_xCCR2 to start the CRC computation.As per the refere

Hello! I've been fighting with the MP13 for a couple months now in trying to enable reading/writing to the NAND, as well as configuring ethernet and keep running into issues with being unable to update the necessary registers for this. When writing to the extended truztone protection registers, no change is made. The clock's enabled, so that shouldn't be it. Within the reference manual, it states "ETZPC registers are write-secure (that is, read accesses are allowed by secure and non-secure domains, write accesses are allowed by the secure domain only". I've yet to figure out how to be in the "secure" domain to update these bits so I can actually use most of the features of this board without using Digi's yocto builds.Any thoughts/advice on the above?

Hi,We're working on a new open source wildlife camera system and planning to use ST's 1.5 Mp and new 5 Mp image sensors with an STM32N6x7 series MCU for routine MIPI CSI-2 camera interface, ISP, h.264 video encoding, storage and possibly CNN (Convolutional Neural Network) inference with a separate STM32MP25x booting embedded Linux when advanced functionality is needed.We were wondering if it would be a practical possibility at all to use an STM32MP25x series MPU with bare metal for routine MIPI CSI-2 camera interface, ISP, video encoding and storage tasks as well as for running embedded Linux or if this would be a theoretical possibility but potentially practically difficult to implement?Moe about ST image sensors:https://www.st.com/en/imaging-and-photonics-solutions/industrial-consumer-cmos-image-sensors.htmland about our conservation work:https://new-homes-for-old-friends.cairnwater.com/quick-summary-new-homes-for-old-friends-belgium/Thank you for your help! / Mer

Hello,We are using an STM32MP151 on a custom board and facing an issue with USB device connection via EHCI (USB 2.0).Problem description:After issuing a PORT_RESET, the J/K chirp sequence does not start, and we get a timeout error.If we disable EHCI and use OHCI, the device connects successfully.Hardware difference compared to evaluation board:Our design does not include a high-speed hub IC.The USB Type-A connector is directly connected to the STM32MP151.Questions:Has anyone experienced similar behavior on a custom board without a high-speed hub?Are there any hardware design requirements (VBUS, RREF resistor, clock quality) or Device Tree settings that need to be adjusted for EHCI operation?Any recommended debug steps for this issue?Additional info:Kernel logs show timeout after PORT_RESET.OHCI works fine for full-speed devices.Any guidance or suggestions would be greatly appreciated.Thank you!

We ordered an STM32MP257F-DK evaluation board - DigiKey part number "497-STM32MP257F-DK-ND" - on 25 September 2025 and had it delivered to Zürich.On 15 October 2025 we ordered the same ST STM32MP257F-DK evaluation board with DigiKey part number "497-STM32MP257F-DK-ND" for delivery to one of our developers - Paul - working remotely.Paul booted the ST STM32MP257F-DK board using the SD card that was supplied with it and was able to take it into and out of suspend-to-RAM with no problems however when we try to reproduce this with exactly the same steps with the ST STM32MP257F-DK here in Zürich it fails to waken from suspend-to-RAM.We thought that it could be a difference in the images on the ST cards for the two boards so we copied the image for the SD card on the board delivered to Paul and tested it on the board here with exactly the same results.We also checked that the WakeUp switch on the board is electrically functional - when I press it:[ 290.372530] optee: no desc for optee IT:1We

Hi everyone,I’m trying to connect a MIPI CSI camera to my STM32MP257F-DK board. I’m using Yocto (branch scarthgap) with core-image-minimal and created a custom Yocto layer to patch the device tree located at arch/arm64/boot/dts/st/stm32mp257f-dk.dts.The camera I’m working with uses the I²C address 0x3c, which unfortunately is also used by the ADV7535 HDMI chip on the STM32MP257F-DK board. As shown below (from the stm32mp257f-dk.dts file and i2cdetect), the ADV7535 occupies multiple addresses on I²C2:adv7535: hdmi@3d { compatible = "adi,adv7535"; reg = <0x3d>, <0x3c>, <0x3f>, <0x38>; reg-names = "main", "cec", "edid", "packet"; ... };  0 1 2 3 4 5 6 7 8 9 a b c d e f 00: -- -- -- -- -- -- -- -- 10: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 20: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 30: -- -- -- -- -- -- -- -- 38 -- -- -- 3c 3d -- 3f 40: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- ...My main question is: how can I connect my camera when

Spoiler (Highlight to read)  Hi,I created a TouchGFX project for the STM32MP135F-DK board. When compiling the project, the error listed below appeared. Despite the error, I was able to load and debug the application on the board using the same procedure applied to any example running on DDR memory.I verified that "the application binary file 'STM32MP135F-DK.stm32'" was not generated in the folder: Project Folder>\Binary\apps\STM32MP135F-DK.stm32 as per the link:https://wiki.st.com/stm32mpu/wiki/How_to_install_X-TouchGFX_MPU_AddonI am using a computer running Windows 11, is it necessary to install any additional software to generate this file? make -j12 all arm-none-eabi-size STM32MP135F-DK.elf text data bss dec hex filename530448 785264 134112 1449824 161f60 STM32MP135F-DK.elfFinished building: default.size.stdout ../../Utilities/ImageHeader/postbuild_STM32MP13.sh "C:\ST\STM32CubeIDE_1.18.1\STM32CubeIDE\plugins\com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for

Hello guys!I am trying to configure U-Boot on a stm32mp257f-dk board so that I can use the “ums” command with SuperSpeed. After configuring the device tree, I managed to configure the usb3dr as usb3(as it says in the debug printf written on the terminal after calling the command). After doing this and running the “ums” command, in the console I get an error message saying “Cannot get PHY1 for usb@48300000”. After a little bit of research, I could not find a combophy driver in the U-Boot source code. Fast forward, I managed to do a configuration for the COMBOPHY(porting it from the linux driver), and it does not return any error. The command works now but it falls back silently from SuperSpeed to HighSpeed. My question is, even if the COMBOPHY is configured properly in U-Boot, is the dwc3-generic U-Boot driver capable of configuring the USB3DR peripheral to do the handshake for SuperSpeed?I managed to verify the SuperSpeed in Linux so there isn't any Hardware problem rela

hi team,I'm facing issue connecting stm32mp25 gui tool with the STEVAL$USBI2CFTA bridge, the GUi tool says No bridge connected.I still haven't connected the other end of the USBI2C bridge to PMIC stpmic25a.I have installed the required FTDI 260Q drivers, and also the FTDI testing software which detects the usbi2c bridge and im able to send the i2c messages and detect the slave, but the STPMIC25 GUI says no bridge connected.FYR im using windows 11.Hoping for a quick reply for this issue. Thanks in Advance.

hi, I'm trying to debug stm32mp157f-dk2 by using stm32cubeide by using open OCD and gdbAfter connection, I'm constantly getting below error.I can't even single step in or run.  "failed to insert all hardware breakpoints; you may have requested too many hardware breakpoints/watchpoints"

I have developed a c application, I have some html pages that are ran through nginx . For now they are exposed , any one gets the board access can see these files and copy the files.  My question is How can I secure my files.

I know that USB3DR cannot be used with PCI Express if USB3DR is configured as SuperSpeed.But can USB3DR be used with PCI Express if USB3DR is configured as 2.0 e.g Hi-Speed?

I aim TO drive a mipi display screen on STM32MP257F-EV1, so I have to understand the DRM framework.After flash the new firmware, I found that the modetset always shows errors, so I want to confirm whether the support in this aspect is OK? But watching your previous video, it can drive LVDS screen, so I feel very strange, is there anything else I need to pay attention to? STM32_Programmer_CLI -c port=usb1 -w ./flashlayout_st-image-weston/optee/FlashLayout_sdcard_stm32mp257f-ev1-ca35tdcid-ostl-m33-examples-optee.tsv   root@stm32mp2:~# modetest -M stm failed to open device 'stm': No such file or directory as you can see, all are failed. root@stm32mp2:~# modetest trying to open device 'i915'...failed trying to open device 'amdgpu'...failed trying to open device 'radeon'...failed trying to open device 'nouveau'...failed trying to open device 'vmwgfx'...failed trying to open device 'omapdrm'...failed trying to open device 'exynos'...failed trying to open device

This page mentions that you are supposed to use tar xf for SDK extraction. Unfortunately this doesn't work for the latest SDK 6.6 (scarthgap), it looks like the SDK is just a tar archive and not compressed. $ tar xf en.SDK-x86_64-stm32mp1-openstlinux-6.6-yocto-scarthgap-mpu-v24.11.06.tar.gz tar: This does not look like a tar archivetar: Skipping to next headertar: Exiting with failure status due to previous errors$ tar xzf en.SDK-x86_64-stm32mp1-openstlinux-6.6-yocto-scarthgap-mpu-v24.11.06.tar.gz tar: This does not look like a tar archivetar: Skipping to next headertar: Exiting with failure status due to previous errors$ file en.SDK-x86_64-stm32mp1-openstlinux-6.6-yocto-scarthgap-mpu-v24.11.06.tar.gz en.SDK-x86_64-stm32mp1-openstlinux-6.6-yocto-scarthgap-mpu-v24.11.06.tar.gz: gzip compressed data, from Unix, original size modulo 2^32 934342372 gzip compressed data, unknown method, ASCII, was "", encrypted, from FAT filesystem (MS-DOS, OS/2, NT), original size modulo 2^32 93434237

I am currently using the distribution version:V5、rt 6.1.82-rt patch、stm32mp257Currently, the SPI interface is bound by default power-domains;I don't want the SPI interface to enter sleep mode during idle time, as it may cause Oops issues1.How can I prevent it from entering the regulation of this power domain? Do you want to directly delete power domains in the device tree?2.Once power domains are deleted, will SPI peripherals not enter power consumption adjustment? Or is it in an unknown state?

Hi,I need help to setup the DeviceTree for our custom board using STM32MP135FAE7 and TI TLV320AIC3254.I have read the Wiki about SAI and read and tried to implement SAI using these posts as reference:https://community.st.com/t5/stm32-mpus-products/stm32mp135-pcm5102a-sai1a/td-p/573289https://community.st.com/t5/stm32-mpus-embedded-software/stm32mp135-sai-missing-clock-error-at-boot-time/td-p/55114https://community.st.com/t5/stm32-mpus-products/help-in-creating-a-simple-soundcard-with-i2s-or-sai-if-necessary/td-p/568430/page/2No Luck.And also got confused about where to put the Codec. On the Wiki Page here shows codec under i2c node but on this post there is a comment from @Erwan SZYMANSKI saying that codec should be under root not I2C or I2S. How should I decide where to put it, is it depending on the IC ? What am I missing?and following those comments, I have enabled the configs related to codec in the config file and updated the kernel and they show up.CONFIG_SND_SOC_T

This page is currently empty:   How to build and debug boot project on STM32MP25 CortexM33 in STM32CubeIDEHere's how to get to the page:STM32MP2Dev | Product - STMicroelectronicsClick on the first Wiki link (9 of 9), then you get to this page:How to build and debug boot project on STM32MP25 CortexM33 in STM32CubeIDE - stm32mpu 

Can someone explain how to build own custom yocto linux ?I have experience with raspberry pi, but stm32mp2 have none normal explanation.I have cloned from git scarthgap branch of poky, meta-openembedded, meta-st-stm32mp and meta-st-openlinux. Also, I have downloaded stm32mp SDK.I can't understand if cubemx project for the board is needed ?if needed how to add it if I have generated it ? I have many years of embedded programming of stm32I can't find any build machine for bitbake for stm32mp257f-ev1 ?Overall, trying to build default machine="stm32mp2" gives plenty errors, which I cannot understand.Maybe someone can provide very direct explanation for building image ?

In accordance with the booting procedure for STM32MP2 https://wiki.st.com/stm32mpu/wiki/STM32MP2_backup_registers#Boot_mode_selection_feature ROM analyzes the BOOT_MODE register and decides to switch to serial boot mode: "The ROM code executes a serial boot if BOOT_MODE[7:0] is equal to 0xFF". It is TAMP_BKP96R (0x46010280) for STM32MP2xx processors. And if I write 0xff there and do a reset, then the processor will reset and go into USB boot mode. In Linux, there is a command for this: reboot romcode_serial.This mode and this command worked perfectly in STM32MP1xx processors but does not work at all in STM32MP2xx.Moreover, I even tried writing directly to this register in U-boot mode and doing a reset - the result is the same, this mode does not work. Is there any special feature in this mode for STM32MP2XX series processors or is this a ROM code issue?  

My design is based off STM32MP257F-EV1. In which a RTL8211F-CG Ethernet Transceiver is used. My question is on Pin 39 (RSET) of the transceiver. A 2K49 resistor is used. Where does this value come from? Is it a recommendation from Realtek supplier?

We are working on a custom board based on STM32MP257F-AI3. We flashed an X-Linux RT patched image via SD card in boot mode 0001(A35-Master), and in the ST Cube Programmer flashing completed successfully with a "download successful" pop-up in when boot mode USB/UART switches configuration is 0000.After powering off, we set the boot switches to 0010 (eMMC boot, A35 master), but the board fails to boot properly from eMMC.Could you please help us identify:Whether the image correctly written to the eMMC boot partitions (FSBL, SSBL, U-Boot, etc.)?Any mandatory post-flash steps required for enabling eMMC boot on STM32MP257?The correct boot configuration (TF-A, OP-TEE, U-Boot, extlinux or boot partition flags)Any guidance on debugging or verifying the eMMC boot flow would be helpful.

 Hello,I am working on STM32MP2 using the OpenSTLinux Weston distro and I am modifying the OP-TEE/device-tree files under the external-dt workspace using devtool.I need to remove a pin definition from the CA35 OP-TEE DTS files, but even after rebuilding the image, the pin still appears in the running system:  line 8: "PI8" input consumer="kernel"  This means my change was not applied.Steps I followed1. Environment setup  DISTRO=openstlinux-weston MACHINE=stm32mp2-rt source layers/meta-st/scripts/envsetup.sh  2. Opened the external-dt workspace  cd build-openstlinuxweston-stm32mp2-rt/workspace/sources/external-dt/devtool build external-dt  3. Edited the following DTS files to remove a tamper-related pinFiles I modified and added to git:stm32mp2/a35-td/optee/stm32mp257f-ev1-ca35tdcid-ostl-m33-examples.dtsstm32mp2/a35-td/optee/stm32mp257f-dk-ca35tdcid-ostl-m33-examples.dtsstm32mp2/a35-td/optee/stm32mp257f-ev1-ca35tdcid-ostl.dtsstm32mp2/a35

hello ST:     I used the stm32mp257 platform for KGDB debugging and found that it always resets the watchdog.     I tried to disalbe the relevant nodes in the device tree of the kernel and optee:      ///kernel： &arm_wdt { /*timeout-sec = <32>; status = "okay";*/ status = "disabled"; }; //Optee: &iwdg1 { /*timeout-sec = <32>; status = "okay";*/ status = "disabled"; };Will it still cause the system to restart after a period of time? How should this be handled?and this html Open fail~    

Hello ,I have developed a custom board using the STM32MP157DAA1. Its design is very similar to the STM32MP157-DK2.I am trying to build and boot TF-A and OPTEE. However, I am encountering an "I/TC: Forced system reset PSCI" error, which causes the system to enter a programming loop.Below is the CubeProgrammer log during this loop state:16:33:55 : USB speed   : High Speed (480MBit/s) 16:33:55 : Manuf. ID   : STMicroelectronics 16:33:55 : Product ID  : DFU in HS Mode @Device ID /0x500, @Revision ID /0x0000 16:33:55 : SN          : 002700303532510837363531 16:33:55 : DFU protocol: 1.1 16:33:55 : Board       : -- 16:33:55 : Device ID   : 0x0500 16:33:56 : Start Embedded Flashing service 16:33:56 : Opening and parsing file: tf-a-stm32mp157d-a_cv2-mx-optee-programmer-usb.stm32 16:33:56 : Memory Programming ... 16:33:56 :   File          : tf-a-stm32mp157d-a_cv2-mx-optee-programme