FAQ: How to bring up STM32MPx
The new design board is received and you wonders how to get started.
Design is composed of STMP32MPx , DDR RAM , STPMIC1 or STPMIC2 for power supply, a boot flash device.
How to configure the boot loaders to your application ?
What to check if the boot chains fails to start or return errors ?
What tool to download the software in Flash?
- Procedure
Describes what has to be configured to load for the first time :
- the TF-A FSBL in SYSRAM
- the Uboot SSBL & OP-TEE in DRAM.
TF-A and Uboot OP-TEE firmwares can be loaded from serial link boot device (USB or UART) or from a boot flash device like SDcard, eMMC, SLC NAND, Serial NAND, Serial NOR.
This article applies for STM32MP1 and STM32MP2 series.
Additional resources:
- Lab for TF-A& Uboot device tree creation for STM32MPUs part number adapted to your design with STM32CubeMx
- How to validate STM32MP1-DRAM connection on PCB
- We recommend strongly to read
>>>>>>>provide the correct URL for STM32MPUs bring-up troubleshooting guide
or
https://wiki.st.com/stm32mpu/wiki/Bring-up_troubleshooting_grid
- STM32MPU forum and other FAQs
1 Adapt the TF-A configuration to your PCB application
Configuration is done in the device tree files of TF-A.
Two possibilities :
- if your PCB is exactly the same as ST reference boards for the HSE/UART/IC24 or I2C7 on STM32MP257D-DK for PMIC/DRAM/SDMMC sub-systems you can reuse the TF-A binary provide in the starter package.
- if your PCB is different from ST reference board -other STM32MPx, DRAM, Flash, GPIOs-, the method is to create TF-A , OP-TEE, U-boot and Kernel device tree files from empty files and add the ‘nodes’ of the ST32MPx peripherals used by your application.
For the peripherals driver used in by TF-A there is a relative ‘node’ in the device tree file that provides the driver configuration. The link below for each peripheral points on the device tree node parameters. https://wiki.st.com/stm32mpu/wiki/Category:Device_tree_configuration. These articles provide links to the driver ‘binding files’ (st,txt files) that gives the meaning of the node parameters. These parameters are in majority the same across TF-A, Uboot and Kernel.
To elaborate the device tree file, you start a STM32CubeMX project from STM32CubeMx MCU selector. STM32CubeMX generates partially the device tree.
The device tree files generated by STM32CubeMX are incomplete, it cannot be used as it.
The device tree files generated by STM32CubeMX are incomplete, it cannot be used as it.
The STM32CubeMX generated device tree will contain the GPIO pin muxing (STM32CubeMx is doing checks to prevent issues where GPIO would have multiple definitions), the RCC settings, the DRAM configuration and HW execution context for peripheral isolation. The driver nodes properties are not generated by the tool.
All these nodes must be manually inserted under “USER_SECTION” . You must set the right parameters that are adapted to the components on your PCB (USB, Flash, DRAM, Power supplies tree, etc). To find the right properties you have the wiki device tree articles and the ST reference boards device tree files in OpenSTlinux source files.
Be careful, the parameters presented in the wiki page are for the ST board and may not be adapted to your design.
Be careful, the parameters presented in the wiki page are for the ST board and may not be adapted to your design.
There is bring up example with ST board in the lab Lab-BringUpFromPartNumber to get used with this device tree creation process. This lab can be used as getting started to create your device tree files suitable for your STM32MP1 or STM32MP2 part number and your design.
You can get access to it in
https://community.st.com/s/article/FAQ-STM32MP1-How-to-create-a-device-tree-adapted-to-your-design-with-STM32CubeMx
You can get access to it in
https://community.st.com/s/article/FAQ-STM32MP1-How-to-create-a-device-tree-adapted-to-your-design-with-STM32CubeMx
2 Load & launch TF-A in SYSRAM
Start TF-A with STM32CubeProgrammer in UART or USB OTG
Configure the Boot pins to make the ROM code boot from serial boot device. The ROM code loads TF-A in internal SYSRAM from STM32MPx USB-OTG (only 2 dedicated pins for USB-OTG are needed by ROM Code) or from UART (choose a UART different from UART4 which is TF-A trace console, available UART and related pins in https://wiki.st.com/stm32mpu/wiki/STM32_MPU_ROM_code_overview#UART_Boot.
Use a STM32CubeProgrammer .tsv file from the STM32MPx Starter package with binaries of TF-A (Id=0x1)
For example in FlashLayout_SD-Card_stm32mp157c-dk2-trusted.tsv or FlashLayout_sdcard_stm32mp257f-dk-ca35tdcid-ostl-optee.ts file, select the “fsbl-boot” partition Id=0x1 by ticking on with STM32CubeProgrammer GUI.
For or select partition Id 0x1
STM32CubeProgrammer and ROM Code will load TF-A in internal SYSRAM and start it execution.
You should see the TF-A traces on the UART4 or USART2 for STM32MP2 console, enabled by default of TF-A.
More info about how to use STM32CubeProgrammer
https://wiki.st.com/stm32mpu/wiki/STM32MP15_Evaluation_boards_-_Starter_Package#Downloading_the_image_and_flashing_it_on_the_board
or
https://wiki.st.com/stm32mpu/wiki/STM32MP25_Discovery_kits_-_Starter_Package#Downloading_the_image_and_flashing_it_on_the_board
For example in FlashLayout_SD-Card_stm32mp157c-dk2-trusted.tsv or FlashLayout_sdcard_stm32mp257f-dk-ca35tdcid-ostl-optee.ts file, select the “fsbl-boot” partition Id=0x1 by ticking on with STM32CubeProgrammer GUI.
For or select partition Id 0x1
STM32CubeProgrammer and ROM Code will load TF-A in internal SYSRAM and start it execution.
You should see the TF-A traces on the UART4 or USART2 for STM32MP2 console, enabled by default of TF-A.
More info about how to use STM32CubeProgrammer
https://wiki.st.com/stm32mpu/wiki/STM32MP15_Evaluation_boards_-_Starter_Package#Downloading_the_image_and_flashing_it_on_the_board
or
https://wiki.st.com/stm32mpu/wiki/STM32MP25_Discovery_kits_-_Starter_Package#Downloading_the_image_and_flashing_it_on_the_board
Once you will have been able to load and execute successful TF-A you should see also
"Warning: DDR not configured".
3 Configuration of the DDR by T-FA
At this point, TF-A has not yet configured the DDR controller to get the DRAM functional.
1/DRAM parameters in Device Tree
DDR timings are loaded in DDR controller registers by TF-A FSBL and the register values are located in the FSBL device tree files ( *.dtsi) files of TF-A binary .
To build these files, there are 2 possibilities:
-your PCB contains a DDR3L@533Mhz you can re-use directly the ST reference boards (select the stm32mp15-ddr3-2x4Gb-1066-binG.dtsi or stm32mp15-ddr3-1x4Gb-1066-binG.dtsi according to your configuration). The timings can be applied for any DDR3L with the DDR Speed/bin Grade 1066-G. For LPDDR4 32 bits of STM32MP257F-DK this below file can be used for the bring-up stm32mp25-lpddr4-1x32Gbits-1x32bits-1200MHz.dtsi (or stm32mp25-ddr4-2x16Gbits-2x16bits-1200MHz.dtsi)
-your PCB uses another DRAM (LPDDR2 for example) or need to adapt the line impedances , STM32CubeMX will help you to compute the DDR controller configuration and will generate the TF-A device tree file relative to STM32MP1 DDR controller settings. To get TF-A binary with DRAM timings save DRAM parameters to generate the dtsi DRAM file with the new parameters. Copy the files from CubeMx project in TF-A fdts folder, recompile TF-A.
More info in : https://wiki.st.com/stm32mpu/wiki/DDRCTRL_and_DDRPHYC_device_tree_configuration
To build these files, there are 2 possibilities:
-your PCB contains a DDR3L@533Mhz you can re-use directly the ST reference boards (select the stm32mp15-ddr3-2x4Gb-1066-binG.dtsi or stm32mp15-ddr3-1x4Gb-1066-binG.dtsi according to your configuration). The timings can be applied for any DDR3L with the DDR Speed/bin Grade 1066-G. For LPDDR4 32 bits of STM32MP257F-DK this below file can be used for the bring-up stm32mp25-lpddr4-1x32Gbits-1x32bits-1200MHz.dtsi (or stm32mp25-ddr4-2x16Gbits-2x16bits-1200MHz.dtsi)
-your PCB uses another DRAM (LPDDR2 for example) or need to adapt the line impedances , STM32CubeMX will help you to compute the DDR controller configuration and will generate the TF-A device tree file relative to STM32MP1 DDR controller settings. To get TF-A binary with DRAM timings save DRAM parameters to generate the dtsi DRAM file with the new parameters. Copy the files from CubeMx project in TF-A fdts folder, recompile TF-A.
More info in : https://wiki.st.com/stm32mpu/wiki/DDRCTRL_and_DDRPHYC_device_tree_configuration
2/Recompile TF-A with DDR dtsi files
Reload the TF-A with STM32CubeProgrammer and the ROMcode
and should see the TF-A trace (dk2 example on ecosystem V1.0.0) :
Reload the TF-A with STM32CubeProgrammer and the ROMcode
and should see the TF-A trace (dk2 example on ecosystem V1.0.0) :
"INFO: RAM: DDR3-1066/888 bin G 1x4Gb 533MHz v1.41
INFO: Memory size = 0x20000000 (512 MB) …… "
INFO: Memory size = 0x20000000 (512 MB) …… "
then you should be able to load&launch Uboot in DDR
More info to compile in Developper Package the TF-A (and Uboot) device tree https://wiki.st.com/stm32mpu/wiki/How_to_compile_the_device_tree_with_the_Developer_Package#Updating_BOOT_firmwares
3/DDR test
Two possibilities:
More info to compile in Developper Package the TF-A (and Uboot) device tree https://wiki.st.com/stm32mpu/wiki/How_to_compile_the_device_tree_with_the_Developer_Package#Updating_BOOT_firmwares
3/DDR test
Two possibilities:
- DRAM works, no strange behavior with Uboot at this stage, skip the Cube MX DDR tool suite step.
Normally it is expected that the designers would have first followed carefully the rules of AN5122 or AN5431 for STM32MP13x or AN5724 for STM32MP2. These design rule are the very impacting the signal timings and are important.
If your layout regarding DRAM-STM32MPx chipset is picked-up from ST layout examples or from ST boards, Signal integrity tests have been passed on the DRAM-STM32MPx connecxion.
If your layout regarding DRAM-STM32MPx chipset is picked-up from ST layout examples or from ST boards, Signal integrity tests have been passed on the DRAM-STM32MPx connecxion.
- DRAM does not work fine
0 if FSBL device tree has been adapted to the PCB, check binary is correctly updated on target
1 Check the pin muxing of the DRAM signals against PCB schematics
2 Measure the voltages VDD-DDR, VREF_DDR, VDD-VTT (if present) on the PCB. Double check the voltage values in device tree STPMIC node of Uboot-SPL
3 Check DRAM timings (for DDR Speed bin / grade) against data sheet of DRAM
4 Run the all the DDR tests with STM32CubeMX DDR tool.
To run the DRAM use the STM32DDRFW-UTILS binary. See how to run the test in https://wiki.st.com/stm32mpu/wiki/STM32DDRFW-UTIL
If DRAM tests are failing or application has strange behaviors
-double check DRAM connections in the schematics or in the layout
-is there supply noise on VDDQ_DDR, DDR_VREF pin ?
-does the DDR signal tracks length comply with the AN5122 constraints ?
-24MHz Oscillator on HSE pin must be used if design includes LTCD // outputs, see errata sheet.
-There is additional DDR controller settings in CubeMX DDR parameters are described in AN5168, Impedance on DQ/DQS byte line can be modified as per AN5168 § 5 or relax timings AN5168 §6. For STM32MP2 DDRFW-UTILS show the impedance margin while running the tests this help to choose the adapted impedance DDR controller parameters.
1 Check the pin muxing of the DRAM signals against PCB schematics
2 Measure the voltages VDD-DDR, VREF_DDR, VDD-VTT (if present) on the PCB. Double check the voltage values in device tree STPMIC node of Uboot-SPL
3 Check DRAM timings (for DDR Speed bin / grade) against data sheet of DRAM
4 Run the all the DDR tests with STM32CubeMX DDR tool.
To run the DRAM use the STM32DDRFW-UTILS binary. See how to run the test in https://wiki.st.com/stm32mpu/wiki/STM32DDRFW-UTIL
If DRAM tests are failing or application has strange behaviors
-double check DRAM connections in the schematics or in the layout
-is there supply noise on VDDQ_DDR, DDR_VREF pin ?
-does the DDR signal tracks length comply with the AN5122 constraints ?
-24MHz Oscillator on HSE pin must be used if design includes LTCD // outputs, see errata sheet.
-There is additional DDR controller settings in CubeMX DDR parameters are described in AN5168, Impedance on DQ/DQS byte line can be modified as per AN5168 § 5 or relax timings AN5168 §6. For STM32MP2 DDRFW-UTILS show the impedance margin while running the tests this help to choose the adapted impedance DDR controller parameters.
4 Check Uboot& OP-TEE configuration
Start from a dts file where all the peripheral nodes are disabled.
Adapt form STM32CubeMx <project name >-u-boot.dtsi and dts files according to your board with the same TF-A method as above.
Uboot needs USB OTG node for Uboot flashloading with STM32 CubeProgrammer.
See https://wiki.st.com/stm32mpu/wiki/How_to_configure_U-Boot_for_your_board#USB_OTG_node
Note that the .dts file of Uboot is the same as the .dts file of the kernel. The <project name>_uboot.dtsi is an overlay if the .dts file of Uboot which overloads the values is the nodes.
The OP-TEE device tree can be checked to ensure the right console USART, I2C bus for PMIC.
Adapt form STM32CubeMx <project name >-u-boot.dtsi and dts files according to your board with the same TF-A method as above.
Uboot needs USB OTG node for Uboot flashloading with STM32 CubeProgrammer.
See https://wiki.st.com/stm32mpu/wiki/How_to_configure_U-Boot_for_your_board#USB_OTG_node
Note that the .dts file of Uboot is the same as the .dts file of the kernel. The <project name>_uboot.dtsi is an overlay if the .dts file of Uboot which overloads the values is the nodes.
The OP-TEE device tree can be checked to ensure the right console USART, I2C bus for PMIC.
5 Load Uboot and OP-TEE in DRAM
Similar methods than with TF-A boot: from serial link with STM32Cubeprogrammer
In .tsv ,select by ticking in the STM32Cubeprog UI ,TF-A (Id=0x1), “fip-ddr” partition (id=0x2) for STM32MP2 and “fip-boot” partition (id=0x3) containing Uboot and OP-TEE
6 Kernel bring-up
Same T-FA method above, start from a dts file where all the peripheral nodes are disabled.
For each of them you have the device tree a first description in the wiki to add the adapted properties according to your PCB in the peripheral nodes.
Entry for the device tree description : https://wiki.st.com/stm32mpu/wiki/Category:Device_tree_configuration
Also rely on the ST reference boards device tree files and relative schematics as example.
Note that when your flash boot device is not available or tested, It is also possible to boot the kernel with initramfs. In this case STM32CubeProgrammer load in DRAM the root filesystem (rootfs).
8 Boot from a flash device
At this point TF-A and OP-TEE & Uboot are configured to your PCB and can be loaded from serial boot device with ST32MPCubeProgrammer.
Now these partitions containing TF-A, Uboot can be flashed then loaded to boot the kernel.
Prior to boot the kernel from flash, partitions has to be written TF-A raw patition, FIP partition (Uboot and OPT-TEE),bootfs (Kernel), rootfs (Kernel modules and Uerland libraries), userfs, ...
STM32CubeProgrammer and Uboot flashing service allow to write the partitions into the flash device.
you have to create the corresponding .tsv input file according to your flash device partition
.stv file from Starter Package can be a starting point.
Further information in
https://wiki.st.com/stm32mpu/wiki/STM32CubeProgrammer_flashlayout#Typical_flashlayout-tsv_file
When boot device is a SLC NAND some Uboot configuration is needed to get a correct memory flashing.
https://wiki.st.com/stm32mpu/wiki/FMC_device_tree_configuration#DT_configuration_of_the_NAND_Flash_controller_-28board_level-29
if you have difficulties to boot from flash, see troubleshooting items to go further in details.
Back ground knowledge
Keywords : STM32MP1 , STM32MP2 bring up
