STM32 MPUs

Hi, I tried the Hello World application on Cortex-A7, I want to try linking my custom application library in this example. Can I do that?I changed the print_hello function and calling another function from my custom library.I tried linking custom library in Makefile byLDFLAGS += $(shell pkg-config --libs gtk+-3.0) -lxxxxx.aThe library file is in the same folder. But Get the below error: arm-ostl-linux-gnueabi-gcc -mthumb -mfpu=neon-vfpv4 -mfloat-abi=hard -mcpu=cortex-a7 --sysroot=/home/usr-x/STM32MPU_workspace/Developer-Package/SDK/sysroots/cortexa7t2hf-neon-vfpv4-ostl-linux-gnueabi -o gtk_hello_world gtk_hello_world.c -O2 -pipe -g -feliminate-unused-debug-types -Wall -pthread -I/home/usr-x/STM32MPU_workspace/Developer-Package/SDK/sysroots/cortexa7t2hf-neon-vfpv4-ostl-linux-gnueabi/usr/include/gtk-3.0 -I/home/usr-x/STM32MPU_workspace/Developer-Package/SDK/sysroots/cortexa7t2hf-neon-vfpv4-ostl-linux-gnueabi/usr/include/gio-unix-2.0 -I/home/usr-x/STM32MPU_workspace/Developer-Package

Hello!I have a MP1 board (STM32MP157), and i was wondering if one can have control over which individual pins are used when it comes to FMC. I want to use FMC for PSRAM, 8-bit data mode, but the pin that corresponds to FMC_A2 is already in use (PF2), which would leave me with only 2 address pins (A0 and A1). Would it be possible to skip that pin and have for example FMC_A0, FMC_A1, FMC_A2, FMC_A3 as address pins? It doesnt seem to be possible directly with the CubeIDE but maybe it can be configured via the Device TreeThanks in advance

Dear ST community,I am currently trying to install an 8bit 8080 LCD , and i figured out that it needs FMC $ to be set up in devicetree in order to interface with it using DRM in Linux. i have the following device tree pinctrl nodes setup   fmc_pins_mx: fmc_mx-0 { pins { pinmux = <STM32_PINMUX('D', 0, AF12)>, /* FMC_D2 */ <STM32_PINMUX('D', 1, AF12)>, /* FMC_D3 */ <STM32_PINMUX('D', 4, AF12)>, /* FMC_NOE */ <STM32_PINMUX('D', 5, AF12)>, /* FMC_NWE */ <STM32_PINMUX('D', 7, AF12)>, /* FMC_NE1 */ <STM32_PINMUX('D', 14, AF12)>, /* FMC_D0 */ <STM32_PINMUX('D', 15, AF12)>, /* FMC_D1 */ <STM32_PINMUX('E', 7, AF12)>, /* FMC_D4 */ <STM32_PINMUX('E', 8, AF12)>, /* FMC_D5 */ <STM32_PINMUX('E', 9, AF12)>, /* FMC_D6 */ <STM32_PINMUX('E', 10, AF12)>, /* FMC_D7 */ <STM32_PINMUX('F', 0, AF12)>, /* FMC_A0 */ <STM32_PINMUX('G', 9, AF12)>; /*

Hi ST Community,I am trying to flash a eMMC with STM32CubeProgrammer, in a STM32MP157F custom board. I am using a GPT partition file and a img.I can see the system is creating partitions and flashing, but the structure is wrong for eMMC, so it does not boot-up. Sometimes, trying different structures, I get an error "wrong memory layout" in the console when I am trying to flash.The tsv file I am using at the moment is:And the gpt table is as follows:I believe the solution is in the right configuration of the table, can somebody detail on how to do it?Thanks.

I have a board where a secondary CPU can select the STM32MP1's boot mode.  On initial boot, the MP1 boots from NOR flash.  I can then send a command to the secondary CPU which switches the MP1's BOOTx pins to enable engineering boot and resets the MP1.  When I am done, I send a command to the secondary CPU to boot the MP1 from NOR flash.  However, after I switch out of engineering mode, the MP1 only runs the serial loader.  I have to power cycle the board to make the MP1 boot from NOR flash.  Also, I have to let the board sit for a few seconds before powering it up or the MP1 goes to serial loader again instead of NOR boot.Is this a limitation of the MP1 boot process, or is there a way I can reset the MP1 to boot from NOR flash without cycling power?

Recently for a design I had used STM32 MPU (part# "STM32MP157FAA1") with DDR3L (part# "NT5CC256M16ER-EK"). For simulating data & address lines from the IBIS model "ibis5_4gbddr3_e_1p35_0c~95c.ibs" in ANSYS for 500MHz frequency the source transmitter eye waveform itself doesn't look proper. Attached the parameter setup and also the eye diagram waveform image for one of the data lines for reference.What would be the cause of this distorted signal from the source itself? Suggest for any changes if required from the parameter setup point of view.  

I am bitbaking the core-image-minimal image, for a plain yocto poky distribution (Kirkstone), using stm32mp1 as my machine, and I am trying to figure out how the various st partition images are included in the build process. That is, how and where are the st-image-bootfs.bb, st-image-userfs.bb  and st-image-vendorfs.bb included in the core-image-minimal build? Everything is build as intended, but I cannot figure out how.I cannot find anywhere, where the recipes are added to any of the environment variables I usually use to include recipes, (IMAGE_INSTALL, PACKAGE_INSTALL, etc.).The only place I can find a reference to, for instance the bootfs recipe, is in meta-st-stm32mp/conf/machine/include/st-machine-common-stm32mp.incSTM32MP_BOOTFS_IMAGE ?= "st-image-bootfs" But I cannot trace that to how the recipe is included in the build.Please help.

My device tree:spi4_pins_csa: spi4-0 { pins { pinmux = <STM32_PINMUX('E', 12, AF5)>, /* SPI4_SCK */ <STM32_PINMUX('E', 14, AF5)>; /* SPI4_MOSI */ bias-disable; drive-push-pull; slew-rate = <1>; }; pins2 { pinmux = <STM32_PINMUX('E', 13, AF5)>; /* SPI4_MISO */ }; };     &spi4 { pinctrl-names = "default"; pinctrl-0 = <&spi4_pins_csa>; cs-gpios = <GPIO_CO_CS GPIO_ACTIVE_LOW>; status = "okay";   spidev@0{ compatible = "spidev"; reg = <0>; spi-max-frequency = <4000000>; }; };The output:root@apollo-e2412:~# spidev_test -D /dev/spidev1.0 spi mode: 0x4 bits per word: 8 max speed: 500000 Hz (500 kHz) [ 609.925039] spidev spi1.0: SPI transfer timed out [ 609.928391] spi_master spi1: failed to transfer one message from queue can't send spi message: Connection timed out Aborted

Hi there, I am developing on an STM32MP157. We are trying to add two Linux virtual network interfaces that specify a VLAN ID using networkd. Specifically, we specify IDs 20 and 30. We do not specify VLAN ID 0. On boot, networkd successfully creates the first interface, but fails to create the second interface with the following error: stm32-dwmac 5800a000.ethernet eth0: Adding VLAN ID 0 is not supported [...] stm32-dwmac 5800a000.ethernet eth0: Only single VLAN ID supported  Looking at the stdwmac.c driver, I see if (hw->vlan_filter[0] & GMAC_VLAN_TAG_VID) { netdev_err(dev, "Only single VLAN ID supported\n"); [...] } I have tried to enable the following kernel configs, to no avail. What is interesting is that with these enabled and not trying to use the VLAN IDs, I still see the `Adding VLAN ID 0 is not supported` error. BRIDGE_VLAN_FILTERING=y NET_ACT_VLAN=y VLAN_8021Q=y `BRIDGE_EBT_VLAN=m`, `VLAN_8021Q_GVRP=y`, `VLAN_8021Q_MVRP=y` are

I debug a simple project STM32MP15 M4 GPIO-EXTI-CM4, using engineering mode. It worked couple days ago. Today when I tried again, I got the error below and it doesn't make sense.   

I have a stm32mp135f board (I'm mainly interested in Linux capable SoC) and I am trying to learn something about trusted firmware a, optee, and secure boot solutions. Although the documentation is pretty decent I don't see how I could test the whole solution from bottom to up, namely how to perform the full boot with all stages being authenticated without writing anything to OTP memory. When it comes to ATF and u-boot I see some ways to stub eg. the part of the implementation to use other keys or perhaps use the debugger to stop bl2 and write a key hash into so-called shadow registers (probably, it's just my guess), however from what I understand there is no way to stub a root of trust key, which is used by the boot ROM to authenticate bl2. I can imagine that there could be eg. some configuration in (in this case) st binary header that would indicate for the boot ROM that it should use key hashes that are eg. appended to the binary instead of OTP. I would like to avoid writing anything

Hi,What am I doing wrong that USART1 returns -2 during the probekernel.dts -> PINS   usart1_pins_mx: usart1_mx-0 { pins1 { pinmux = <STM32_PINMUX('A', 9, AF7)>, /* USART1_TX */ <STM32_PINMUX('A', 12, AF7)>; /* USART1_RTS */ bias-disable; drive-push-pull; slew-rate = <0>; }; pins2 { pinmux = <STM32_PINMUX('B', 15, AF4)>; /* USART1_RX */ bias-disable; }; }; usart1_sleep_pins_mx: usart1_sleep_mx-0 { pins { pinmux = <STM32_PINMUX('A', 9, ANALOG)>, /* USART1_TX */ <STM32_PINMUX('A', 12, ANALOG)>, /* USART1_RTS */ <STM32_PINMUX('B', 15, ANALOG)>; /* USART1_RX */ }; };    Kernel.dts -> Node   &usart1{ pinctrl-names = "default", "sleep"; pinctrl-0 = <&usart1_pins_mx &usart1_pins_z_mx>; pinctrl-1 = <&usart1_sleep_pins_mx &usart1_sleep_pins_z_mx>; status = "okay"; /* USER CODE BEGIN usart1 */ /* USER CODE E

Hi@Olivier GALLIENI have followed the steps in https://wiki.st.com/stm32mpu/wiki/How_to_create_your_own_machine#Generate_device_tree to generate a image for my specific machines dts. But when building the image the error below is generated. I have done the "bitbake -c cleanall tf-a-stm32mp" with no change. The machine is specified in meta-st-stm32mp-addons/conf/machine/ and matches the example for the DK2 but with a different path to my dts in mx/... for kernel, op-tee etc.ERROR: tf-a-stm32mp-v2.6-stm32mp-r2-r0 do_compile: oe_runmake failedERROR: tf-a-stm32mp-v2.6-stm32mp-r2-r0 do_compile: ExecutionError('/home/build/workspace/STM32/Distribution-Package/build-openstlinuxweston-stm32mp1-firmware-eid/tmp-glibc/work/stm32mp1_firmware_eid-ostl-linux-gnueabi/tf-a-stm32mp/v2.6-stm32mp-r2-r0/temp/run.do_compile.3019298', 1, None, None)ERROR: Logfile of failure stored in: /home/build/workspace/STM32/Distribution-Package/build-openstlinuxweston-stm32mp1-firmware-eid/tmp-glibc/work/stm

I’m new for STM products. After some google, I found mp157d-dk1, I want use it to study Linux kernel. Does the onboard STLink support Linux kernel code debug? Like set breakpoints/single step/observe variables values?Another question, is this boards newest model? Is there better/newer one? 

Please tell me how to set the wake-up button (PA0:PWR_WKUP) as a return factor from LPLV-Stop mode and set STM32MP157f-EV1 to LPLV-Stop mode.

Hi all.I am adding a new user to my Linux image. After generating the image I verify the `/etc/passwd` on the rootfs and the new user is not present. When I try to login to this new user on the running image itself, it doesn't work. As I am using the "read-only-rootfs" feature, I think some extra setup is required to fix this issue. In order to build my recipe, I followed the instructions from useradd-example.bb .How to add a new user properly with the read only rootfs feature? PS. I am setting another partition on the /home. So this folder is writable. Thanks

I have an STM32MP157D-DK1 development board and have built a buildroot image using the bootlin buildroot-external-st (st_stm32mp157d_dk1_demo_defconfig) external build tree. I have an Acubrite 12" 1080p touchscreen monitor that I am trying to get working at the monitor's native 1920x1080 resolution for use with a QT5 application but it is not working.The monitor works fine but is limited to 1280x720 resolution. Modetest does not report anything higher than 1280x720: root@stm32mp1:~# modetest -M stm Encoders: id crtc type possible crtcs possible clones 31 38 DPI 0x00000001 0x00000001 Connectors: id encoder status name size (mm) modes encoders 32 31 connected HDMI-A-1 250x140 5 31 modes: index name refresh (Hz) hdisp hss hse htot vdisp vss vse vtot #0 1280x720 60.00 1280 1390 1430 1650 720 725 730 750 74250 flags: phsync, pvsync; type: driver #1 1280x720 50.00 1280 1720 1760 1980 720 725 730 750 74250 flags: phsync, pvsync; type: driver #2 800x600 75.00 800 816 896 1

HiI see the STM32MP135 has an ISO7816 interface. Have you developed a compatible Linux device driver for the ISO7816 interface? There exist a software framework to use the SAM (Secure Module Access) Card connected to this interface?Thank you,

i have been trying to use the LTDC peripheral on the Linux kernel to use it on the ILI9340 / ILI9340 in 8 bit mode.i use this in the device tree:  &ltdc { status = "okay"; port { #address-cells = <1>; #size-cells = <0>; ltdc_ep1_out: endpoint@1 { reg = <1>; remote-endpoint = <&dsi_in>; }; }; }; &dsi { #address-cells = <1>; #size-cells = <0>; status = "okay"; ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; dsi_in: endpoint { remote-endpoint = <&ltdc_ep1_out>; }; }; port@1 { reg = <1>; dsi_out: endpoint { remote-endpoint = <&panel_in>; }; }; }; panel_ili9341: panel-ili9341@0 { compatible = "displaytech,dt024ctft", "ilitek,ili9341"; reg = <0>; reset-gpios = <&gpioe 4 GPIO_ACTIVE_LOW>; power-supply = <&v3v3>; status = "okay"; port { panel_in: endpoint { rem

Hi!I am trying to have full secure booting on the stm32mp platform, using FIP and fitImage on a custom distribution built using Yocto with the meta-st-stm32mp layer.For the fit image signing, all steps are well described here [st wiki ] :https://wiki.st.com/stm32mpu/wiki/How_to_create_Signed_FIT_image_from_Distribution_packagei haved added those modifications directly on stm32mp13-disco.conf (just for testing)But i have this warning :WARNING: u-boot-stm32mp-v2021.10-stm32mp-r2-r0 do_deploy: Failure while adding public key to u-boot binary. Verified boot won't be available.So my kernel is well loaded but the signature is not checked.I have changed nothing else after doing my repo sync (openstlinux/ yocto [ kirkstone]).Is something there to add on configurations in order to implement FitImage signing ?thanks. 

Hi!I have been reviewing the kernel log for the DK2 Kit, and I have noticed that the Ethernet configuration is in polling mode. [ 37.074899] stm32-dwmac 5800a000.ethernet eth0: PHY [stmmac-0:00] driver [RTL8211F Gigabit Ethernet] (irq=POLL) Is there a specific reason for the decision to have it in polling mode?Upon examining the schematic, I can see that the interrupt signal is on PA6(ETH_MDINT).I understand that the configuration for the interruption should be: interrupt-parent = <&gpioa>; interrupts = <6 IRQ_TYPE_EDGE_FALLING>;   

Hi!I have been reviewing the datasheet for the stm32mp157c and have seen that GPIO PG12 can be configured in a special function "ETH1_PHY_INTN"I would like to get more information about this mode, as it might be interesting to use it in future designs.I have been examining in the device tree of some of the kit based on this mpu and I haven't seen this GPIO(PG12) being used with this special mode.Thanks! 

Dears,I'm using STM32MP157C-DK2 board in production mode.Now I'm debugging the firmware in M4 core. However, when I insert a breakpoint at DMA interrupt handler and wait for a while, it will crash the whole system (A7+M4) and lead to the reset.I also tried the example SPI_FullDuplex_ComDMA_Master. It still has the same issue.Do you have any resolution? Thanks for your help in advance.  

Hi, I see STM32MP1 - M4 use "RCC_HSE_BYPASS_DIG", what does this mean? And from stm32mpcube, does anyone know the calculation below to get 209MHz?  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;RCC_OscInitStruct.PLL.PLLSource = RCC_PLL12SOURCE_HSE;RCC_OscInitStruct.PLL.PLLM = 3;RCC_OscInitStruct.PLL.PLLN = 81;RCC_OscInitStruct.PLL.PLLP = 1;RCC_OscInitStruct.PLL.PLLQ = 1;RCC_OscInitStruct.PLL.PLLR = 1;RCC_OscInitStruct.PLL.PLLFRACV = 0x800;RCC_OscInitStruct.PLL.PLLMODE = RCC_PLL_FRACTIONAL;RCC_OscInitStruct.PLL.RPDFN_DIS = RCC_RPDFN_DIS_DISABLED;RCC_OscInitStruct.PLL.TPDFN_DIS = RCC_TPDFN_DIS_DISABLED;

board : STM32MP157F-DK2os : OpenSTLinux Kirkstonebuild command : bitbake st-image-coreroot@stm32mp1:~# rfcommCan't open RFCOMM control socket: Protocol not supported