STM32 MPUs

Hello everyone,I have to convert a neural network into optimized C code for STM32MP1x. Is it necessary using OpenSTLinux (so X-Linux-AI) or is there an other way to get it? 

Hi,Using own custom board based on stm32mp151I'm using STM32CubeProgrammer to program to nand, but I'm getting errorError: ssbl1 (0x6): Bad size for partition 2 (ssbl1) at 0x200000 = 0xfe00000 <> 0x200000 expected my .tsv file is#Opt Id Name Type IP Offset Binary- 0x01 fsbl1-boot Binary none 0x0 tf-a-stm32mp15xc-ya151c-256d-t-serialboot.stm32- 0x03 ssbl-boot Binary none 0x0 u-boot-stm32mp15xc-ya151c-256d-t-trusted.stm32P 0x04 fsbl Binary(2) nand0 0x00000000 tf-a-stm32mp15xc-ya151c-256d-t-serialboot.stm32P 0x06 ssbl1 Binary nand0 0x00200000 u-boot-stm32mp15xc-ya151c-256d-t-trusted.stm32P 0x07 ssbl2 Binary nand0 0x00400000 u-boot-stm32mp15xc-ya151c-256d-t-trusted.stm32 And the mtdparts command on u-bootSTM32MP> mtdparts---mtdparts_init---last_ids : nand0=nand0env_ids : nand0=nand0last_parts: mtdparts=nand0:2m(fsbl),2m(ssbl1),2m(ssbl2),-(UBI)env_parts : mtdparts=nand0:2m(fsbl),2m(ssbl1),2m(ssbl2),-(UBI)last_partition : nand0,0env_partition : nand0,0---list_partitions---

Hello all,I currently have to deal with a display which has an inactive zone in the middle. Its "interface" resolution is 540x1280px, but the 140px columns in the middle are not connected to the screen. That is, the display is of 400x1280px of resolution but the whole 540 columns have to be provided through its interface. In order to display a 400x1280px image, I need to split it into two 200x1280px regions and send them with the dead zone in the middle.Here is a diagram about how this is working (active are in red):I wonder if there is a way to use the LTDC peripheral to do this in an efficient way. I am thinking about using layers and/or windows to achieve this. Currently I am using QT to generate the content on-screen.Does anybody have a clue on how to deal with this kind of component?Thank you very much in advance!

I am trying to setup the developer package on my system and had an issue with the following line when going through the README.HOW_TO.txt file in the developer package:$ make ARCH=arm O="${OUTPUT_BUILD_DIR}" multi_v7_defconfig fragment*.config make: *** No rule to make target 'multi_v7_defconfig'. Stop.For context, it had me do the following to prepare the kernel source (to apply the patches to the kernal source directory, ~/STM32MPU-Ecosystem-v5.0.0/Developer-Package/stm32mp1-openstlinux-6.1-yocto-mickledore-mp1-v23.06.21/sources/arm-ostl-linux-gnueabi/linux-stm32mp-6.1.28-stm32mp-r1-r0:(tar xf linux-6.1.28.tar.xz cd linux-6.1.28 for p in `ls -1 ../*.patch`; do patch -p1 < $p; doneThis had no issues and had me move on to section 5 which had me run the following from the same folder (~/STM32MPU-Ecosystem-v5.0.0/Developer-Package/stm32mp1-openstlinux-6.1-yocto-mickledore-mp1-v23.06.21/sources/arm-ostl-linux-gnueabi/linux-stm32mp-6.1.28-stm32mp-r1-r0, maybe that is the source of the i

We are using Murata LBEE5HY1MW  WiFi/BT module with a STM32MP157F based custom board, running OSD32MP1 Debian SDK v3.0 (Linux Kernel v5.10-stm32mp)LBEE5HY1MW module is connected to STM32MP157F via sdmmc3 (WiFi) and usart2 (Bluetooth) interface.Due to some limitations, we have to set the IO voltage to 3.3V (we can not use 1.8V on board).We are not getting the recommended throughput when we run WiFi throughput tests via iperf3.On average we got ...5GHz throughput around 40 Mbits/sec2.4GHz throughput around 30 Mbits/secWe tried different configurations but the WiFi throughput does not go beyond 54Mbps.The command wl status returns that the supported rate is 54Mbps at most.We tried changing the sdio bus speed parameter in device tree to different values (SDR104, SDR50, DDR50), but it has no effect, sdio bus speed remains fixed at 49.5 MHz and DDR52. Not sure if this is due to 3.3v supply.Below are some of the commands showing wifi status followed by Kernel device-tree excerp

I realize this is probably a pretty basic question but I haven't found a way to have the M4 portion of the firmware startup when the STM32MP1 is powered up.  I'm currently using an STM32MP157D-DK1 board, if that helps. I was able to debug the code of the OpenAMP_TTY_echo_wakeup_CM4 example and all was working except trying to put the A7 to sleep (which made sense in my head.  Putting it to sleep could be problematic if I'm still debugging.  That said, it's still an issue when not in debug mode but I might save this for a separate thread).  When I end debug mode and reset the device, the program stops (which also makes sense as I assume either the M4 is not actually programmed or the program is not setup to start on reset). I found a video (https://www.youtube.com/watch?v=PsiFDHH87vo&t=600s) that shows how to load the firmware by moving the elf file via a flash drive and placing it in that folder (though apparently, putting it in debug mode essentially

Hi! I am working with stm32mp157c-dk2 and trying to establish communication between m4 and a7 cores. I analyze standard examples for this purpose, namely OpenAMP_TTY_echo. VIRT_UART initialization is presented here for m4 core:  log_info("Virtual UART0 OpenAMP-rpmsg channel creation\r\n"); if (VIRT_UART_Init(&huart0) != VIRT_UART_OK) { log_err("VIRT_UART_Init UART0 failed.\r\n"); Error_Handler(); } log_info("Virtual UART1 OpenAMP-rpmsg channel creation\r\n"); if (VIRT_UART_Init(&huart1) != VIRT_UART_OK) { log_err("VIRT_UART_Init UART1 failed.\r\n"); Error_Handler(); } /*Need to register callback for message reception by channels*/ if(VIRT_UART_RegisterCallback(&huart0, VIRT_UART_RXCPLT_CB_ID, VIRT_UART0_RxCpltCallback) != VIRT_UART_OK) { Error_Handler(); } if(VIRT_UART_RegisterCallback(&huart1, VIRT_UART_RXCPLT_CB_ID, VIRT_UART1_RxCpltCallback) != VIRT_UART_OK) { Error_Handler(); } After flashing is issued: [ 111.672943] virtio_rp

Hello, I've tried measure period of  GPS PPS which is very high accuracy. I'm using TIM5 input capture mode, reset slave mode. The TIM5 CCR1 gives value 208877646 that is wrong because I use high accurate generator for sys clock. The right value is about 209000000. So maybe anyone meet the problem? Thanks,Alex.

Hello,I'm working with the STM32MP15 and have found a problem with USART1 during the boot process on a secure boot enabled (TZEN) hardware. The system freezes when U-Boot tries to reset USART1.The problem is with the RCC_APB5RSTSETR register (0x188). This register, including the USART1RST bit, can only be changed in secure mode (by OP-TEE) because of the TZEN restriction. However, U-Boot (non-secure world) attempts to modify this register by default. This is because of arch/arm/dts/stm32mp15-u-boot.dtsi:&usart1 { resets = <&rcc USART1_R>; };The ST devkits use UART4RST, this is not TZEN protected. But USART1 is and that causes a bus error:The system freezes.I solved this by using SCMI (so that OP-TEE does the actual reset):resets = <&scmi_reset RST_SCMI_USART1>;Initially, I thought to put this change in my stm32mp153c-custom-scmi.dtsi, but that ...u-boot.dtsi overrides it. So, the change needs to go in a stm32mp153c-custom-u-boot.dtsi.It took me half a day to fi

Hello,with CubeMx 6.9.2 i am generating Code for CubeIDE with the goal to figure out which periphery is assigned to the CA7 or the CM4.With Freemarker it is possible to get information about which IP's are assigned and used but i have no idea how to get information about to which Core (CA7 or CM4) they are assigned.Example:With CubeMx i assigned I2C1 to CM4 and I2C4 to CA7. This can be seen in the .ioc file. CortexA7S.IPs=IWDG2,BSEC\:I,DDR,ETZPC\:I,HSEM,PWR\:I,RCC,RNG1\:I,RTC\:I,TAMP,GIC\:I,I2C4 CortexM4.IPs=IPCC\:I,ETZPC,FREERTOS\:I,HSEM,PWR,RCC,SYS\:I,DMA,NVIC\:I,OPENAMP\:I,I2C2\:I,SPI2\:I,USART3\:I Using the Freemarker example for getting the IP list CA7 and CM4 IP's are summarized to one big pool. [#ftl] [#list configs as dt] [#assign usedIPs =dt.usedIPs] /* List of used IPs */ [#list usedIPs as ip] - ${ip} [/#list]/* List of used IPs */ - RCC - DEBUG - ETZPC - I2C1 - I2C2 - I2C4 - I2C5 - IPCC - PWR - SPI1 .... - NVIC Thank in advance for hints or solutionChee

Dears,I use STM32MP151FAD3 together with STPMIC1. Nowdays I monitored the voltage of vddcore and found it's not stable shown as below.Mostly it's around 1.2v while sometimes it's up to 1.33v .Referring to documentation, I guess it's casued by dynamic voltage and freqency scaling (DVFS). Is my thought correct? Also, is it a normal scenario? will the ustable vddcore have any inflence on EMC?

Hello! Although, the OS is not supported, I'd be happy to get any clues on my relatively generic question.I have realized, that TEX remapping registers  (PRRR and NMRR) values are hardcoded in Linux kernel source..equ NMRR, 0x40e040e0I'm particularly interested in the value for the first class of memory access. Lowest two bits  (b00) describe  Non-Cachable access for Normal memory. FreeBSD kernel uses Write-Back+Write-Alloc. type and it seems to cause problems. When it programs prrr&nmrr and then tries to flush entire unified TLB (p15, 0, r0, c8, c7, 0), I witness distortion of stack memory (zeroes) with lose of return address, etc.Is it kinda implementation dependent behavior of STM32MP157CAC or I shall investigate some OTP/Security settings, preprogrammed by vendor of my board?Thanks in advance for any clues!Stan 

I'm having trouble in bringing up my custom board. I've made a custom device tree using CubeMX and adding the sections as described in "Lab-MP15_FromPartNumber_To_BasicDeviceTree_with_CubeMx". I can program fsbl-boot and fip-boot, but i'm not able to boot:E/TC:0 tzc_it_handler:79 TZC permission failureE/TC:0 dump_fail_filter:417 Overrun violation on filter 0E/TC:0 dump_fail_filter:420 Permission violation on filter 0E/TC:0 dump_fail_filter:425 Violation @0xfff09000, non-secure privileged write, AXI ID 480Also earlier in the log:E/TC:0 0 print_probe_list:366 |- Driver stm32mp1-cpu-opp on node cpu0-opp-table failedI've seen earlier topics on this error (@debugging), the solution was to add a 'reserved memory' section in the u-boot device tree.I have this in my device tree, tried both 0xce000000 and 0xde000000, but I still get the error, any ideas?Attached is the full log and de decompiled .dtb from u-boot.

I have a custom board based on stm32mp157f-ev1 and stm32mp157f-dk2 board.In my custom layer:meta-st/meta-st-openstlinux/conf/distro/* copied and a new distro created based openstlinux-weston.confmeta-st/meta-st-stm32mp/conf/machine/* copied and a new machine created based stm32mp15-eval.confa new image recipe created based meta-st/meta-st-openstlinux/recipes-st/images/st-image-weston.bblinux-stm32mp, u-boot-stm32mp, tf-a-stm32mp DTS files tuned using openembedded devtool.Image built using:$ DISTRO=mydistro MACHINE=mymachine META_LAYER_ROOT=layers/mylayer layers/meta-st/scripts/envsetup.sh$ bitbake-layers add-layer ../layers/mylayer$ bitbake myimageFlashed on sdcard and try to boot, but stucked after RAMDISK error message:[    2.714949] hub 2-0:1.0: USB hub found[    2.717446] hub 2-0:1.0: 2 ports detected[    2.726168] RAMDISK: Couldn't find valid RAM disk image starting at 0.[    2.731801] Waiting for root devi

I've been trying to cross compile pyzmq for my stm32mp135f-dk and I'm facing issues with it. I've ran the script to setup my environment for the SDK. And made the required changes in the setup file. Here's my stackoverflow post with the logs as well. https://stackoverflow.com/questions/77420874/cross-compiling-pyzmq-fails-because-the-setup-picks-up-the-x86-compiler-automati?noredirect=1#comment136505142_77420874Any help is much appreciated. The goal is to have a IPC mechanism between a C and Python application that is quick to implement.

Hello,I need to change the SD card interface voltage on stm32mp157f-evl board.As per my understanding we can control this via uSD_LDO_SEL, it can be 2.9volts or 1.8 volts.I need to change to 1.8 volts, how can one control this one via software?Warm regards,S

On STM32F4 has this and it is very easy to use. Does STM32MP15 -M4 MCU have same one?  

Hi, we make custom board base on STM32MP15 and without PMIC and have problem with power off command.Does anyone know any document or hint about this? All research we have found always include PMIC.  

Hello, i'm currently working on the stm32mp135f-dk with the kirkstone yocto version for layers provided by st. I'm trying to double all fs partitions (rootfs bootfs and userfs) to implement a software update mechanism with an active set of partitions and another one that will be used after being updated. My Flashlayout.tsv file generated by bitbake is the following:#Opt Id Name Type IP Offset Binary - 0x01 fsbl-boot Binary none 0x0 arm-trusted-firmware/tf-a-stm32mp135f-dk-usb.stm32 - 0x03 fip-boot FIP none 0x0 fip/fip-stm32mp135f-dk-optee.bin P 0x04 fsbl1 Binary mmc0 0x00004400 arm-trusted-firmware/tf-a-stm32mp135f-dk-sdcard.stm32 P 0x05 fsbl2 Binary mmc0 0x00044400 arm-trusted-firmware/tf-a-stm32mp135f-dk-sdcard.stm32 P 0x06 metadata1 Binary mmc0 0x00084400 arm-trusted-firmware/metadata.bin P 0x07 metadata2 Binary mmc0 0x000C4400 arm-trusted-firmware/metadata.bin P 0x08 fip-a FIP mmc0 0x00104400 fip/fip-stm32mp135f-dk-optee.bin PED 0x09 fip-b FIP mmc0 0x00504400 none PED 0x0A u-boot-e

hi experts i am not sure this is a right place to use  and  not good at English     please be generousi am not good at linux , i read a wiki "STM32MP15 RAM mapping" and googled some informationi use kernel and u-boot from developerPackagei have no plan to use M4 , so i like to give  MCU sram to linux systemin device tree  if i remove "no map"  property in reseved memory's retram, mcuram,mcuram2  configuration  and also  remove  m4_rproc's memory-region property  is it enough ?without no-map    does  MCURAM which  has  device tree with "compatible = "shared-dma-pool"  be used as linux system shared-dma-pool ? another question is  from wiki  3.3.2.2.MCU SRAM4  i can't find  example  configuration in device tree, where could i get that ? thank you  sincerely  

Hi there, I am working on an OSD32MP157F custom board inspired by STM32MP157F-DK and Octavo Red boards. The pinout is very similar to the stm32mp157f-dk with the main difference that the Murata LBEE5kL1BX-883 is connected to sdmmc3 instead of sdmmc2 and that there is no ethernet peripheral on the board. Some time ago I attempted to configure the LBEE5kL1BX WiFi part and I faced an NVRAM configuration conflict as explained here. After updating bootargs3 on sdio.txt the WiFi firmware was able to load and Wlan0 interface is functioning as expected since then. Last couple of days I attempted to enable Bluetooth on the same board too. After following Bluetooth Overview I enabled all necessary linux drivers including HCI UART driver, Bluetooth HighSpeed features etc. I also enabled Bluetooth on the dts following the BRCM documentation and the DK2 dts example. Main difference is the pinout is slightly different as seen on the dts below:   &nbs

Hi, we need a buffer about 200KB on CM4 MCU (STM32MP153)We change the linker file as below, that allow 256KB heap (combine SRAM2 and SRAM3)But every time the buffer has more than 0x30000 (192KB) then it is failed, seem we can't combine SRAM2 and SRAM3 into one buffer. If the buffer stays on SRAM2 or SRAM3 only then it works, but if the buffer starts on SRAM2 and the end is on SRAM3 then fail.Does anyone know the reason?      

I would like to use the Murata Wi-Fi/BT combo module 2BC on STM32MP1.Is it possible?If it is possible, I would like to know how to integrate 2BC on STM32MP1. I understand following.- Murata 1DX are mounted on STM32MP1 evaluation board.- Murata has the necessary FMAC and other files.  https://github.com/murata-wireless- CYW4373 description in the file below.  https://github.com/torvalds/linux/blob/master/include/linux/mmc/sdio_ids.h  Best Regards,Tsutsumi

Hi,I am using a PCM3060 codec connected to a STM32MP135 MPU over I2S1 and I2C, and compiling STM Linux (v6.1) (along with STM's version of TF-A, Optee, and U-Boot) using Buildroot.I had some trouble getting ALSA to output to the codec, it kept giving the response:  44004000.audio-controller-pcm3060-dac: ASoC: pcm3060-dac <-> 44004000.audio-controller No matching formats  I managed to work around the issue by changing the formats entry in snd_soc_dai_driver, in pcm3060.c (https://github.com/STMicroelectronics/linux/blob/7928f69738d2e57ee2a0dba6e9e680a3bf75ded9/sound/soc/codecs/pcm3060.c#L189) to SNDRV_PCM_FMTBIT_S32_LE.  #define PCM3060_FORMATS (SNDRV_PCM_FMTBIT_S32_LE) static struct snd_soc_dai_driver pcm3060_dai[] = { { .name = "pcm3060-dac", .id = PCM3060_DAI_ID_DAC, .playback = { .stream_name = "Playback", .channels_min = 2, .channels_max = 2, .rates = PCM3060_DAI_RATES_DAC, .formats = PCM3060_FORMATS, }, .ops

Is there any documentation or guidance on how to configure Yocto to deploy a custom u-boot image? I've been following https://wiki.st.com/stm32mpu/wiki/How_to_configure_U-Boot_for_your_board and https://wiki.stmicroelectronics.cn/stm32mpu/wiki/STM32MP15_U-Boot with some success, however these stop short of Yocto.I am able to build our custom build (defconfig, device-tree, with custom source adjustments) but I'm struggling to integrate into Yocto, to complete the flow to a final SD Card image.When I add my variant to `UBOOT_CONFIG` it builds it, but `trusted_stm32mp15` is appended and seems to be the one in the deploy folder: tmp-glibc/deploy/images/<IMAGE_NAME>/u-boot/ and tmp-glibc/deploy/images/<IMAGE_NAME>/fipMy machine.conf file has:UBOOT_CONFIG = "viper_butcombe_beta"UBOOT_CONFIG[viper_butcombe_beta] = "viper-innovations_butcombe-beta_defconfig,,u-boot.dtb" and I see layers/meta-st/meta-st-stm32mp/conf/machine/include/st-machine-