STM32 MPUs

Hi.My STM32MP157A-DK1 board ​while in power off state without any connections consumes 45 ma of current.​How could i reduce such a big amount?​​Could it be ST-LINK power drain, or is it STUSB1600?​What could i do to reduce the current to its minimum in poweroff or standby modes?​Regards, Vlad.​

It isn't clear to me from this article (https://wiki.st.com/stm32mpu/wiki/Clock_device_tree_configuration_-_Bootloader_specific#cite_note-st.2Cstm32mp1-rcc.txt-1) if I can set operating points for my stm32mp157c part. If not am I stuck setting PLL1 in the tf-a? Also, can I use the cpufreq-utils to change clock speed on the fly?Thanks,Ben

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I have custom stm32mp1 board and when running it as USB mass storage in U-Boot (ums 0 mmc 0), the USB driver is not detected nor by Linux nor by Windows. I am also attaching shematc comparison of eval-board VS my custom board. Also the USB-ORG is working in Engineering mode as DFU device - so I am guessing the soldering and USB pinouts are correct.Pic.1. Custom board schematics of USB-OTG2.Pic. Eval-board schematic of USB-OTG.

Hello,according to the STM32MP151A/D Datasheet (Table 13.) the voltage on VDD3V3_USBHS Pin can be 0 ... 3.6V when USBH not used.But on the another page of the Datasheet there is this section: "VDD3V3_USBHS and VDD3V3_USBFS are respectively the USB high-speed and full-speed PHY supply. Voltage range is 3.07 V to 3.6 V. VDD3V3_USBFS is used to supply OTG_VBUS and ID pins. So, VDD3V3_USBFS must be supplied as well when USB high- speed OTG device is used. If not used, must be connected to VDD."The last sentence is the opposite of the data given in Table 13.Now I dont know what I am allowed to do? I dont need USB on my board and I dont want to add circuitry that is mandatory according to datasheets requirement: "VDDA1V8_REG must be present before VDD3V3_USBHS".Thanks for help.

In previous releases of OpenSTLinux, u-boot used the NAND DFU backend to write to the NAND flash in the EV1 dev board. For UBI images, this required that the image was generated using the --space-fixup flag.To avoid this requirement, I submitted a patch to add a new DFU_NAND_TRIMFFS option to u-boot (link). When this option was used, the DFU NAND backend would correctly write UBI images to flash regardless of whether --space-fixup was used.With the latest release of OpenSTLinux, u-boot no longer uses the NAND DFU backend; it uses the MTD backend instead.Is there a way to tell the MTD backend to do the same (drop trailing all-0xff pages), so that UBI images generated without --space-fixup can be used?Thank you,Guillermo

I am enabling SPI1 controller and selecting PLL3Q as its kernel clock source on CubeMX. But automatic code is not generated for it.It looks like #DEFINES for SPI1 do not exist in stm32mp1-clksrc.h, while they do exist for other SPI controllers.

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Hello, everyone!We are developing a custom board with the MYC-YA157C module. We took the the MyIR device tree configuration and add our layer there. The vendor config had a USB_OTG capable of supplying power and acting as a host. A separate chip, controlled by i2s, was responsible for supplying power to the USB. In our device, we decided to simplify and not provide power via USB, because we plan to use this interface only for the firmware downloading. The power chip was removed.Now, when starting, the u-boot freeses. I rebuilt it with a more verbose configuration and got the following debug output before the freezing:...   usb_add_config: interface 0 = f_fastboot/d7c2e700   g_dnl_get_board_bcd_device_number   g_dnl_bind: calling usb_gadget_connect for controller 'dwc2-udc'   usb_dnl_fastboot: ready   dwc2_udc_otg init failed   set_config: high speed config #1: usb_dnload   fastboot_set_alt: func: f_fastboot intf: 0 alt: 0As far as I understand, I need

Hi All.I want to use the battery to power the RETRAM so that the contents of the RETRAM can be preserved even if the board is not powered.To do this, I connected the battery to the VBAT pin and set the "PWR_CR2_RREN" value to the "PWR_CR2" register of the M4 core firmware.However, when booting from Linux, the value set in the "PWR_CR2" register disappears.When booting in "Engineering Mode" and running only with the firmware of the M4 core, the setting value of the "PWR_CR2" register does not disappear even when the main power is turned off.Is there anything I need to add when I create the "dts" file to enable that feature?Please give me a lot of advice.ThanksRegardsMachilus

Hi,I'm using STM32MP157A-DK1 and I built the image adding the logicanalyser layer (https://github.com/STMicroelectronics/meta-st-stm32mpu-app-logicanalyser).I follow the tutorial "How to exchange data buffers with the coprocessor".I add the rpmsg_hdr code to send message from the M4 to the DDR memory.The message is "Hello\r\n".I would like to see this message with A7.In the folder /dev there is the device rpmsg-sdb.For the code I follow the section "rpmsg_sdb driver" of https://wiki.st.com/stm32mpu/wiki/How_to_exchange_data_buffers_with_the_coprocessor#cite_note-sdb-driver-2I have no problem to open the file descritpor but when I use the command mmap occurs an error that I get with strerror(errno): "Invalid Argument".This is the code:void *buff0_id; int fd; size_t size;   int main(void) { printf("Hello OpenSTLinux World!\n");   size = 7;   fd = open("/dev/rpmsg-sdb", O_RDWR); if(fd < 0) { printf("Error descriptor\n"); printf("%s\n", strerror(errno)); } &nbsp

I have a problem to get the ethernet to work with the PHY AR8035 (Atheros). The board is from MYiR (MYC-YA157C-V2), but they are only providing yocto based image and I'm doing my work with buildroot. I'm using the bootlin buildroot branch: st/2021.02 https://github.com/bootlin/buildroot.gitThe kernel can't find MDIO: mdio_bus stmmac-0: MDIO device at address 6 is missing.The funny thing is, if I first boot the board from eMMC where the original image from MYiR is flashed, and afterwards, without switching power off, I start my image from the sdcard, the ethernet works. I guess this means that some register value is wrong, but I don't know where to start look. This also means that address 6 for the MDIO is also correct.On TF-A I have CLK_ETH_DISABLED, because the 125MHz is coming from the PHY.Below is the device tree for the kernel (CONFIG_AT803X_PHY=y is set):&ethernet0 { interrupts-extended = <&intc GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, <&intc GIC_SPI 62 IRQ_TYP

Hello,I am working stm32mp157c. I want to send the data coming from ipcc to m4 to another chip with spi.My code is;void MX_SPI4_Init(void) { hspi4.Instance = SPI4;   hspi4.Init.Mode = SPI_MODE_MASTER;   hspi4.Init.Direction = SPI_DIRECTION_2LINES_TXONLY;   hspi4.Init.DataSize = SPI_DATASIZE_8BIT;   hspi4.Init.CLKPolarity = SPI_POLARITY_LOW;   hspi4.Init.CLKPhase = SPI_PHASE_2EDGE;   hspi4.Init.NSS = SPI_NSS_HARD_OUTPUT;   hspi4.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_8;   hspi4.Init.FirstBit = SPI_FIRSTBIT_MSB;   hspi4.Init.TIMode = SPI_TIMODE_DISABLE;   hspi4.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;   hspi4.Init.CRCPolynomial = 0x0;   hspi4.Init.NSSPMode = SPI_NSS_PULSE_ENABLE;   hspi4.Init.NSSPolarity = SPI_NSS_POLARITY_HIGH;   hspi4.Init.FifoThreshold = SPI_FIFO_THRESHOLD_01DATA;   hspi4.Init.TxCRCInitializationPattern = SPI_CRC_INITIALIZATION_ALL_ZERO_PATTERN;   hspi4.In

Hello,I am working stm32mp157c. I'm trying to change the clock rate of stmcubeide using pll4q for spi45 (StmCubeIde outputs are attached.). Also The bsp setting is attached .Pll settigs is;   st,pll@3 {      reg = <3>;      cfg = <1 32 5 66 5 PQR(0,1,0)>;      frac = <0x1000>;   };I see the clocks are set correctly except pll4q (in linux "cat /sys/kernel/debug/clk/clk_summary" command).It turns out 25.125Mhz when it should be 6MHz (linux outputs are attached).I measure the pll4q clock with oscilloscope. Same as the value i see in "cat /sys/kernel/debug/clk/clk_summary" (not 6MHz, it is 25.125Mhz).Where do you think the problem might be?

Hello!I'm using MYD-YA15XC-T board based on stm32mp151 kernel 5.4.And wanted to share files with it via FileZilla ftp/sftp file manager on the PC.But i could not connect to the board, there is always login incorrect error, whichever login or password I try to use: My board uses automatic login, so there is no password that i know, really.And i believe the openssh-sftp package is installed.Do i missing something for sftp/ftp connection to work?Regards, Vlad.

Hi,We configured 1 uart for debugging purpose in our custom board at u boot level. Now we want to configure anthour uart for communicating with other devices.how do we configure second uart? For debug uart we use serial_putc() for transmit and serial_getc() for receiving .what are drivers we should use for transmit and receive data for second uart?

I am using stm32MP157F-DK eval board (on windows) and I would like to try the DDR testing tool on cubeMX. But this is my first time trying to do so - I try to follow steps in "U-Boot SPL: DDR interactive mode" (url: https://wiki.st.com/stm32mpu/wiki/U-Boot_SPL:_DDR_int). It states i should define this mode under CONFIG_STM32MP1_DDR_INTERACTIVE - but I dont understand when or how should I do that? Should this be done on full flashlayout_st-image-*** or should i just have boot running?

Hi,I'm using a STM32MP157a with yocto dunfell with 5.4 kernel version, and I'm trying to enable the kernel splashscreen. On my board I'm using the RBG lcd interface, and when the system is UP my application in showing curretly. On kernel config I have enabled the flags:LOGOLOGO_LINUX_CLUT224FRAMEBUFFER_CONSOLEbut no tux are showing at startup...Where I'm wrong ?

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Hi all,How can i add support for animated splash screen on stm32mp1 ?I have understanding of the psplash recipe used for custom bootscreen which works completely fine. I would like to have animation while system is booting up.Any inputs are highly appreciated.

Hello, I'm trying to PWM some pins using the sysfs interface on the openSTLinux but unfortunately, it's not working.I've been changing the device tree files in order to get it working, but still without success.I'm trying to follow this wiki but when I run the:ls /sys/class/pwmI get nothing.What could be the issue? PWM is enabled on the kernel.I've attached the modified device tree files.Best regards,Fernando Fontes

Hi,Is there any chance to get a free documentation for the Vivante GPU on STM32MP157F?Want to support hardware accelerated 2D (not 3D) by the GPU on a bare-metal (own OS) project.I have found a reverse engineering project on GitHub facing this lack of documentation:https://github.com/laanwj/etna_vivThere was already a question on the StackExchange site Electrical Engineering:https://electronics.stackexchange.com/questions/512232/stm32mp157-gpu-documentation

hello:    ​I made a board using the AR8035 phy chip. The system can find the phy, but it can't connect to the network.I need your help.log:

If I put the system to sleep via the "echo mem > /sys/power/state" mechanism, how can I execute code/script on wakeup event?Thanks,Ben

I am struggling to achieve a USB gadget with Mass Storage + rndis.When i start each service alone everything works but when i am trying to start both of them i receive the following error:dwc2_hsotg_ep_enable: No suitable fifo foundAny suggestion how to modify the dtsi in order to achieve it .Speed is not a conserne i can reduce the speed to full-speed as well.Thanks,Thanasis