STM32 MPUs

Hi I am trying to configure I2S with stm32mp135f-dk so that i2s signals are accessible from 40 pin header. I am using the realtime package (build-openstlinuxweston-stm32mp13-rt). I was checking the instruction from you web and it tells that I should enable I2S using menuconfig. I am seeing that I2S is a module that I cannot directly enable. How can I check that this is in the build?Also I would need some support regarding the device tree configuration. Do I need to run STM32CubeMX and generate new devicetree files to get something activated? Or is there some existing dts file which I could edit and add my i2s driver in use there? It looks like that stm32mp135f-dk.dts does not currently contain any i2s related configuration.

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I am currently developing using the STM32MP157FAD. And I want to create a distribution image and download the image using STM32CubeProgrammer.However, while downloading the image, the following error message is displayed in the log of STM32CubeProgrammer.15:34:17:270 : DFU status = 0 15:34:17:270 : DFU State = 5 15:34:17:270 : Segment[0] downloaded successfully 15:34:17:270 : File download complete 15:34:17:270 : Time elapsed during download operation: 00:00:01.440 15:34:17:270 : RUNNING Program ... 15:34:17:270 : PartID: :0x01 15:34:17:270 : DFU status = 0 15:34:17:270 : DFU State = 5 15:34:17:270 : sending a dfu end of download request 15:34:17:270 : DFU status = 0 15:34:17:271 : DFU State = 7 15:34:22:259 : DFU status = 0 15:34:22:259 : DFU State = 2 15:34:22:259 : sending a set alternate setting request with index: 5 15:34:27:259 : receiving packet 15:34:32:260 : sending a clear status request 15:34:42:262 : an error occured after sending the clear status request 15:34:42:262 : S

Hi, I have a rather simple question. I use cube mx to generate dts, my Openstlinux is v22.11.23 and during 'bitbake tf-a-stm32mp' I encounter a lack of definition in some '*.c' files like Built stm32image successfully | | CC drivers/st/ddr/stm32mp1_ram.c | CC drivers/st/ddr/stm32mp_ddr_test.c | CC drivers/st/ddr/stm32mp_ram.c | drivers/st/crypto/stm32_hash.c: In function 'hash_hw_init': | drivers/st/crypto/stm32_hash.c:161:24: error: 'HASH_CR_ALGO_SHA1' undeclared (first use in this function) | 161 | reg |= HASH_CR_ALGO_SHA1; | | ^~~~~~~~~~~~~~~~~ | drivers/st/crypto/stm32_hash.c:161:24: note: each undeclared identifier is reported only once for each function it appears in | drivers/st/ddr/stm32mp1_ddr.c: In function 'stm32mp1_ddr3_dll_off': | drivers/st/ddr/stm32mp1_ddr.c:491:26: error: 'DDRPHYC' undeclared (first use in this function); did you mean 'DDRPHYC_PIR'? | 491 | if (clk_get_rate(DDRPHYC) < 100000000U) { | | ^~~~~~~ | | DDRPHYC_PIR | drivers/st/ddr/stm32mp1_ddr.c:491:26:

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I have integrated Micro-ROS into the m4. I have it working such that I am able to publish sensor data and receive it from other nodes. However Micro-ROS takes up a quite a bit of space, 70+ KB. In their documentation it is target at mid tier micro controllers. I am trying to add the parameter server and that pushes the .text over the 128KB limit. I am wondering if it is possible / advisable to recompile the system image to allow for larger text space for the co processor. I believe their are some changes to make to the device tree memory section among other places. My possible options I see would be:Rebuild the system image to increase memory for the M4 and make the other requisite changes to increase the size of the .text spaceDon't use micro-ROS on the m4 and exchange data via packets and a smaller implementation by hand and parse the data on the A7 side to publish it into the ROS2 world.Optimize everything as much as possible to reduce the size and try to keep squeezing it into the

Hi,after changing some kernel settings probably, I suddenly can not flash it to our custom STM32MP157 based board. Process fails around 100% of last partition with error: "Error: Error while reading the file"Looks like Cube reads file size incorrectly. Cube output: 16:30:48:454 :  Size         : 1.27 GB  16:30:48:454 :  Partition ID : 0x12  16:30:48:454 : Download in Progress: 16:30:48:454 :  Size         : 104857600 BytesReal file size in explorer is Size: 1,26 GB (1 363 148 800 bytes)Size on disk: 1,26 GB (1 363 148 800 bytes).Size of other partition images is read correctly.When I use other image, the printed size is same (but still wrong) 16:52:06:736 :  Size         : 104857600 BytesShould be 1,22 GB (1 312 153 600 bytes)but Cube is ab

Following the tutorial on How to customize the Linux kernel I made steps as below:Create a custom layer.Add it to the build configuration in bblayers.conf.Create a fragment.config with bitbake menuconfig and put it into my-layer/recipes-kernel/linux/linux-stm32mp/5.15/ as the kernel version is 5.15.Create a my-layer/recipes-kernel/linux/linux-stm32mp_%.bbappend file as advised in the tutorial:FILESEXTRAPATHS:prepend := "${THISDIR}:${THISDIR}/${PN}:"   KERNEL_CONFIG_FRAGMENTS:append = "${WORKDIR}/fragments/${LINUX_VERSION}/fragment-custom.config" SRC_URI:append = " file://${LINUX_VERSION}/fragment-custom.config;subdir=fragments "It seems that the kernel configuration wasn't applied at all, is there something that I'm doing wrong? Without the FILEXTRAPATHS line, the file couldn't be found, yocto didn't look into my-layer at all.

In the recently, for the past few days, I am facing this new issue that, if i compile for my custom som and program, i always get this error. But if I dont do any add-on of packages, I works fine.I even added a simple package like "vim" using IMAGE_INSTALL in addons/conf/machine/<machine_name>.conf file .I tried creating new directory and adding files and building from scratch multiple times. Still no success. It always crashes after resizing the partition.

HiI'm testing the firmware code using STM32MP157D-DK board.The current configuration for testing use st-link CN11 and ethernet to upload firmware program by using STM32CubeIDE.My question is, Is it possible to do the simmiar firmware program uploading only with st-link CN11 connection?Thanks

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Hello everyone, Currently, I'm using X-CUBE-UCSI and came across some information in the user manual regarding the UCSI Operating Policy Manager (OPM) functionality in STM32MP1 series microprocessors. I was wondering if anyone could point me in the right direction to find open resources or documentation related to this topic. Any help would be greatly appreciated.Thank you in advance.

Hi, I am using STM32MP157D-DK1 board to cross compile my application from host pc.My host PC is installed with ubuntu 20.04. I have setup the build environment in host pc. When i am executing the hello exe in STM32MP board.Please find details below. ubuntu_20_04@ubuntu2004:~/STM32MPU_workspace/STM32MP1-Ecosystem-v4.1.0/Developer-Package/SDK/sysroots/x86_64-ostl_sdk-linux/usr/bin/arm-ostl-linux-gnueabi/hello$ uname -aLinux ubuntu2004 5.4.0-42-generic #46-Ubuntu SMP Fri Jul 10 00:24:02 UTC 2020 x86_64 x86_64 x86_64 GNU/Linuxubuntu_20_04@ubuntu2004:~/STM32MPU_workspace/STM32MP1-Ecosystem-v4.1.0/Developer-Package/SDK/sysroots/x86_64-ostl_sdk-linux/usr/bin/arm-ostl-linux-gnueabi/hello$ lsb_release -aNo LSB modules are available.Distributor ID:   UbuntuDescription:   Ubuntu 20.04.1 LTSRelease:   20.04Codename:   focalubuntu_20_04@ubuntu2004:~/STM32MPU_workspace/STM32MP1-Ecosystem-v4.1.0/Developer-Package/SDK/sysroots/x86_64-ostl_sdk

Hi, we tried to send raw ethernet packages using a STM32MP157C-DK2. We used this simple C code here: https://gist.github.com/austinmarton/1922600The code works well on Linux x86 systems as well on Raspbian, but not on the STM32MP157C-DK2 [1]: Sending raw ethernet packages works, but no raw packages are received. Do you have any idea what could go on here? Is there a specific option to configure the package filters of the STM32MP1 ethernet driver?[1] using en.FLASH-stm32mp1-openstlinux-5.15-yocto-kirkstone-mp1-v22.11.23.tar.gz from https://www.st.com/en/embedded-software/stm32mp1starter.html

Hello everyone,I am trying to integrate the Murata Wi-Fi/BT combo module 1YN in a custom board design based on stm32mp1. The BT part works fine, while the Wi-Fi is not initialized by the system.Apparently, the chipset variant CYW43439 is not supported by the current OpenSTLinux distribution based on kernel 5.15. Could you please provide instructions on how to support the new chipset?So far, I tried to apply the following patches to kernelwifi: brcmfmac: add Cypress 43439 SDIO ids - Patchwork (kernel.org)[PATCH] wifi: brcmfmac: add Cypress 43439 SDIO ids (kernel.org)but I am getting the following error at boot time:[ 15.312838] brcmfmac: brcmf_fw_alloc_request: Unknown chip BCM43439/5Does ST plan to release patches to support the new CYW43439 chipset?Thanks in advance!

Dear ST Community,I'm working with fdcan on stm32mp157d-dk1, the fdcan works properly in engineering mode, but i have an issue when in production mode, I found that I have to add the fdcan to the device tree, then I tried to compile the dts generated by CubeMx in order to activate fdcan but i'm getting an error : "syntax errorFATAL ERROR: Unable to parse input tree"I've used the dts from this link : https://github.com/STMicroelectronics/arm-trusted-firmware/blob/v2.6-stm32mp/fdts/stm32mp15xx-dkx.dtsi#L254and other dts from other project but i'm getting the same problem

Hi team,​I'm trying to build my own Linux distribution for "STM32MP151AAA" now.​https://wiki.st.com/stm32mpu/wiki/OpenSTLinux_distributionAre there only the following two images that I can select by referring to the above URL?Is the difference between these two images whether the interface is GUI or CUI? st-image-weston st-image-core​Best regards,​

Hi!I hope there is someone with a little experience in this topic. We are trying to get eth0 without a PHY running.HW development decided to connect an ethernet switch (LAN9668) directly to the eth0 interface. MDIO and RGMII are connected.We are trying to describe the device-tree using the "fixed-link" property:&ethernet0 { status = "okay"; pinctrl-0 = <&ethernet0_rgmii_pins_a &ethernet0_pps_pins_a>; pinctrl-1 = <&ethernet0_rgmii_sleep_pins_a &ethernet0_pps_sleep_pins_a>; pinctrl-names = "default", "sleep"; phy-mode = "rgmii-id"; max-speed = <1000>; //phy-handle = <&phy0>; nvmem-cells = <&ethernet_mac_address>; nvmem-cell-names = "mac-address";   fixed-link { speed = <1000>; full-duplex; }; };We removed: mdio0 { #address-cells = <1>; #size-cells = <0>; compatible = "snps,dwmac-mdio"; phy0: ethernet-phy@0 { reg = <0>; }; }; };But we are still not able to get the link up.Wi

Many thanks for your help!Currently, we are using the SRAM4 memory as a shared RAM mapped between the M4 and the A7 cores. We have a Linux application that writes full 32bit values from the A7 core, as in the following snippet: *(volatile uint32_t *)p_sram4_mapped = 0x1441cddc; // (core A7) *(volatile uint32_t *)p_sram4_mapped = 0xa55a3663; // (core A7) ...the M4 core application that uses the same shared memory may read from it a 32bit word comprised of 16bit values coming from different A7 write operations, e.g. reading this way: const uint32_t read_value = *(volatile uint32_t *)p_sram4_mapped; // (core M4)read_value could be OK, e.g. 0x1441cddc, 0xa55a3663but read_value could be also a 16-bit hybrid, e.g. 0x14413663, 0xa55acddcThe same is true also in the vice versa case when M4 writes and A7 reads.I wonder if there is a way to make the read/write operations from the A7/M4 cores atomic on a 32-bit size instead of a 16-bit size.Many thanks again for your help!

Hi!As far as I looked into the source code, only is i2c4 is used for communication to pmic.Our custom board has an external PLL connected to i2c1. The PLL needs an initial configuraion to provide 48MHz.It would be ideal if I could do this during tf-a bl2 stage.What I have tried:Added i2c1 to the device tree:&i2c1 { pinctrl-names = "default"; pinctrl-0 = <&i2c1_pins_c>; i2c-scl-rising-time-ns = <100>; i2c-scl-falling-time-ns = <7>; clock-frequency = <400000>; status = "okay"; };This is my i2c1 test code: int ret, val; struct dt_node_info i2c_info; struct i2c_handle_s *i2c = &i2c_handle; struct stm32_i2c_init_s i2c_init; uint32_t pll_i2c_addr = 0x6D; uint8_t data[18] = {0};   i2c_info.base = 0x40012000; i2c_info.status = 2; i2c_info.clock = I2C1_K;   i2c->i2c_base_addr = i2c_info.base; i2c->dt_status = i2c_info.status; i2c->clock = i2c_info.clock;   i2c->i2c_state = I2C_STATE_RESET; i

I am looking to transfer large amount of data from the linux userspace to the MCU shared memory (MCU SRAM3) using the indirect transfer method:https://wiki.st.com/stm32mpu/wiki/Exchanging_buffers_with_the_coprocessorI would like to use the MCU SRAM (as opposed to DDR) because there are tight timing requirements, so I would like to keep everything in the MCU tightly coupled memory.Are there any tutorials, explainers, or example code that shows how to do this? I found this, but it is targeted to using DDR instead of MCU SRAM:https://wiki.st.com/stm32mpu/wiki/How_to_exchange_data_buffers_with_the_coprocessor#rpmsg_sdb_driverAs far as I understand, it's not possible to write data directly to a specific physical memory address from a linux userspace application. So is it possible for my linux application to create a buffer in SRAM3, then pass the physical address pointer the M4 program using rpmsg/openamp?Also, does there need to be some sort of spinlock on SRAM3 to prevent either core from

I am using an STM32MP157D-DK1 eval board, and I am looking to run a barebones linux image with the LCD-TFT pins disabled, so I can use those pins with the M4 core. Is there a pre-generated image that does not use the LCD-TFT (HDMI) peripheral? Otherwise, is there a tutorial for generating a custom linux image with some of the peripherals disable? I have device tree files that were generated using CubeMX, and I have successfully generated a linux image using Yocto and the BSP from the meta-st-stm32mp repo on github.

The STM32MP1 example code on github targets the STM32MP157C on the STM32MP157C-DK2 and STM32MP157C-EV1 eval boards, however both of those boards are obsolete. I am using the STM23MP157D-DK1 eval board.How do I port the example code so that it targets the correct chip and eval board?Specifically, I am trying looking at the OpenAMP example code:https://github.com/STMicroelectronics/STM32CubeMP1/tree/master/Projects/STM32MP157C-DK2/Applications/OpenAMPhttps://github.com/STMicroelectronics/STM32CubeMP1/Thank you,Owen

I have two NOR flash in my hardware.   On SoM (Boot meadia detecting as NOR1 in Uboot) On Carrier Card   Both are detecting in Uboot as Nor0 and Nor1 but in STMCube programmer i am not able to flash to Nor1.   Tool given NOR1 not found error. So not able to flash to NOR1 and Boot from QSPI.   If i put NOR0 in tsv file it is flashing to carrier card NOr flash. I wanted to flash to On SoM QSPI which is detecting as NOR1 which is not supported in TSV file.   To test , I have made the carrier card SPI4 disabled then On SoM QSPI is detecting as NOR0 and flashing and booting works.   [2023-05-25 19:25:57] uboot> mtd list [2023-05-25 19:26:01] SF: Detected is25wp016 with page size 256 Bytes, erase size 64 KiB, total 2 MiB [2023-05-25 19:26:01] SF: Detected n25q256ax1 with page size 256 Bytes, erase size 64 KiB, total 32 MiB [2023-05-25 19:26:01] List of MTD devices: [2023-05-25 19:26:01] * nor0 [2023-05-25 19:26:01]  - device: is25wp016@0 [2023-05-

Hello,Sorry for a long post this needs some context.I've been configuring and testing OP-TEE from the following guide:https://wiki.st.com/stm32mpu/wiki/How_to_configure_OP-TEEI'm using the STMicro fork of optee_os (tag 3.16.0-stm32mp-r2), and the OP-TEE client, test, and examples from v3.16 from the OPTEE and linaro github repos. The full xtest passes.Eventually I'll need more than 16 random bytes so changed the optee_example_random to generate more random bytes. Now for the Oddity. When generating longer runs of random bytes, there is almost always a string of all zeros towards the beginning. Here is the output of the linaro version (generates 16 bytes):# seq 8 | xargs -I -- /usr/bin/optee_example_random Invoking TA to generate random UUID... D/TA: random_number_generate:74 has been called I/TA: Generating random data over 16 bytes. TA generated UUID value = 0xbbe9fda061c8fd5b43632e5126fd12 Invoking TA to generate random UUID... D/TA: random_number_generate:74 has been called I/TA: Ge