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Posted on May 12, 2017 at 16:28I found a issue in the latest HAL Libary. * @file stm32f4xx_hal_hash.h * @author MCD Application Team * @version V1.6.0 * @date 04-November-2016 * @brief Header file of HASH HAL module.Inside HASH->CR register the mode bit is set for a HMAC calculation.But this bit is never cleared anymore.Therefore It isn't possible to process a HASH calculation with the DMA if a HMAC calculation is done before.I suggest to clear this bit inside HAL_HASH_Init()HASH->CR &= ~HASH_CR_MODE;Or did I miss something?!?**EDIT**It's the same with ALGO mode. After a Md5 calculation it isn't possible to process a SHA-1 calculation anymore.HASH->CR &= ~HASH_CR_ALGO;#issue #stm32 #hash
Posted on April 28, 2017 at 10:40I have two STM32F103 connected together with SPI in full duplex mode. They changing 700 halword with DMA and CRC enabled. The communication is fine (no crc or other error) but there is this line of code in the SPI_DMATransmitReceiveCplt() in the stm32F1xx_hal_spi.c which blocks the code till the SPI_TIMEOUT_VALUE. It is 10 ms. What is the meaning of this blocking? If I change this value to 1 on booth controller it even works fine, but it allways wait till the timeout. I don't want to waste here so many time.May I lower this timeout or set it 0? Or despite the proper CRC there is some kind of error during the communication which cause this hanging?/* CRC Calculation handling */ if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) { /* Check if CRC is done on going (RXNE flag set) */ if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, SET, SPI_TIMEOUT_VALUE) == HAL_OK) { /* Wait until RXNE flag is set to send data */ if(SPI_WaitOnF
Posted on April 22, 2016 at 12:31Hi,I need to implement an existing circa algorithm [1]. I have a table driven C implementation, but I would like to use the STM32L4 CRC peripheral. I�ve read the chapter in the reference manual, and I know which parameters the peripheral allows, but unfortunately, I fail to map them to the �usual� definitions of CRC algorithms. Is there any application note, that describes the �CRC computation� block in more details (I�ve tried to use the st.com-search, but that results just in sql errors)?Any hint on how I would have to map a CRC algorithm with the following parameters to the parameters, the CRC peripheral is using? bits: 8 poly: 0x9c init: 0x5a xor: 0x00 reverse: false non-direct: falseThis should result in 0x18 for the test input �123456789� [2]. That�s the code, where I�v
Posted on March 28, 2017 at 12:38 Hi I m using stm32f4 for my project. My project has AES encryption and decryption parts. I using standard peripheral librarys. Standard peripheral library has http://www.hanese.nl/STM32/stm32f4stdlibrary/html/group___c_r_y_p.html. I use this library for AES process. I generate codes like https://github.com/g4lvanix/STM32F4-workarea/blob/master/Project/STM32F4xx_StdPeriph_Examples/CRYP/CRYP_AESmodes/main.c and my codes is following lines. uint8_t AES256key[32] = {0x60,0x3d,0xeb,0x10,0x15,0xca,0x71,0xbe, 0x2b,0x73,0xae,0xf0,0x85,0x7d,0x77,0x81, 0x1f,0x35,0x2c,0x07,0x3b,0x61,0x08,0xd7, 0x2d,0x98,0x10,0xa3,0x09,0x14,0xdf,0xf4}; uint8_t IV_1[16] = {0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07, 0x08,0x09,0x0a,0x0b,0x0c,0x0d,0x0e,0x0f}; uint8_t Plaintext[AES_TEXT_SIZE] = {0x6b,0xc1,0xbe,0xe2,0x2e,0x40,0x9f,0x96, 0xe9,0x3d,0x7e,0x11,0x73,0x93,0x17,0x2a, 0xae,0x2d,0x8a,0x57,0x1e,0x03,0xac,0x9c, 0x9e,0xb7,0x6f,0xac,0x45,0xaf,0x8e,0x51, 0x
Posted on March 02, 2017 at 13:13Hello,I've already written on the forum without luck. I'm in trouble trying to figure out how to verify a message signed using ECDSAsign function. Locally it seems to work, but if I export the signed hash, it is not verify by an external system.Where can be the problem? Any suggestion?Regards,Fabio#x-cube-cryptolib
Posted on January 27, 2017 at 08:25 I am trying to use the hardware peripheral on the STM32F072 to calculate a 16-bit CRC for a modbus RTU application. The hardware peripheral offers twice the speed compared to my software implementation. I am getting the incorrect CRC back and cannot figure out where I am doing what wrong. /* USER CODE BEGIN 0 */ #define MODBUS_CRC_POLY 0xA001 /* USER CODE END 0 */ CRC_HandleTypeDef hcrc; /* CRC init function */ void MX_CRC_Init(void) { hcrc.Instance = CRC; hcrc.Init.DefaultPolynomialUse = DEFAULT_POLYNOMIAL_DISABLE; hcrc.Init.DefaultInitValueUse = DEFAULT_INIT_VALUE_DISABLE; hcrc.Init.InputDataInversionMode = CRC_INPUTDATA_INVERSION_NONE; hcrc.Init.OutputDataInversionMode = CRC_OUTPUTDATA_INVERSION_DISABLE; hcrc.Init.GeneratingPolynomial = MODBUS_CRC_POLY; hcrc.Init.CRCLength = CRC_POLYLENGTH_16B; hcrc.Init.InitValue = 0xFFFF; hcrc.InputDataFormat = CRC_INPUTDATA_FORMAT_BYTES; if (HAL_CRC_Init(&hcrc) != HAL_OK) { Error_Handler();
Posted on January 19, 2017 at 08:47Hi,I'm developing a customized SPI Bootloader code. I plan to use CRC32 in verifying the programmed application code. I used this link as a reference for my CRC32 calculator C-code function in the Bootloader:https://github.com/joeferner/stm32-spi-bootloader/blob/master/src/spi-bootloader.c http://www.ipgp.fr/~tuchais/earthworm/v6.3/src/data_sources/naqs2ew/crc32.c But, the values that I get when I use that function isn't the same to the ones I get when I load the hex or bin file to ST-Link. ST-Link is showing different CRC32 values.On the other hand, when I use online tools such as:http://www.fileformat.info/tool/hash.htm http://esrg.sourceforge.net/utils_win_up/md5sum/ I am getting the same CRC32 values with my C-code function.Is ST-LINK using a different algorithm (but in the user manual, it says that it's using CRC32)?Any insights is appreciated!Thanks,#stlink #crc32 #stm32
Posted on January 17, 2017 at 10:18Hi , i am new to linux,i am using crypto 3.0 package and stm32F205xx andencounter several problem :i write my own makefile and linker script (mostly copy from guthub)I use stlink-texane and gdb to debug, here are several question:1)Type ''apropos word'' to search for commands related to ''word''...Reading symbols from main.elf...done.(gdb) tar ext:4242Remote debugging using :42420x08000354 in SystemInit () at system_stm32f2xx.c:154154 RCC->CR &= (uint32_t)0xFFFBFFFF;(gdb) s157 RCC->CIR = 0x00000000;(gdb) ss169 }I was wonder why it don't start @ main.cAnything i would come wrong?2) I try to apply some simple test say i add some variableunsigned char test = 100 @ line 100and then once i debug''b main.c:100'' and continuewhen i use ''p test'' (which i expected it come out 100, it gives another valueI would please if anyone can help.Thanks2)
Posted on January 11, 2017 at 05:32hi i am new to linux,.this is my first time to use command line makefile to compile.i now encounter a problem that undefined reference to `AccHw_RSA_PKCS1v15_Encrypt' in the /Examples_Crypto/Src/example_rsa_encdec.cbut i have already added the library path and library for thatLFLAGS += -L$(TOPDIR)Middlewares/ST/STM32_Crypto_AccHw/Lib -lSTM32AccHwCryptoV3.1.0_F2_GCC -lSTM32AccHwCryptoV3.1.0_F2_GCC_ot -lmmain.elf: $(OBJS) $(CC) $(LFLAGS) -o $@ $(OBJS) @echo 'linked '$<'!\n'I would appreicate if anyone can help.ThanksJeff
Posted on January 12, 2017 at 21:10This CRC is used by an I2C peripheral and documented at http://www.sensirion.co.jp/fileadmin/user_upload/customers/sensirion/Dokumente/GasFlow/Sensirion_Gas_Flow_SFM3000_CRC_Checksum.pdf Can this CRC be duplicated using the CRC IP on the STM32F7? The HAL library defaults to X^4 + X^2 + X^1 and I seem unable to change that (and it states that the exponents must be less than 8.) I tried substituting the code for the polynomial above (0x131) and the HAL initialization code rejected it.Is this a shortcoming of the library or a limit of the H/W?Code to init the CRC produced by Cube is:/* CRC init function */static void MX_CRC_Init(void){hcrc.Instance = CRC; hcrc.Init.DefaultPolynomialUse = DEFAULT_POLYNOMIAL_DISABLE; hcrc.Init.DefaultInitValueUse = DEFAULT_INIT_VALUE_DISABLE; hcrc.Init.GeneratingPolynomial = 0x7; hcrc.Init.CRCLength = CRC_POLYLENGTH_8B; hcrc.Init.InitValue = 65535; hcrc.Init.InputDataInversionMode = CRC_INPUTDATA_INVERSION
Posted on December 30, 2016 at 23:26The only off the shelf board i have found with crypto block on it is STM3221G-EVAL, a bit pricey and got tons of features that i dont need.For cheap testing, de-chipping NUCLEO-F207ZG and populating it with STM32F217ZG would work, i guess. Any other off the shelf alternatives ? #crypto #eval
Posted on December 12, 2016 at 08:26 Hello All, I want to implement MODBUS RTU Slave for my Discovery STM32F0. I have worked on this protocol in 8051 controller. As i was going through CUBE i saw CRC peripheral in STM32F0 so i was curious and want to implement it on hardware side. I have implemented as below /*##-1- Configure the CRC peripheral #######################################*/ CrcHandle.Instance = CRC; /* The default polynomial is used */ CrcHandle.Init.DefaultPolynomialUse = DEFAULT_POLYNOMIAL_ENABLE; /* The default init value is used */ CrcHandle.Init.DefaultInitValueUse = DEFAULT_INIT_VALUE_ENABLE; /* The input data are not inverted */ CrcHandle.Init.InputDataInversionMode = CRC_INPUTDATA_INVERSION_NONE; /* The output data are not inverted */ CrcHandle.Init.OutputDataInversionMode = CRC_OUTPUTDATA_INVERSION_DISABLE; /* The input data are 8 bits lenght */ CrcHandle.InputDataFormat = CRC_INPUTDATA_FORMAT_BYTES; if (HAL_CRC_Init(&CrcHandle) != HAL_OK)
Posted on December 19, 2014 at 11:27We would like to enable level 1 read-out protection from code running on an STM32F437. We have code that will enable the protection using the following steps:1. Unlock OPTCR by writing twice to FLAS->OPTKEYR, using special values from reference manual.2. Wait for BSY bit to clear in SR register.3. Set new value in OPTCR, with all RDP bits cleared4. Set STRT bit in OPTCR5. Wait for BSY bit to clear in SR register.6. Relock OPTCR by setting lock bitHowever, when this runs, the processor seems to hang shortly after step 4, setting the start bit. It may stop immediately - certainly we don't see any serial output that happens just after step 4. We've tried leaving the MCU powered for a few minutes with nothing more happening. If the MCU is power cycled, level 1 protection has been set as expected.We would like to set the readout protection and then continue normally, so that our bootloader can ensure protection is enabled whenever it runs. It wou
Posted on November 18, 2015 at 11:25Hi All,I'm trying to sign with a private key in the STM32 and then verify on Linux with OpenSSL, to do this I'm doing the next experiments:1. Generating the key pair (private/public) for RSA 1014 on linux with OpenSSL2. Generating the exponents and modulus and copying it on the STM323. Signing a known text like ''this is a test'' with the private key and comparing the result with the same text signed in linux with the same private key... But.. the results are different...Can anybody help me to know how to use the same key in linux and in the STM32 Crypto library to get the same results?Thanks
Posted on November 21, 2016 at 18:10Looking to see if someone can shed some additional light on programming the memory read protection level 1 or 2 for a STM32F030 device. There are a few examples but they perform other options that are not required for my application. I have unlocked the flash but experiencing questions on whether or not to set the user data 0 & 1 option bytes before setting the read protection in the flashprotect function and what other code is required. void unlockflash(void) { while ((FLASH->SR & FLASH_SR_BSY) != 0) if ((FLASH->CR & FLASH_CR_LOCK) != 0) { FLASH->KEYR = FLASH_FKEY1; FLASH->KEYR = FLASH_FKEY2; } if ((FLASH->CR & FLASH_CR_OPTWRE) == 0) { FLASH->OPTKEYR = FLASH_OPTKEY1; FLASH->OPTKEYR = FLASH_OPTKEY2; } } void
Posted on November 11, 2013 at 20:26Hello Maybe I'm wrong, but the http://www.st.com/web/catalog/tools/FM147/CL1794/SC961/SS1743/PF259409 only provides binaries compatible with compilers from Keil or IAR but none for GCC. Since the sources aren't openly available, for reasons I can understand, is it possible that somebody from ST provides us an GCC compatible version? Thank you. #stm32-cryptograhic-library-gcc #understand-your-tools #understand-your-tools #know-your-tools
Posted on August 20, 2016 at 12:21Running 4.15 and as a programmer I really don't need this Xa+Xb rubbish. Can we just have a decimal (or preferably) an hex field?If it is going to have something clever like this then at least make sure it works. There are just so many things wrong with the implementation.The CRC16 CCITT poly is x16+x15+x5+1 but according to the help, for a 16 bit poly the highest value must be LESS than 16. So I tried entering x15+x14+x4+1 (and without the +1) thinking that the bits were numbered differently but still no go. In fact it doesn't accept any values :( #crc #stm32cubemx #polynomial
Posted on October 14, 2016 at 00:41Dear All, I successfully could integrate the AES GCM algorithms (firmware variant, no hardware acceleration) of STM32 cryptographic library v2.0.6 into the project. It encrypts and decrypts the plaintext correctly without any error. Simultaneously, there is another crypto project in the PC side using the Crypto++ library with the same AES GCM encrypt/decrypt parts. Here, too, everything works. However, the problem is that when using the same AES256 key, IV array (size 12), plaintext, header (AAD), the STM32F4 and the PC generates different ciphers and tags. Their lengths are the same across the platforms but the content is totally different. So it becomes impossible to encrypt in PC and try to decrypt the cipher in STM32F4. I have tried to supply the cipher and the tag generated in STM32F4 to the PC decrypted but it breaks with the error:Caught HashVerificationFailed... HashVerificationFilter: message hash or MAC not valid So my question
Posted on January 12, 2011 at 13:46CRC computation #stm-crc32 #stm32f2-crc
Posted on August 17, 2016 at 12:34 Hi, I'm implementing the read out protection for the F746 controller. Changing it from level0 to level1 at the first start from my code. First I realised that the level1 was setted but not saved after a power cycle. Then I realised that the HAL_libraries had an error by modifying the OPTCR register. Because the level was writen to the first byte address of the register and not the second one. I solved this by just replacing the HAL_libraries with the new ones (V1.1.0 / 22-April-2016) . Now it works. The problem is that it hangs out after setting the OPTSTRT bit in OPTCR register. After a power cycle the level is set to 1. My problem is that even if I do a system reset by calling NVIC_SystemReset() after HAL_FLASH_OB_Launch() I will never get there since my code was interrupted and does not come back. This is the content of my stack by the error: 0xfffffffe <signal handler called>() at 0xfffffff1 UART5_IRQHandler() at uar
Posted on August 31, 2016 at 18:29Hello, Admin and everyone.Please let me ask,Can we use Openssl with STM32 nucleo board ? if possible, how ?I cannot read the lib on Keil.and can we migrate from Opennssl to STM32 crypto lib ?Thanks. #stm32-crypto-openssl
Posted on May 13, 2015 at 11:11 Hello! I'm having trouble using the STM32 Crytpographic Library SHA256 hash in an application running on an STM32F091RC MCU. I'm using it to verify contents in flash (FW download), but have now retraced to just try to encode a simple string ''asdf'' and still getting incorrect results. During the development phase, we've used a different MCU on which my code was working fine on. I see in the documentation for the HASH algorithm: ''This algorithm can run with the STM32F1, STM32L1, STM32F20x, STM32F05x,STM32F40x, STM32F37x and the STM32F30x series using a software algorithmimplementation''. I figured this may be out of date (documentation is from 2013), and it would work with other STM32F0x series MCU:s. But maybe I'm wrong? I've been through the code multiple times, but I've not completely ruled there out could be some code error. I'll give a simple example of what I'm doing which yields an incorrect SHA256 key. I am not getting any indica
Posted on August 29, 2016 at 20:46Hi all, In the https://www.iar.com/support/tech-notes/general/calculate-crc32-as-in-stm32-hardware-v.5.50-and-later/ they instruct to fill unused ROM with 0xFF, is is arbitrary or is there some logic to it? The reason I ask is that if I fill it with 0x00 (as the erase flash value is) I don't have to waste time programming empty space in bootloader update. I leave the ROM range at max in the IELFTOOL tool (and bootloader crc verification function) because I have no idea how large the application might be in the future. Thanks #ielftool-checksum-stm32 #crc
Posted on August 03, 2016 at 18:29Calls to the HAL_CRC_Calculate are causing hard faults.When I step through I found out why: switch (hcrc->InputDataFormat) { case CRC_INPUTDATA_FORMAT_WORDS: /* Enter 32-bit input data to the CRC calculator */ for(index = 0U; index < BufferLength; index++) { hcrc->Instance->DR = pBuffer[index]; <--- this instruction } temp = hcrc->Instance->DR; break; At the marked instruction, the hcrc handle becomes corrupt. The Instance pointer (instead of DR) gets assigned the value of pBuffer[index].Eventually the entire hcrc handle is completely corrupt, and this causes the hard fault.The code looks sound, why is this happening?Anyone have any ideas?-Matt #crc #hal
Posted on March 08, 2013 at 10:31 I've stolen some code from Clive's post here <https://my.st.com/a99fbbe2> (Thanks Clive!) and it works great for computing a CRC all at once. In other words, the following function signature. unsigned long crc32(const unsigned char* buffer, const unsigned int length); However, I'm porting some zlib/png code and the CRC is calculated incrementally with the following function signature: unsigned long crc32(unsigned long crc, const unsigned char* buffer, const unsigned int length); So, I need to be able to preload CRC->DR with the parameter crc. Anyone know how that can be done? #crc32-crc-stm32f4 #crc #crc32
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