Why does my STM32H743VI processor throw a hard fault exception when I place my HAL usart.o variables in SRAM1,SRAM2 or SRAM3, but it runs perfectly when the variables are placed in AXI RAM?
- June 23, 2019
- 6 replies
- 2181 views
I am using an STM32H743VI processor with uVision V5. When I assign the usart.o ZI data to SRAM1, 2 or 3 the project crashes with a hard fault. If I leave out the specification for the usart.o section it gets placed in the AXI ram and the code runs fine. The code snippet for the scatter file is shown below:
VARS_SRAM2 0x300265C0 0x00001A40
{
usart.o (+RW +ZI)
}
RW_AXI 0x24000000 0x000080000
{
main.o (POWER_RECDS)
.ANY (+RW +ZI)
}The usart.c file (MXCube Generated) is shown below:
void MX_USART2_UART_Init(void)
{
huart2.Instance = USART2;
huart2.Init.BaudRate = 57600;
huart2.Init.WordLength = UART_WORDLENGTH_8B;
huart2.Init.StopBits = UART_STOPBITS_1;
huart2.Init.Parity = UART_PARITY_NONE;
huart2.Init.Mode = UART_MODE_RX;
huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE;
huart2.Init.OverSampling = UART_OVERSAMPLING_16;
huart2.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
huart2.Init.ClockPrescaler = UART_PRESCALER_DIV1;
huart2.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_DMADISABLEONERROR_INIT;
huart2.AdvancedInit.DMADisableonRxError = UART_ADVFEATURE_DMA_ENABLEONRXERROR;
if (HAL_UART_Init(&huart2) != HAL_OK)
{
Error_Handler();
}
if (HAL_UARTEx_SetTxFifoThreshold(&huart2, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK)
{
Error_Handler();
}
if (HAL_UARTEx_SetRxFifoThreshold(&huart2, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK)
{
Error_Handler();
}
if (HAL_UARTEx_DisableFifoMode(&huart2) != HAL_OK)
{
Error_Handler();
}
}
void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle)
{
GPIO_InitTypeDef GPIO_InitStruct = {0};
if(uartHandle->Instance==USART2)
{
/* USER CODE BEGIN USART2_MspInit 0 */
/* USER CODE END USART2_MspInit 0 */
/* USART2 clock enable */
__HAL_RCC_USART2_CLK_ENABLE();
__HAL_RCC_GPIOA_CLK_ENABLE();
__HAL_RCC_GPIOD_CLK_ENABLE();
/**USART2 GPIO Configuration
PD5 ------> USART2_TX
PD6 ------> USART2_RX
*/
GPIO_InitStruct.Pin = PD6_GPSMsg_UART2_Rx_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
GPIO_InitStruct.Alternate = GPIO_AF7_USART2;
HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
/* USART2 DMA Init */
/* USART2_RX Init */
hdma_usart2_rx.Instance = DMA2_Stream2;
hdma_usart2_rx.Init.Request = DMA_REQUEST_USART2_RX;
hdma_usart2_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
hdma_usart2_rx.Init.PeriphInc = DMA_PINC_DISABLE;
hdma_usart2_rx.Init.MemInc = DMA_MINC_ENABLE;
hdma_usart2_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
hdma_usart2_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
hdma_usart2_rx.Init.Mode = DMA_NORMAL;
hdma_usart2_rx.Init.Priority = DMA_PRIORITY_LOW;
hdma_usart2_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
if (HAL_DMA_Init(&hdma_usart2_rx) != HAL_OK)
{
Error_Handler();
}
__HAL_LINKDMA(uartHandle,hdmarx,hdma_usart2_rx);
/* USART2 interrupt Init */
HAL_NVIC_SetPriority(USART2_IRQn, PRIO_USART2, 0);
HAL_NVIC_EnableIRQ(USART2_IRQn);
...The hard fault occurs because the DMA link address of the usart structure gets set to an address 0x189C0947 which of course doesn't exist so that when usart receive command is issued later in the program the driver tries to access this address and the hard fault is generated.
Other HAL code modules such as the dac.o initialization code appear to run OK when assigned to these RAM areas. In these cases I am not using DMA so no linkDMA is issued.
I didn't think there were any restrictions on using these three RAM areas for ordinary code variables, but maybe I am wrong.
The reason I wish to use these RAM areas is to keep the AXI ram as free as I can so I can use the large continuous space of the AXI ram for large arrays. These arrays will be used for high speed snapshots of realtime process data from the ADC's.
I have attached a couple of uVision Watch Window screen shots of the huart structure in the working and not working states and the program code for the project.
Any thoughts would be appreciated.