STM32L476 USB inconsistencies.

[shingadaddy]

Posted on March 29, 2017 at 00:21

I've been working with USB on my Nucleo board(S)  for some time now. Been comfortably successful at getting a few operational interfaces working with it. Including DFU. STM32L476. So time to make our own PCBS! We knocked out an order for 10 . Production needing 7 and having a few SPARES to help wear off the new. Ran into a little problem and I turned in an online help request. Waited all day and thought maybe someone there might notice I marked it Critical. Not sure of the turnaround time but everybody's critical  might be a little different. Hope I hear and in the mean time here's where I got too.

We have 10 Brand new (Identical) PCB's with STM32L476VG's on them.

They use the direct connected USB for communication. (PA11/PA12)

They are *all* loaded with the same binary, VIA DFU.

DFU works. Dependably.

The binary is the STM32CubleL4 HAL DEMO from EVAL board, with IO EXPANDER commented out. This runs the LEDS on EVAL and is the only thing needed to be removed for this to work. I figure it works good as a TEST LOAD.

Operationally :

  7 Enumerate/seem to work.  ------  3 DO NOT even enumerate correctly.

Do not meaning: 2 -  with DEVICE NOT RECOGNIZED responses.  1 -  PC IGNORING COMPLETELY

I use VBUS DETECT. USB 5VDC is getting to PA9 on the one the is completely ignored.  

We have matched lines on the USB traces about .7 inches between the type C USB connector and the MICRO. Connectivity is direct via usb line suppressors (TI_SN65220DBVR). No inline resistors. No Pull up on D+.I am going to gather these up personally and look into it. But this is being tested by very capable individuals with years of experience and there does not seem to be a difference in the PCBS PHYSICALLY or SIGNAL WISE. The code that is running on them is the STM32CubeL4 USB in DEVICE MODE -CDC DEMO from the EVAL project in TrueStudio.

My immediate questions would be.

1. Suggestions such as the 'Oh yeah' type, as to what might be wrong?.

2. Since DFU mode works, (and 7 others) shouldn't the enumeration at least be functional on the operational testing?

3. Does DFU USE a different SPEED that is not as critical as USB FS.

4. Does the MSI trimmed with LSE, really provide precision/stability good enough for USB FS?

Crystal = Abracon ABS25-32.768KHZ-T

This is our first 10 in a production run and we are now a little nervous on the 70% operational aspect.

Power = CLEAN

OSC/Clock CLEAN

FDMOD set so FORCED DEVICE MODE is true.

Ground plane internally.

I had one nucleo dev board (Out of 5 or 6) that I used for a while until it acted like it had a heat sensitivity problem after some operational time. Then DEVICE NOT RECOGNIZED. On more than one computer. Unless I left it unplugged for about 30 minutes. Then BACK IN BUSINESS !   THAT is flakiness at its finest. And now I think - maybe we have more?

Just thought I'd drop this here too and see if anyone had any ideas. I really didn't think I had to get the LED out and chase it though the code (again) But here I am. Not amused at all.

Any input appreciated.

Thanks folks.

[shingadaddy]

Posted on April 05, 2017 at 18:08

As it turns out, the MSI has is OWN PLL MODE as you probably already know. And to use MSI trimmed with LSE clock

for USB you have to set the clock source for USB to MSI DIRECT.   NOT thorough one of the many OTHER PLL's. So you simply output MSI on MCO.   And my 3 duds MSI's are as follows

PCB #106:  60.69MHz

PCB #107:  58.45Mhz

PCB #109:  54.14Mhz

Yeah. I just sent production a binary that will output LSE now... We'll see what THAT turns up but on the Nucloe where I've already done this little exercise, my scope says 32.769Khz.   And Put back immediately the OTHER way my MSI is 57Mhz.  (It's still *warm* I guess)

[waclawek.jan]

Posted on April 05, 2017 at 18:30

In your registers screenshot above I now noticed that the MSITRIM field of RCC_ICSCR is not the default zero. Does your program write into this field?

JW

[shingadaddy]

Posted on April 05, 2017 at 18:21

And running via debugger, I can pause it randomly and the RCC CR and CCIPR are correct. As shown above but the CCIPR has the upper 2 bit that are 1's are now 0's since I'm back to the raw demo code. (No AtoD's)

[shingadaddy]

Posted on April 05, 2017 at 18:50

I looked quickly and only see reference to ICSCR in a GET VALUE

void

HAL_RCC_GetOscConfig(

RCC_OscInitTypeDef

*RCC_OscInitStruct)

RCC_OscInitStruct->

MSICalibrationValue

= (

uint32_t

)((RCC->

ICSCR

& RCC_ICSCR_MSITRIM) >> POSITION_VAL(RCC_ICSCR_MSITRIM));

RCC_OscInitStruct->

MSIClockRange

= (

uint32_t

)((RCC->

CR

& RCC_CR_MSIRANGE) );

I suspect the MAGIC of LSE autotrim might fiddle these maybe?

[shingadaddy]

Posted on April 05, 2017 at 18:54

Now here's a headspinner..       The LSE can take as much as 2 seconds to START?

Wonder if the demo code waits that long, for it to be STARTED?  

I gotta eat.

[shingadaddy]

Posted on April 05, 2017 at 21:00

Not having a precision counter in the production area. But 32.771Khz on a FLUKE. On ALL 3 DUDS. Yeah technically outside the 0.65536 tolerance of 20PPM but LSE they *ARE* a running and the Fluke reading might be....well you know.

We're swapping crystals on just 2 of the DUDS, for some 10 PPM units.

[Amel NASRI]

Posted on April 06, 2017 at 12:18

The mystery here should be related to the LSE:

- what is the reference of the crystal you are using?

- which capacitance values did you added?

- Did you checked if they are aligned with the recommended ones with STM32 microcontrollers (listed in

http://www.st.com/content/ccc/resource/technical/document/application_note/c6/eb/5e/11/e3/69/43/eb/CD00221665.pdf/files/CD00221665.pdf/jcr:content/translations/en.CD00221665.pdf

)?

For sure, it is recommended to measure LSE value with a Frequency Counter.

-Amel

[waclawek.jan]

Posted on April 06, 2017 at 12:28

Amel N wrote:

The mystery here should be related to the LSE:

I beg to differ.

The target frequency may be off by 2500ppm for a Device, as per USB2.0. The LSE either runs or not - 10ppm or 100ppm should make no relevant difference, unless the 'MSI PLL' (whatever it is) is badly broken.

I'd see the problem primarily in the 'MSI PLL'. There is virtually no relevant information on it in the DS/RM, which is a bad sign in itself. There's only a switch-on bit and a rather irrelevant (at least for USB usage, which appers to be the primary  reason for this feature) settling-timing in the DS. I don't believe in various magics - IMO, working of things has to be solidly documented. Yes, I am old fashioned.

The mysterious content of RCC_ICSCR.MSITRIM  just enhances suspicion.

There is also no relevant infomation on the MSI trim itself (which I'd ask ST to supply into the RM/DS, too). The frequency/value diagram for HSI in RM indicates, that there may be jumps in the frequency at certain values. Are there such jumps for MSI too? Can't the 'magic' be broken in that it does not take into account such jumps?

I am afraid this is something which can't be resolved at the user level and desperately needs factory attention.

JW

[waclawek.jan]

Posted on April 06, 2017 at 14:21

In [STM32Cube_FW_L4_V1.5.0]\Projects\STM32L476G_EVAL\Applications\USB_Device\CDC_Standalone\Src\main.c I see this:

Can't this be the at root of the problem?

JW

[Amel NASRI]

Posted on April 06, 2017 at 14:37

Indeed this is an error that has to be fixed in USB_Device examples. I'll take care to report it internally.

However, I am not sure that it is the root cause of the issue as the reset value for MSITRIM bits is 0.

It is interesting if

Palmer.Randall

‌ may share current RCC registers snapshots (if there is any modification compared to previously shared ones).

-Amel

[waclawek.jan]

Posted on April 06, 2017 at 14:48

However, I am not sure that it is the root cause of the issue as the reset value for MSITRIM bits is 0.

RCC_OscInitStruct is a local variable in  that function, and I don't see any explicit initializer for the entire struct. It means that the MSICalibrationValue field of it has an undefined value, whatever was in the piece of stack where that variable is located.

As this function is called early in the program, it is quite likely it contains an 'untouched' value from the SRAM. Upon powerup, SRAM cells tend to flip to a certain position depending on miniscule manufacturing process variations, which might explain why some boards systematically work and other don't. There of course might be other explanations, too - undefined is hard to define ;)

HAL_RCC_OscConfig() then subsequently uses this 'random' value to fill in the RCC_ICSCR.MSITRIM field.

JW

[shingadaddy]

Posted on April 06, 2017 at 16:00

You folks have no idea how appreciative I am of the responses. I'm getting really good support direct also.

1. I'll be tinkering with the DRIVE bits.

2. I'll be fixing the blivits that Jan is kindly pointing out --  Unititialized vars , MSI/HSI goof

The register dump shows 0 which is by LUCK I guess.

3. I'll be renting a VERY high accuracy freq counter if need be.

I am approaching a disappear time and will resurface later today but for a question that's pretty direct:

By calculation when using MSI trimmed with LSE

What should the output freq of the MSI be if the LSE is 32767.00000000000  HZ?

What should the output freq of the MSI be if the LSE is 32768.00000000000  HZ?

What should the output freq of the MSI be if the LSE is 32769.00000000000  HZ?

Maybe I should be able to calculate this. I'll be looking when I get back

Rememeber - The LSE's ARE all running.....

Thank you all.

[Bertrand DENIS]

Posted on April 06, 2017 at 18:04

Hello,

1) If the DFU loader works all the time, it tends to prove that the HW is OK as it uses the 'MSI auto calibrated by the LSE mode'. So I don't see why it should not work when your code is running.

2) As written in the datasheet if the Crystal is 32.768 kHz the MSI output in this mode (11) is 48.005 MHz.

So if you are at 32.767 kHz, you will get 48.005 x 32.767 / 32.768 = 48. 0035 MHz

for 32.7669: 48.005 x 32.769/32.768 = 48.0065 MHz

Still OK for an USB specification (+/- 0.25 % so 2500 ppm). That is to say. Min : 47.88 MHz. Max: 48.12 MHz

Bertrand

[shingadaddy]

Posted on April 06, 2017 at 20:13

Thank you Bertrand. Initially there was of course a heavy interest in the LSE, Crystal, caps maybe doing some dirty deed. It's been my experience with crystals where that is usually a STARTUP concern and secondary a power concern. But my LSE's are ALL running. And the worst OFF reading we get is from a Fluke and that's 32.771Khz.

Not enough to convince the MSI to ZING off to 55-60Mhz for sure.

I really want this to be something silly I missed. OR maybe just some combination of clock that the overall system gets heartburn over - THAT CAN BE AVOIDED WITH SETTINGS....Not with blue wires, dangling components and new copper.

[shingadaddy]

Posted on April 07, 2017 at 00:52

Fred *MIGHT* have it fixed for now.

Fred?

Add VAR in main

uint32_t fred = 0 ;

Then -

Add those lines on my Nucleo that misbehaves -   48.005MHZ out MCO pin for MSI.

Comment these out -  TURBO! 57.488MHZ

Repeat 5 times.

Same results. LINES IN = GOOD - LINES OUT = BAD.

 I let my contacts know.

And - Yeah maybe just ONE of those lines might do it.

More tomorrow I'm sure.   (I need to grab one or all of the production Duds...)

[waclawek.jan]

Posted on April 07, 2017 at 00:57

Omit Fred, fix the bug I told about above (instead HSICalibrationValue should be MSICalibrationValue).

JW

[shingadaddy]

Posted on April 07, 2017 at 01:28

Yep I'll get that too. I thought I already did, but I've flipped files around a little today. Checking the register its 0's

Let you know here shortly...   Flipping files around again