STM32F207ZGT6 – Differences Between Silicon Revisions and DFU Failure

[YannG]

 

Hello,

We are using the STM32F207ZGT6 in our production boards and have identified two different silicon revision groups:

• REV_ID = 0x201F (revision 2/3): DFU works correctly.

• REV_ID = 0x203F (revision 4/5): DFU does not work.

The two board versions have an identical schematic, including the USB interface. However, the DFU functionality works with the older silicon revision and fails with the newer one.

Could anyone from STMicroelectronics clarify the following points?

1. What are the detailed differences between silicon revisions 2/3 (0x201F) and 4/5 (0x203F)?

2. Were any changes made to the USB OTG FS peripheral, clock startup, oscillator circuitry, electrical characteristics, or system boot behavior?

3. When was silicon revision 4 (0x203F) first introduced into production?

4. Is there a silicon revision history, release note, or PCN documenting these changes?

Any information or documentation from ST that could help us identify the root cause would be greatly appreciated.

Thank you for your help.

[mƎALLEm]

Hello,

1- What kind of issue you are facing with USB OTG FS ST bootloader with revisions 4 & 5?

2- What clock frequency is used for HSE?

3- What is the bootloader revisions you have with (revision 2/3) and (revision 4/5)?

[YannG]

Hello mƎALLEm,

Thank you for your reply. Please find the requested information below.

1. Issue with the USB OTG FS system bootloader

On STM32F207ZGT6 devices with silicon revisions 4/5 (REV_ID = 0x203F), Windows reports an Unknown USB Device – Device Descriptor Request Failed (USB\DEVICE_DESCRIPTOR_FAILURE, VID_0000&PID_0002). The USB DFU device is not enumerated.

Devices with revisions 2/3 (REV_ID = 0x201F) work correctly with the same board schematic.

We have verified the BOOT0, BOOT1, VBUS and NRST voltage levels and transitions on multiple boards. We have also checked the relevant resistors and the USB hardware.

2. HSE clock frequency

The HSE crystal frequency is 8 MHz.

The crystal currently fitted for testing is ECS-80-18-30Q-VY-TR.

The HSE oscillator does not appear to start when entering the system bootloader in DFU mode. On OSC_OUT, I observe approximately four pulses, about 700 ms apart, with an amplitude of around 2 V. Zooming in on these pulses reveals no 8 MHz oscillation.

I also measured NRST simultaneously with OSC_OUT and confirmed that NRST goes low at each pulse, indicating repeated MCU resets. VDD remains stable during these events.

3. System bootloader version

I read the bootloader version at address 0x1FFF77DE. The reported version is 3.3 on both silicon revision groups (revisions 2/3 and 4/5).

Could these observations be related to a change in the silicon revisions 4/5, particularly regarding HSE startup or the USB DFU system bootloader?

Could you please advise on any known limitations or differences between these revisions that might explain this behavior?

Thank you for your help.

[mƎALLEm]

Thank you for the inputs.

Please confirm the following:

1- Are all boards have the same hardware revision or the same schematic? you can have the same schematic but not the same PCB (different routing, different components ..). So the question is: if you replace the MCU in the working board by one in non-working board, do you see the same issue? could you please do the test if it was not already done?

2- As I understood OSC_OUT clock is available on (revision 2/3) while with (revision 4/5) is not meaning the HSE couldn't start with these revisions. please confirm.

 

[YannG]

1. Hardware revision and PCB layout

The STM32 circuitry and all components directly involved in its operation are strictly identical between the two board generations. The PCB routing around the STM32, including the HSE oscillator and USB circuitry, has not changed.

An additional circuit stage was added elsewhere on the newer board, but this did not affect the routing around the STM32.

Regarding the crystal, replacing the new crystal with the original part did not resolve the issue. Therefore, the crystal change alone does not appear to be the cause.

I have not performed the MCU swap test yet because the working board is conformally coated and has a display soldered to the bottom side of the PCB. Removing and replacing the MCU would involve a significant risk of damaging the display of the board.

I expect to receive another board from our EMS shortly, without the display fitted. I will perform the MCU swap test on this board as soon as it is available and report the results.

2. HSE oscillator behavior

I confirm that the HSE starts correctly on revision 2/3 (REV_ID = 0x201F), whereas it does not start on revision 4/5 (REV_ID = 0x203F).

On revision 4/5, we observe repeated pulses on OSC_OUT, approximately 700 ms apart, with no visible 8 MHz oscillation. NRST goes low at each pulse, indicating repeated MCU resets. VDD remains stable during these events.

The system bootloader version read at address 0x1FFF77DE is 3.3 on both revision groups.

Best regards,

[mƎALLEm]

Ok. Thank your for the details. At this stage I cannot help you further on that. I’m escalating the case internally over this ticket number CDM0066843 (not accessible by the community users).

Please bear in mind that it will may take a while to have a feedback/answer from the internal teams. I may also get back to you for more questions if needed.

Thank you for your understanding.