On STM32H747IGT6, HSEM channel 0 is reserved?

[cbcooper]

Application note AN5361 "Setting up with ST-LINK GDB server" says "Set the Cortex®-M7 core running so that the HSEM semaphore is released and Cortex®-M4 wakes up from Stop mode" and this post implies that it's "HSEM 0" which I'm assuming is HSEM channel 0.

Am I correct that HSEM channel 0 is not available for use by my application?  Is that fact documented in the Reference Manual (I can't find it anywhere)?

 

[cbcooper]

ping

[Amel NASRI]

Hi @cbcooper ,

I'm not sure that there is any restriction to use HSEM 0.

In this article How to implement inter-processor communication in an STM32H7 using HSEM, the provided example is based on the usage of HSEM 0. Try to follow the same steps and check if it is working or not for you.

-Amel

[cbcooper]

So what does Application note AN5361 mean when it says "The Cortex®‑M4 must execute the code and go to Stop mode before the Cortex®‑M7 can start executing the code and wake up the Cortex®‑M4 by releasing a hardware semaphore" and " Set the Cortex®-M7 core running so that the HSEM semaphore is released and Cortex®-M4 wakes up from Stop mode"?

[cbcooper]

ping

[TDK]

HSEM 0 is not reserved.

If you follow the example project, they choose to use HSEM 0 in such a way to signal that CM4 is ready. This isn't a requirement.

[cbcooper]

That is a correct statement regarding the project described in the article "How to implement inter-processor communication in an STM32H7 using HSEM" but my most recent question in this thread is trying to understand what is meant in Application note AN5361.

Thanks

[TDK]

The example project uses HSEM0 in that manner. The AN describes this.