How to configure RTC in STM32F429ZI? I have problem with starting RTC, starting WKUP timer.

[MKrau.3]

I try to start RTC in my STM32F429 (I do not use HAL libraries and I want not to use it). I use registers directly or with use of libopencm3.

I want to run RTC and Wakeup timer with LSI source now and the RTC_TR is always 0 and RTC_DR 00002101h (and doesn't increment.

What I do wrongly? Can you please help me? I try THIRD day run RTC without success :-(.

Here is initialization code:

static void enableRTC(void)
{
 rcc_periph_clock_enable(RCC_GPIOC);
 rcc_periph_clock_enable(RCC_GPIOA);
 
 // unlock
 RTC_WPR=0xCA;
 RTC_WPR=0x53;
 PWR_CR|=PWR_CR_DBP;
 
 // reset RTC settings
 RCC_BDCR|=RCC_BDCR_BDRST;
 RCC_BDCR&=~RCC_BDCR_BDRST;
 
 // enable RTC without LSE
 uint32_t tmp=RCC_BDCR;
 tmp|=RCC_BDCR_RTCEN;
 tmp&=~RCC_BDCR_LSEON;
 tmp&=~RCC_BDCR_LSEBYP;
 
 // enable RTC from LSI
 tmp&=~(RCC_BDCR_RTCSEL_MASK<<RCC_BDCR_RTCSEL_SHIFT);
 tmp|=RCC_BDCR_RTCSEL_LSI<<RCC_BDCR_RTCSEL_SHIFT;
 RCC_BDCR=tmp;
 debug=RCC_BDCR; // for display purpose 8200h in register
 
 //while(!(RCC_BDCR & RCC_BDCR_LSERDY)) continue; // only for LSE
 
 // set wakeup timer
 RTC_WPR=0xCA; // unlock
 RTC_WPR=0x53;
 RTC_CR=0x20;
 while(!(RTC_ISR & RTC_ISR_WUTWF)) continue;
 RTC_WPR=0xCA; // unlock
 RTC_WPR=0x53;
 RTC_WUTR=300;
 RTC_CR=RTC_CR_WUTE|RTC_CR_WUTIE|0x20; //set interrupt, set wakeup timer
 RTC_WPR=0;
 debug2=RTC_CR; // 4420h in the register
 debug3=RTC_WUTR; // 12Ch in the register
 
 // enable wakeup interrupt
 nvic_enable_irq(NVIC_RTC_WKUP_IRQ);
	nvic_set_priority(NVIC_RTC_WKUP_IRQ, 1);
 exti_enable_request(EXTI22);
 exti_set_trigger(EXTI22, EXTI_TRIGGER_RISING);
}

The RTC_ISR is STILL 7 (read in loop and displayed in main() function). The WUTF flag is present never. Why?

RTC_TR is also still 0. It doesn't inrement.

If you cannot find error in my code, can you please give minimal code (with use of registers) how to start RTC (RTC_TR increments, WAKEUP works)?

[TDK]

Consider using the CMSIS header file definitions to make your code more readable by others and to reduce chances of typos.

For example, RCC_BDCR_RTCSEL_MASK is not a standard definition so we don't know what you've defined it as.

https://github.com/search?q=RCC_BDCR_RTCSEL_MASK

Instead of this:

tmp&=~(RCC_BDCR_RTCSEL_MASK<<RCC_BDCR_RTCSEL_SHIFT);

you would do this:

tmp &= ~RCC_BDCR_RTCSEL;

> I try THIRD day run RTC without success

Consider also using HAL to get it working quickly, certainly in well under 3 days, and to compare its register settings against your own to find the problem.

[MKrau.3]

> For example, RCC_BDCR_RTCSEL_MASK is not a standard definition so we don't know what you've defined it as.

> debug=RCC_BDCR; // for display purpose 8200h in register

The value is 8200h (I wrote it).

Bits: 15:1 and 9:1, 8:0.

RTCSEL[9..8]=2 (LSI),

RTCEN[15] = 1 (RTC Enabled).

The problem is not here. After proposed change also doesn't work. It looks like LSI disabled (damaged?). Is it possible?

RCC_BDCR_RTCSEL_MASK = 3, RCC_BDCR_RTCSEL_SHIFT=8.

Are there all needed steps? Other registers are in default state. Any additional power register to enable RTC or LSI?

I run touch panel (F429I-DISCOVERY) without problem [but... fsck the erroneous documentation of STMPE811 - i2c address 41h not 82h, 52h command to read XYZ not 57h, many of wrong default values in command description <facepalm>], but I have problem with very very less complexity functionality... RTC.

Are these values correct (and complete) for RTC to start to work with LSI:

RCC_BDCR=8200h (with previous reset if previously enabled)

RTC_CR=4420h

RTC_WUTR=12Ch

enabled PWR_CR_DBP

unlocked RTC_WPR?

BTW. I do not use STMCubeMX (and HAL library) due to license problem. I can accept only licenses compatible with LGPL. Use of registers directly or via libopencm3 is compatible with LGPL.

[waclawek.jan]

Does LSI run? What's the content of RCC_CSR?

JW

[MKrau.3]

@Community member​ RCC-CSR: 1e000000h.

Thank you very much for your help. I modified the code by setting LSION and the RTC looks to work correctly. WUTF flag is present (when ISR routine is without clearing it) and ISR is called corectly.

static void enableRTC(void)
{ 
 // enable LSI clock
 RCC_CSR|=RCC_CSR_LSION;
 while(!(RCC_CSR & RCC_CSR_LSIRDY)) continue;
 
 (...) // previous sequence without changes
}

+

[Piranha]

Take a note that RCC are on AHB1 bus, but PWR and RTC are on APB1 bus. That can be a real problem because of different bus speeds and intermediate buffers. Read this topic for the same problem and solution for Ethernet RMII mode configuration:

https://community.st.com/s/question/0D50X0000BABrWMSQ1/stm32f767-no-ethernet-when-apb2clkdivider-rcchclkdiv8-or-greater

PWR_CR|=PWR_CR_DBP;
 
// reset RTC settings
RCC_BDCR|=RCC_BDCR_BDRST;

This code can fail because RCC_BDCR can be read and even written back before the PWR_CR write is complete.

RCC_BDCR=tmp;
debug=RCC_BDCR; // for display purpose 8200h in register
 
//while(!(RCC_BDCR & RCC_BDCR_LSERDY)) continue; // only for LSE
 
// set wakeup timer
RTC_WPR=0xCA; // unlock

Theoretically the same problem could happen if the lines 2 and 4 are removed here, but practically it won't happen because AHB bus for RCC is faster than APB bus for RTC.

[waclawek.jan]

Indeed; this even made it to the 'F405/7 erratum.

JW