DMA MemoryToMemory using Timer for delivery rate?

[skeezix]

Posted on January 27, 2014 at 23:27

Given an F4 (F405 and F429) or even F2 ..

Is it possible for a DMA to be both MemoryToMemory and have the rate of delivery be set by a timer?

ie: I'm effecting a copy from an array in RAM, to a GPIO. (a byte at a time, say, otherwise I could use SPI tricks.)

With MemoryToPeripheral I think you can do it, but is M2M full speed only?

Or is it possible to refer to a GPIO as a peripheral somehow?

Thank you my friends,

jeff

#stm32f4-dma

[Tesla DeLorean]

Posted on January 27, 2014 at 23:42

Yes, you should be able to pick a DMA2 Stream/Channel from the matrix that is triggered by a TIMx_CHx or TIMx_UP

[skeezix]

Posted on January 28, 2014 at 05:15

Ah, I see what you mean in the tables. Was not aware of the _UP meaning rising edge of that timer. Slick.

Any examples?

Looking in the Standard Peripherals I'm not sure if I see anything that shows off using a timer to control the DMA. (I'm looking for clues like TIM_DIER_UDE that suggests the timer is feeding DMA. TIM_DMA sounded promising but doesn't do what I'm looking for..)

(In case I was not clear ... I need to spit out DMA bytes to GPIO at a very regular (and very fast) interval. If they're not regular, such as in a for-loop with caching mucking up the timing etc, it mucks everything up.)

I'm banging away at it this evening, but please let me know your thoughts.

Thank you as ever!

jeff

[waclawek.jan]

Posted on January 28, 2014 at 09:18

> Was not aware of the _UP meaning rising edge of that timer. Slick.

It means UPdate event. What constitutes and update event is dealt with in details in the timer chapter of reference manual.

> Any examples?

I am not aware of any. There is AN4187 containing an example of timer-triggered-not-timer-targeted transfer, but it's for the 'F1xx line, so not really applicable here.

JW

[waclawek.jan]

Posted on January 28, 2014 at 12:48

OK, I got curious: http://www.efton.sk/STM32/bt.c

Appears to work as expected. I use a tweaked stm32f4xx.h (http://www.efton.sk/STM32/stm32f4xx.h.zip) with added bitfield constants as appropriate.

JW

[waclawek.jan]

Posted on January 28, 2014 at 13:02

> I need to spit out DMA bytes to GPIO at a very regular (and very fast) interval.

> If they're not regular, such as in a for-loop with caching mucking up the timing etc, it mucks everything up.

Oh, and note, that DMA is no magic and has its sources of latencies too. You *might* be better off with a for-loop, if you know what are you doing.

JW

[skeezix]

Posted on January 28, 2014 at 15:56

Wow, nice of you to jump in and write up a test app! :)

I'm thrown off here:

(DMA_SxCR_DIR_M2P

and

// Note, that we won't use the memory-to-memory mode here, as that would simply run not waiting for the triggers

Does this mean that in M2M DMA mode, it just runs flat ourt fast as it can, not waiting for the Timer UPdate to do the speed rate control?

Or by 'triggers' do you mean something else?

Looks sensible enough, but I worry over that one point. I thnik I'll get the timer going independantly of the DMA, blink a LED or something so I can measure it on the scope, and then tie it into the DMA (alreadyworking, but without the rate throttle), see if I can get it to work; but so far, seems the DMA just runs willy nilly fast :o

Aside: I need to start dong everything purely at the register level; mixing register code, with StdPeriph library style code, with libopencm3, its all a nightmare :)

jeff

[waclawek.jan]

Posted on January 28, 2014 at 19:16

This was something I wanted to try already.

> I'm thrown off here:

> (DMA_SxCR_DIR_M2P

> and

> // Note, that we won't use the memory-to-memory mode here, as that would simply run not waiting for the triggers

>

> Does this mean that in M2M DMA mode, it just runs flat ourt fast as it can, not waiting for the Timer UPdate to do the speed rate control?

That's what the fine manual says. I did not try but have little doubt in this.

JW

[skeezix]

Posted on January 28, 2014 at 19:27

oh? I thought I might have seen something in there but haven't found it lately. I'll go diving again .. I'd like a definitive word on it, to know if I'm wasting my time trying to get it to work ;)

Any idea if a GPIO can somehow be treated like a peripheral, so can do M2P instead of M2M on it?

[skeezix]

Posted on January 28, 2014 at 19:53

Of interest:

''Each stream also supports software trigger for memory-to-memory transfers (only

available for the DMA2 controller)''

--> I'm unclear on 'trigger' term if it means what I think it does.. but this suggests memory to memory rate control as I'd need

[skeezix]

Posted on January 28, 2014 at 20:44

Theres some macros that aren't fond in the .h file referenced; you're also just using src and dst memory buffers, with one as a peripheral. Doesn't seem to work for me when I do that.

How odd :)

I think I need to reduce to a very specific test case and try similar..