Can VREF+ be zero?
In STM32F437 data sheet it says VDDA - VREF+ < 1.2 V.
Is that a "global" limitation or just a working limitation?
If VDDA is 3.3V and VREF+ is 0V, can that harm the chip, or is it just that the conversions don't work right?
In STM32F437 data sheet it says VDDA - VREF+ < 1.2 V.
Is that a "global" limitation or just a working limitation?
If VDDA is 3.3V and VREF+ is 0V, can that harm the chip, or is it just that the conversions don't work right?
OK. Our client got the answer from STM in another way.
"I confirm VREF+ could be grounded when ADC and DAC are not active but you need to make sure that the VREF is stabilized before to start the ADC conversion. About VDDA should be connected as soon you have VDDa pin on the MCU because it is the power supply for all the analogue parts of the MCU - Reset blocks, RCs and PLL. "
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