STM32N6 Nucleo XIP clock frequency problem.

[GoranDragovic]

Hello everyone,

I’m using Nucleo STM32N6 for a project of mine, and I used template XIP to begin with.
In template XIP, clock frequency of the XSPI2 is set to 50Mhz without any prescalers, and VDDIO3 is set to 1 (1.8V). That setup works fine for XIP up to 85Mhz clock frequency, but above that at BOOT (00) it fails as soon as it tries to jump to a application. 
I haven’t been able to resolve this problem. Is it setup, or something with EXT_MEM middleware?

In MX25 datasheet it can be seen that frequency heavily depends on dummy cycles, and 86Mhz corresponds to 8 dummy cycles, but on 200Mhz it requires 20. In EXT_MEM setup there is a 8D8D8D case where i go into during setup and it sets object to 20 dummy cycles, but I’m not sure is it successful in actually forcing that setup. 

Any help would be welcome.

 

[KDJEM.1]

Hello ​@GoranDragovic ;

 

Could you please check if HSLV_VDDIO3 is set to 1.

Please look at this article How to program the OTP fuse bits in the STM32N6 | Community to know how to check HSLV_VDDIO3 value.

 

Than k you.

Kaouthar

 

[GoranDragovic]

Yes, it is set. 

I have two STM32N6 Nucleo boards, on one I set HSLV_VDDIO3 to 1, and on second I set both HSLV_VDDIO2 to 1 also, and they both experience similar problems.

Picture of OTP124 for the board I’m currently using.