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This is a question related to SPI communication.What is NSSP mode? What does it do?Also is there any documentation that explains all parameters in detail other than this

I'm trying to use 2 timers (TIM1, TIM8) in sync.Everything works OK when using same value for both timers' ARR.But drift occurs when using two different values as ARR (i.g. 3999 for TIM1 & 19999 for TIM8).What could be causing this drift? tim.c/* TIM1 init function */ void MX_TIM1_Init(void) { /* USER CODE BEGIN TIM1_Init 0 */ /* USER CODE END TIM1_Init 0 */ LL_TIM_InitTypeDef TIM_InitStruct = {0}; LL_TIM_OC_InitTypeDef TIM_OC_InitStruct = {0}; LL_TIM_BDTR_InitTypeDef TIM_BDTRInitStruct = {0}; /* Peripheral clock enable */ LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_TIM1); /* TIM1 interrupt Init */ NVIC_SetPriority(TIM1_UP_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0)); NVIC_EnableIRQ(TIM1_UP_IRQn); /* USER CODE BEGIN TIM1_Init 1 */ /* USER CODE END TIM1_Init 1 */ TIM_InitStruct.Prescaler = 0; TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; TIM_InitStruct.Autoreload = 3999; TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1; TIM_

When I try and enable UART5 in the  .n657_dk2.ioc file,  the development system seems to go into an infinite loop with the mouse cursor spinning endlessly.Bug1: To replicate,1- open the n657_dk2.ioc file2- goto the connectivity section3- enable UART5 in FSBL4- change mode to Asynchronous5- set Hardware Flow control to RTS/CTS.system hangs....Bug 2: if you try and save the file, it corrupts the file and you cannot edit the .ioc file anymore..ioc file attachedIMPORTANT!!! I need a fast work around so I can go to layout this week.... 

Honey, I purchased an STM32MP257-DK development board. I inserted a 16GB SD card, powered it with a 5V power supply, and connected the USB interface to the computer's USB port. After powering on, the COM indicator flashes red and yellow, and it cannot function properly. What could be the reason? My power supply current is sufficient.

We are currently developing two LoRaWAN-based products using STM32WL55J (battery powered and Mains AC). Both devices are designed to sample sensor data every 30 seconds and transmit it according to a defined daily duty cycle.However, we are facing challenges in maintaining accurate timing synchronization: The internal RTC is already being utilized by the Sub-GHz radio stack, limiting our flexibility. Using the Timer Utility for periodic alarms leads to cumulative delays over time - for example, if the first alarm triggers at 12:00:30, subsequent triggers drift gradually and no longer align with real local time (e.g., 12:01:00, 12:01:30, etc.). We are looking for general design guidelines for STM32-based LoRaWAN devices that require long-term periodic data acquisition synchronized with real time. Specifically:Is it common or recommended to use an external RTC (e.g., via I²C/SPI) in such designs? Are there firmware design patterns or best practices for maintaining rea

 picture tells all. the resolver says these two functions have conflicting IP settings but the settings themselves apparently not.

I'm trying to start a timer when input GPIO becomes high (on its rising edge), at the same time i want to pull another GPIO to low. This is time critical.I'm using an external adc which will output a ready signal, at that time i want to pull CS pin to low and wait for a delay (tREAD), at the end of timer , want to pull the CS back high. Which is the best way to do, as i need the least latency.I'm using Nucleo H723ZG

HelloI'm using a NUCLEO-N657X0-Q board and trying to bring up ethernet in RMII mode using STM32CubeIDE. :small_blue_diamond: Issue Description:When I run the application in the non-secure project, the Ethernet DMA bit (in ETH_DMASR) does not clear after transmission.The same configuration works correctly when running in Secure mode.:small_blue_diamond: Clarifications Requested:In which context should Ethernet initialization (MX_ETH_Init()) be performed — FSBL, Secure, or Non-secure?Should the ETH clocks and DMA be configured in the Secure project, with only application-level operations done in non-secure?Any guidance or official examples on the proper initialization flow and DMA handling for Ethernet on STM32N6 would be greatly appreciated.I have attached my CubeMX .ioc file (for both Secure and Non-secure projects) and a snippet of my memory configuration for reference and analysis.Is there an example project or reference demonstrating Ethernet initialization (LAN8742,

Dear Sir,Our project using LSM6DSO IMU to detect the position, the sensor temperature is very high after power on and Initialization, it's over 80 degree, I think it's abnormal, I attach the sch, can you give some suggestions, thanks a lot.

Would you please share with us some sample performance test results of LSM6DSV family, like Allan Variance graphics, VRE, misalignment, etc?

I want to read the FIFO of IIS2ICLX, but I found that INT1 only triggers once when the power is first turned on. This is my initialization code. Is there anything wrong with this initialization?I triggered the interrupt through the rising edge. Once the interrupt occurred, an event would be sent. I measured the level of the interrupt pin, and it remained constant.iis2iclx_xl_full_scale_set(&dev_ctx, IIS2ICLX_500mg); /* Configure filtering chain(No aux interface) * Accelerometer - LPF1 + LPF2 path */ iis2iclx_xl_hp_path_on_out_set(&dev_ctx, IIS2ICLX_LP_ODR_DIV_10); iis2iclx_xl_filter_lp2_set(&dev_ctx, PROPERTY_ENABLE); iis2iclx_fifo_xl_batch_set(&dev_ctx, IIS2ICLX_XL_BATCHED_AT_104Hz); iis2iclx_xl_data_rate_set(&dev_ctx, IIS2ICLX_XL_ODR_104Hz); s_sample_rate = 104.0f; iis2iclx_fifo_watermark_set(&dev_ctx, 112); iis2iclx_fifo_mode_set(&dev_ctx, IIS2ICLX_FIFO_MODE); iis2iclx_pin_int1_route_t int1_route; int1_route.int1_ctrl.int1_fifo_th = 1; int1_route.int1_ct

I am creating a program to write data arbitrarily to the M95M04. The M95M04 has 512-byte pages, but does writing have to be done in page units?For example, when writing 8 bytes of data starting from address 8, is it acceptable to specify address 8H and write 4 bytes? Or do I need to read 512 bytes from address 0, modify the 4 bytes of data starting from address 8, and then write back all 512 bytes? thank you 

Hello everyone,I'm working with a NUCLEO-N657X0-Q board and trying to read audio data from an INMP441 I2S microphone using SAI2 in Master Receive mode with DMA. I have configured everything in STM32CubeIDE, but the DMA transfer complete interrupts are never firing.Here is a summary of my setup and the troubleshooting steps I've taken.Hardware Setup:Board: NUCLEO-N657X0-QMicrophone: INMP441Connections:PE12 -> SCK (SAI2_SCK_B)PE13 -> WS (SAI2_FS_B)PE11 -> SD (SAI2_SD_B)Mic L/R pin is connected to GND.Mic is powered by the board's 3.3V supply.STM32CubeIDE Configuration (.ioc):Project Type: FSBL only (no Appli).SAI2_B Configuration:Mode: Master ReceiverProtocol: I2S Philips StandardData Size: 24 BitsNumber of Slots: 2Audio Frequency: Set to 16 KHz.DMA Configuration:SAI2_B is linked to HPDMA1_Channel0.Mode is set to Circular.NVIC Configuration:HPDMA1_Channel0 global interrupt is enabled.Clock Configuration:SAI2 Kernel Clock is configured to ~2.048 MHz (derived from PLL2). It is not

Hi,I’m currently working on the STM32G491 series MCU. Our requirement is to support OTA firmware upgrades. In case the flashing process fails, the system should automatically revert to the previous firmware.Does the STM32G491 support this feature by default, or do I need to implement a custom bootloader to handle the fallback mechanism?

I need to obtain old version  GNU TOOLS fot STM   7-2018-q2.  Where can i find it? without instaling old version of CUBEIDE?

We have a custom board using STM32H750IB and a single QSPI flash memory MT25TL01G. The QSPI pin for the flash memory is the same as STM32H750B-DK board, which is PF10 for CLK, PG6 for CS, PD11/PF9/PF6/PF7 for IO0-3. I saw several posts mentioned the external flash loader for this configuration; can anybody share the source code or the flash loader file? Thanks for the help.   

Hello Everyone, Am looking for a little help on what I hope is a simple issue.  A quick summary is when I use freeRTOS + STM32Cube and set a breakpoint in one of the default task lines it never triggers.  Breakpoints enabled before the scheduler is started work ok. Can anyone point me in a direction to remedy this?  Will provide more details below. BTW, I'm new to the community and this is my first time posting.  Happy to hear any suggestions from any of you that will improve my posts. Details purchased a STM32F769I-DISCO eval board. I have a simple project that blinks the DISCO board LEDS originally it was done without the RTOS enabled.  Breakpoints and all worked great added the FreeRTOS and moved the blinking code over to use OS related stuff in the default task.  the program ran ok.  however, when a breakpoint is set it never pauses the app i configured the RTOS proxy and that all appears to be working fine if I manually pause the app. i also fou

Hi,I am evaluating sths34pf80 but unfortuantely I am not able to make it work. I am referiing to the code in the github https://github.com/STMicroelectronics/STMems_Standard_C_drivers/tree/master/sths34pf80_STdCThe below code is from example sths34pf80_tmos_presence_detection.  /* Wait sensor boot time */ platform_delay(BOOT_TIME); /* Check device ID */ sths34pf80_device_id_get(&dev_ctx, &whoami); if (whoami != STHS34PF80_ID) while (1); /* Set averages (AVG_TAMB = 8, AVG_TMOS = 32) */ sths34pf80_avg_tobject_num_set(&dev_ctx, STHS34PF80_AVG_TMOS_32); sths34pf80_avg_tambient_num_set(&dev_ctx, STHS34PF80_AVG_T_8); /* read filters */ sths34pf80_lpf_m_bandwidth_get(&dev_ctx, &lpf_m); sths34pf80_lpf_p_bandwidth_get(&dev_ctx, &lpf_p); sths34pf80_lpf_p_m_bandwidth_get(&dev_ctx, &lpf_p_m); sths34pf80_lpf_a_t_bandwidth_get(&dev_ctx, &lpf_a_t); snprintf((char *)tx_buffer, sizeof(tx_buffer), "lpf_m: %02d, lpf_p:

Hello,I am using the LSM6DSV in a very simple configuration.  I am finding that it does not power down properly after I have powered it up.  In normal operation I power it up by writing a value of 0x01 to address 0x10 (turns on accelerometor at 1.875Hz) and writing a value of 0x02 to address 0x11 (turns on gyroscope at 7.5Hz).  Then after taking some readings I power it down by writing a value of 0x0 to address 0x10 and a value of 0x0 to address 0x11. After I power it down I find that it still draws ~650uA of current.Other than reading the conversion results at address 0x22-0x2D, the writes to addresses 0x10 and 0x11 are the only ones I do.I have run a couple of experiments:1. I omitted the writes to 0x10 and 0x11 when powering up and find that the power draw stays at or below a few uA.  This demonstrates to me that the power draw is coming from a mode the LSM6DSV is in rather than my MCU or other circuitry.2. I explicitly wrote power down/disable values to the othe

I have GPDMA working on STM32U5 with a circular buffer.  However, when I add a GPDMA "trigger" to the setup, the DMA no longer works. GPDMA1_C2TR2.TRIGPOL=2 GPDMA1_C2TR2.TRIGSEL=11 GPDMA1_C2TR2.TRIGM=3 LPTIM1 setup to clock away at a 50% duty cycle. What I would expect to see is the DMA transfer working slower than normal based on the ARR period of LPTIM1.  But, the above combination of values along with a few variations just results in stopping the DMA. What would be helpful is some example application running on a nucleo board which makes use of a GPDMA driven device where both a DMA request and a DMA trigger are being used.  (Documentation seems to be lacking.  They do describe what the triggers are and from what I can tell how they should work, but because it is not working some vital clue is missing or hidden.)  

When the TouchGFX Graphics Application is selected, the supplementary TouchGFX code is generated; however, the TouchGFX library itself is not included in the project. I tried all available code generators, but none of them added the library.

Hi,I noticed there is no Stm32H7 Ethernet PTP example available anywhere. The ST support for PTP is very poor. I wanted to make an example and get it out for review to bring more visibility to the issues with PTP and see if I could solve some issues which are bugging this implementation. Link: https://github.com/chris1seto/Stm32H723NucleoPtpExample ST, could you please comment on the issues covered in this example? For any others, if you have solutions to any of these problems, could you fork/PR to add fixes or just post here so I can include fixes? Issues are detailed in the readme, but I copy and pasted them below:"Tail pointer issueWith the stock HAL code which is supposed to correctly implement Eth RX tailpointer calculation, reception doesn't work with timestamping enabled.In this project's Eth hal driver, I simply write the tail pointer to 0. It's not clear how the tailpointer is supposed to work and the documentation doesn't clearly explain it.The Stm32CubeH7

Hi everyone,I am using the X-NUCLEO-GNSS1A1 (Teseo-LIV3F) with a NUCLEO-H753ZI board.The UART2 interrupt is working correctly, verified by "[GNSS_RX] UART RX Callback triggered",but the GNSS module does not send any "$GPGGA" or NMEA sentences.Only binary-like data such as "E" or 0x00 are received.The FSM remains in fsm_discard state and never detects the "$" character.Hardware setup:NUCLEO-H753ZIX-NUCLEO-GNSS1A1 (Teseo-LIV3F)STM32CubeIDE 1.19.0, X-CUBE-GNSS1 middlewareUART2 via Zio connector Jumpers: Closed: J3, J13, J5, J9, J12, J11, J14, J15; Open: J2, J4, J6, J7, J8, J10GNSS board green LED is ON (steady)Software behavior:Initialization appears successful:[BSP_INIT] MX_USART2_UART_Init SUCCESS[TESEO_INIT] Initialization completed successfully[GNSS_CB] UART callbacks registration doneUART2 interrupt log:USART2 IRQ triggered[GNSS_RX] UART RX Callback triggered[FSM] discard: 0x00 (.E I would appreciate any guidance on this issue.I also attached my set-up and Project File.&nbs

Hi,we have an STM32H735G-DK eval board with product identification DK32H735G$AT3 but can not find the differences to older DK32H735G$AT2andDK32H735G$AT1product versions in the user manual:https://www.st.com/resource/en/user_manual/um2679-discovery-kit-with-stm32h735ig-mcu-stmicroelectronics.pdf Can you tell us the differences between DK32H735G$AT3 and the older versions? Thank youRK_IOT

As EMIF06-MSD02N16 Is approaching EOL by 2029, Can you please provide alternate part for EMIF06-MSD02N16. We are planning to design SD card interface and were considering this part for our new design. if you have any alternate part equivalent to EMIF06-MSD02N16, kindly suggest the alternate part with EOL status.