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Hi everyone, I am working with the STM32-NUCLEO-WL55JC2 board and I want to transmit ADC values over LoRa radio. Since this is a dual-core MCU (Cortex-M4 + Cortex-M0+), I would like to clarify the recommended implementation approach. My goal is: Read analog data using ADC Send the ADC values via LoRa communication Possibly use the dual-core architecture efficiently My questions are: Is it recommended to run the ADC acquisition on the M4 core and the LoRa/Sub-GHz radio stack on the M0+ core? What is the best method for sharing ADC data between the two cores (IPCC, shared RAM, mailbox, etc.)? Are there any reference examples in STM32CubeWL that demonstrate a similar workflow (sensor data → radio transmission). Are there configuration considerations in STM32CubeMX/IDE when enabling ADC together with the radio stack? Any guidance, documentation references, or best practices would be greatly appreciated. Thank you!

Hello,I have an STM32G441 and using DMA to transmit some SPI data. All works so far. The problem is the chipselect. I am using the software chipselect. So before I start the DMA I pull CS low. Then when the DMA complete interrupt fires I pull it high again. The problem is, it cuts off about 3 or 4 bytes. This is obvious because the DMA is done while there is still SPI data in the buffer. What is the go-to solution for this? How can I reliably get an interrupt when the DMA is done and the SPI is done transmitting all data? At the moment I simply start a timer when the DMA is done that triggers a second interrupt after a certain time that I measure with a logic analyzer. Seems a bit makeshift and has to be adjusted each time the baudrate is changed. I also noticed that all the SPI interrupts fire premature. So is it the only solution to waste a timer on the SPI?

Hi,How to set UID using CubeMX and read in STM32L476 and use it for device commissioning process?

I have built a custom board by using STM32MP257F and I want to boot on USART6. I have not succeed to boot on USART6 when I compile my own fsbla by change the device tree of TF-A.I got a suggestion from ST Dev team to run this ROM tracedump wiki-stm32mp-addons/MP2RomTracesDump at 6.1.0 · STMicroelectronics/wiki-stm32mp-addons · GitHub and it gave me a positive output on USART6. The soldering was OK. The BootROM was OK and the UART6 was alive. This is the output from my USART6.=================================================== == STM32MP25 cut2.x bootrom display traces V1.01 == == Date of compilation : Jun 26 2024 - 11:25:23 == =================================================== Executed on Cortex A35 - Aarch64 Successfully booted on interface SD instance 1 Reset reason : POR reset Chip state : CLOSED_UNLOCKED ================================================================== Bootrom traces ================================================================== [INFO] -

I am currently using an STM32L011F4U6 to communicate with some other chips and it is failing to pull either I2C line down to GND fully when signalling, they are seemingly clamped to approximately 1.2V at a minimum as shown below making it impossible to communicate with my I2C devices which need the I2C lines to drop below 0.5 V to register a low state. Is this something anyone else has dealt with?I2C waveforms with 10k pullups at Normal Mode speedsI am using PA9 for SCL, PA10 for SDA, using the I2C1 peripheral.In the photograph above I am using 10 kOhm resistors for pullups and the speed is Normal Mode. I am targeting Fast Mode speeds and use 2 kOhm resistors in the original circuit but I changed both to see if they had any effect - which they did not. The issue is the same in fast mode with the stronger pullups.I have probed the circuit with a ammeter to verify the required sink current is within the expected range. With the 2 kOhm resistors the current sank to pull down to 0 V w

I am trying to build the OpenSTDroid kernel, I first acquired the "STM32MPU Distribution Package for Android", Then as mentioned in https://wiki.st.com/stm32mpu/wiki/How_to_build_kernel_for_Android, I loaded the kernel & Then tried to build the dtb binaries using:build_kernel dtbAnd got the following error:$ build_kernel dtb[1/1]: Generate dtb binariesERROR: Not possible to generate the kernel imageAfter commenting out the &>${redirect_out} part where make is generating the dtb files, I get the following output:$ build_kernel dtb[1/1]: Generate dtb binariesmake[1]: *** No rule to make target 'dtbs'. Stop.make: *** [Makefile:256: __sub-make] Error 2ERROR: Not possible to generate the kernel image

Split from IDE Version 2.0.0 - why remove MX ? as this has nothing to do with that topicPinout view is bad also.In center of window useless hole with ST logo. Wastefull use of GUI area. 80% of area is gray hole in center or white hole at the borders.Much better to use table with pins info. In the table can be shown some usefull information in addition to pin name (type of pin, for example). Current design can be used as additional presentation.CubeMX design is created by managers wich have no undestanding of developer needs. 

Hello,I am currently reviewing a hardware design based on the STM32H563ZIT6 and have some questions regarding the internal and external behavior of the NRST pin.My main question is how the NRST pin operates specifically during an NVIC_SystemReset.Currently, we are using an external pull-up resistor (connected to 3.3V) on the NRST pin.According to the Datasheet (DS) and Reference Manual (RM), I confirmed that the NRST pin has an internal weak pull-up (RPU), which is typically 40 kΩ.Although the Datasheet and Reference manual do not explicitly disclose the internal circuit diagram of the NRST pin used during NVIC_SystemReset, I found information in the community stating that NRST internally has an "Open-drain" structure.link : https://community.st.com/t5/stm32-mcus/why-my-stm32-doesn-t-start/ta-p/49367 Therefore, I assume the circuit topology is as follows:Rpu: STM32 internal weak pull-up (typically 40 kΩ)Rnrst: The external pull-up resistor we attached (currently 10 kΩ)Vnrst:

Modern microcontrollers have a lot of perifhery. Several buses of different types.STM32 hardware has outgrown C. Too much complex perifhery to manage with procedural language.ST software is much behind of ST hardware. Look at any I2C or SPI open source C library. Any can be used with one device of some type only.In case of I2C there are lines like this in header:#define SSD1306_I2C_PORT hi2c1 #define SSD1306_I2C_ADDR (0x3C << 1)andextern I2C_HandleTypeDef SSD1306_I2C_PORT;in C file.If somebody need one device on differnt port or on different device address he have to edit source files of library.If somebody need more devices of the same type on different device addresses and/or on different ports, he have to throw away library and write own solution.It is not possible to get library and make something like this:i2c_device1 = create_i2c_device(port1, dev_adr1, params1...); i2c_device2 = create_i2c_device(port1, dev_adr2, params2...); i2c_device3 = create_i2c_device(port2,

Hi.I created code and flash memory that is already 80% used. Is that okay? Will it affect performance?Thank you:)

Is there a board schematic for STM32L432KC somewhere?I want to acces pin PA13. But I can find no connector or easy acces point.Thanks

In STM32Cube_FW_H7RS_V1.3.0, file Projects/STM32H7S78-DK/Applications/ROT/STiROT_iLoader/STM32CubeIDE/prebuild.bat:As currently written, it fails in a couple of places. Here are the changes necessary for it to run:(The system won't let me upload the edited batch file.) 

Hi everyone,I’m working on an STM32CubeIDE project generated with CubeMX and I’m trying to integrate mbedTLS to run a TLS stack.Setup details:MCU: STM32U375Secure Element: STSAFE-A120IDE: STM32CubeIDE (v2.0.0)CubeMX (v6.16.1) used for project generationTarget IoT platform - AWS IoT CoreAfter generating the project with CubeMX, I see the following components:Middlewares/ST/STM32_CryptographicMiddlewares/ST/STSElibX-CUBE-STSE01/Target folder at the project rootHowever, I can’t find any option in CubeMX → Middleware to enable or add mbedTLS. From what I can tell, CubeMX doesn’t expose mbedTLS as a selectable middleware for this MCU / configuration.I’ve seen suggestions (including from Google AI) that mbedTLS needs to be added manually, for example by:Adding the mbedTLS source to Middlewares/Third_Party/mbedtlsUpdating include paths and compiler symbolsConfiguring mbedtls_config.hPotentially hooking mbedTLS crypto callbacks to the STM32 cryptographic drivers or STSAFE servicesMy questions:

I am attempting to make a previously developed design run with Trustzone enabled. I have been unable to get the HSPI1 PSRAM to function.I've set the peripheral's GTZC's attributes to NSEC|NPRIV.I've set the appropriate GPIO pins' attributes to NSEC.I've set the MPCWM Config to consider the memory as NSEC|NPRIVI've set the appropriate/associated DMA channels as NSEC|NPRIV.None of these seem to have any effect. The Initialization code hangs/timesout in:BSP_HSPI_RAM_Config16BitsOctalRAM in stm32u5a9j_discovery_hspi.c.RCC->AHB2ENR2 shows the HSPI clock enabled.Can anyone point to a minimal working example of using the AP512 on the STM32u5A9J-DK with trustzone enabled?

I am working on a BLDC motor 6-step (trapezoidal) control using a NUCLEO-G474RE controller board and NUCLEO-IHM07M1 (L6230) power board with a 48V supply.Below is my phase activation for one commutation step: __HAL_TIM_SET_COMPARE(&htim1, TIM_CHANNEL_1, curr_duty);__HAL_TIM_SET_COMPARE(&htim1, TIM_CHANNEL_2, 0);__HAL_TIM_SET_COMPARE(&htim1, TIM_CHANNEL_3, 0);HAL_GPIO_WritePin(GPIOC, GPIO_PIN_10, SET); // UL EnableHAL_GPIO_WritePin(GPIOC, GPIO_PIN_11, SET); // VL EnableHAL_GPIO_WritePin(GPIOC, GPIO_PIN_12, RESET); // WL DisableProblemThe L6230 gate driver IC overheats quickly, even though I am running only an open-loop 6-step sequence.My ParametersSwitching frequency: 9 kHz (tested from 8 kHz up to 50 kHz)PWM duty cycle: ramping from 10% → 40%Step duration: ramping down from 60 ms → 20 msWhat I Have TriedChanging commutation step duration (15 ms → 60 ms)Slower and faster duty-cycle rampChanging PWM switching frequencyVerified PWM compare values and GPIO logic for each s

I have used HSEM on STM32H7 very well.Recently，I test the HSEM of STM32MP257 in development mode， by JTAG/SWD，I can lock the semaphore by reading the HSEM_RLRx register via CPU1~3, but after power reset，when I write the HSEM_RLRx register to lock or unlock semaphore, it doesn't work!the security /privilege / CID filtering of HSEM are all off after reset, and the cpu3 could  access the HSEM_RLRx register correctly，but after cpu1/2  write the HSEM_RLRx register or HSEM_CnIER，both lock and unlock operations have no effect.pls give me some suggestions to check what I might have done wrong .thanks!

Heyho,I had some really strange error, which went away when turning optimization from "fast" to "off".The function EthPhyInit() always returned 166 = 0xA6 - it should return "HAL_StatusTypeDef", something between 0 .. 3.So I changed all the return values to some integer between 1..8 to find out where things go wrong, then added the last line:uart_printf("EthPhyInit() good ->return 0\n\r");before returning 0 when all went well.Still, always got 166 back, even when I got "EthPhyInit() good ->return 0\n\r" on the terminal.Until I turned optimization OFF, now all is good.WTF is happening there? Can optimization be that bad? /* +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ */ /** * @brief all PHY, ETH MAC & DMA reset and init: * 1) EthBaseInit() GPIO, clocks, basic stuff * 2) EthPhyInit() PHY * 3) EthMacInit() MAC registers * 4) EthDmaInit() DMA registers * @PAram - * @retval HAL status */ uint8_t EthAllInit(ui

May I ask how the FDCAN Message RAM offset allocation,  Tx and Rx BufferElementSize can be configured on G4 Series. As in cubeMX it doesnt give me the option to like the H7 series. Or is that done automatically by the core when generating the code?If so, could I know if it is possible to change it? 

Hello I tried to design a 3-output AC-DC converter using the eDesignSuite. But the software only provides the turns ratio for the transformer and no core suggestions or what so ever was shown.I don't get the idea behind the eDesignSuite software that it cannot provide these VERY important details?What is the point of not telling the transformer or the number of turns?Why is the transformer always a BLACK BOX that no one will tell you about?The design we are targeting is very simple and has no magic, a three-output SMPS.Any help?Sam 

I am using STM32G491RE - NUCLEO. connected to the ADM3055e CAN Transceiver Currently I am trying to send 12 Bytes of Data from IXXAT Terminal over to FDCAN1 which receives the message fine and then Output the Message on FDCAN2 though a buffer. So My logic is when a message pass the filter it gets called by the Fifo0Callback and push it to a buffer below. This works fine the buffer also get the full 12Bytes of data same FD format and everything checked out.But when I try to add the message to HAL_FDCAN_AddMessageToTxFifoQ(&hfdcan2, &TxHeader2, TxData2). Where TxData is the dequeued message from the buffer and copys the 12Bytes. The message somehow gets truncated to 8Bytes on output. Heck, when I add "if (HAL_FDCAN_GetTxFifoFreeLevel(&hfdcan2) > 0)", It somehow says it is full even when starting the code.I have been suspecting because I cant set the HAL_FDCAN_ConfigTxBufferElementSize and HAL_FDCAN_ConfigRxBufferElementSize or even the messageRam offset

Hello, I have a Sensor Tile Box Pro and I have a question about the accelerometer. Why, if it is still, does it show movement on the axes depending on the position of the Box Pro with an offset of 1000?

Hi,I have a strange problem on an STM32L051C8 with the comparators enabled in window mode.If I put the system in stop about 20 seconds after powering the microcontroller, the current draw is about 250 uA. If I then exit the stop mode with a soft reset and put the system back to stop after 20 seconds (without removing the power), the current draw is 0.42 uA.The comparator is initialized in ultra_low_power mode with interrupt enabled to exit the stop mode.What can I look at?Thanks

Hello ST Community,I am facing a complete breakdown of my development environment with my STM32F407G-DISC1 board. I am dealing with three critical issues: a persistent debugging failure, the sudden disappearance of CubeMX from my PC, and an inability to download any installers from st.com to fix it.Here is the detailed situation:1. The Debugging/Flashing Issue I am powering the board via USB only and have been careful not to cause any power conflicts. However, I suddenly cannot flash or debug any code.* Error: "Error finishing flash operation" (using ST-LINK GDB Server).* Behavior: The ST-Link is detected, but the write operation fails immediately.* Steps Taken:* I tried changing the Reset Behaviour to "Connect Under Reset".* I tried holding the hardware Reset (Black) button manually while connecting.* I updated the ST-Link Firmware on the board (Update was successful).* I attempted a "Full Chip Erase" with STM32CubeProgrammer, but it also fails to communicate properly with the ta

i am quite new for stm32n6, i am working with STM32N6570-DK with Arduino IMX335 . i just wanna make a simple snaphort using the project SnapshotDecimationMode (used with mb1854)as my reference. i can configured the camera via I2C and start the pipe. but the frame event did not interrupt. i think the causes of issue arepower sequence: arducam has only power en pins unlike mb1854 which has reset and power enable pins.i configured something wrong about interrupt.anyone can teach me the true way to config the camera with dcmipp interrupt?

Hi all,during testing a custom project with NETXDUO on NUCLEO-H563ZI I've noticed that sometimes web server response is rather slow.Wireshark shows rather frequent TCP retransmissions and other problems.To be sure, I've tried an example from ST (Nx_Iperf) with the same result.It seems that problem is in ETH_Prepare_Tx_Descriptors(), in check of Tx Descriptor: /* Current Tx Descriptor Owned by DMA: cannot be used by the application */ if ((READ_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCWBF_OWN) == ETH_DMATXNDESCWBF_OWN) || (dmatxdesclist->PacketAddress[descidx] != NULL)) { return HAL_ETH_ERROR_BUSY; }I removed this check and TCP retransmissions became much less frequent.Is there a better solution?