Clock source for ADC of The STM32H7 CPU
In former CubeMX versions an Clock to ADC of 400MHz was possible
Now I am working on CubeMX V 6.3.0 with STM32Cube FW_H7 V1.9.0.
The maximum Clock frequency I can adjust is now 79MHz (selected clock source is the PLL2)

What is the meaning of the "79 to ADC (MHz)" exactly.
If, it is the input for the prescaler of the ADC, why it is limited to 79MHz
Wenn > 79 MHz is selected, CubeMX shows an error.
If it is the maximum Clock frequency of the ADC, why is it not limited to 50Mhz as discribed in the datasheet for the V design
V-design is also selected

