Miscellaneous bit field arrangement in STM32G4
Hi Community,
I have a bitfield arrangement for one of the driver files which is a 32-bit value. While debugging I was not able to figure out how it is being stored in the register. The bit order and endianness are not always guaranteed in structs and bit fields but I want to have a fair knowledge on how it is being stored.
Bit field arrangement
typedef union
{
uint32_t value;
struct
{
uint8_t data_1 : 4;
uint8_t data_2 : 3;
uint8_t data_3 : 4;
uint8_t data_4 : 2;
uint8_t data_5 : 1;
uint8_t data_6 : 1;
uint8_t data_7 : 2;
const uint8_t data_8 : 3;
} field;
} reg_t;
If I assign a value to fields of data like below the expected 32-bit value data.field.value is 0x88372.
reg_t data = {.field.data_8 = 4};
data.field.data_1 = 2;
data.field.data_2 = 7;
data.field.data_3 = 6;
data.field.data_7 = 1;
But I am getting 0x110672 why?
