Any advantages of Segger J-Link debuggers with STM32CubeIDE?

Question

I have been developing boards with STM32G07x and STM32G07x G47x using ST-Link V2. I thought I would buy a better debug probe allowing more breakpoints and as a future investment in my development activities.

I am considering Segger J-Link Base, Plus or Ultra+ but it isn't clear to me whether STM32CubeIDE will use many of the features of these probes.

Examples

If I set up the IDE for J-Link debugger, the SWD clock frequency appears to be limited to 12MHz, so the 50MHz ability of the Ultra+ would be wasted.
I think that STM32CubeIDE can't use the Micro Trace Buffer?

So I am wondering if anyone has any experience of using these Segger debugger probes and have found that they can use the advantages within STM32CubeIDE, or whether I would only gain any advantage of a more expensive Segger debugger by changing IDEs.

Tesla DeLorean · Answer

Critical paths on the CM0(+) cores do seem to limit the upper clocking rate. The ST-LINK/V3 clocks CM7 SWD at 15 MHz, up to 24 MHz supported/offered.

The cores have a finite number of breakpoints, hacks using Flash can be problematic and slow. If you really need a lot of breakpoints just use software ones rather than hardware, or use a breakpoint() subroutine, and step into code.

My personal view is that breakpoints so damage dynamic flow behaviours it is hard to see real benefit. If you need to single-step your own code in a dozen places you need to sharpen your static analysis. Real time telemetry and diagnostic output is much better at tracking dynamic flow and interaction/interplay within threads of operation.

Trace in the Cortex-M case is reconstructive in nature, primary use cases being profiling, and a small niche of how-the-heck-did-it-get-here problems.

ST has free Keil licenses for CM0(+) parts, debug/trace options there should be a lot richer

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