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QSPIO NOR flash connected to STM32MP153CA bank1 does not work in U-Boot. sf probe 0 fails to initialize spi flash with error -22

LCast.2
Associate II

I cannot get the QSPI NOR-Flash to work on my custom board using an STM32MP153CA + Adesto AT25SF128 NOR flash in U-BOOT. I'm working with 5-10-dunfell-mp1-21-11-17 files included on the 3.1.0 ecosystem.

The schematic section is shown below:

0693W00000QMZ9BQAX.pngIs not that different from the STM32157-ev1 implementation.

I activated MPU's internal pull-ups for IO[0..3] lines by configuring the pins as follows on the dts files:

	quadspi_pins_mx: quadspi_mx-0 {
		pins1 {
			pinmux = <STM32_PINMUX('B', 6, AF10)>; /* QUADSPI_BK1_NCS */
			bias-disable;
			drive-push-pull;
			slew-rate = <1>;
		};
		pins2 {
			pinmux = <STM32_PINMUX('F', 10, AF9)>; /* QUADSPI_CLK */
			bias-disable;
			drive-push-pull;
			slew-rate = <2>;
		};
		pins3 {
			pinmux = <STM32_PINMUX('F', 6, AF9)>, /* QUADSPI_BK1_IO3 */
				      <STM32_PINMUX('F', 7, AF9)>, /* QUADSPI_BK1_IO2 */
				      <STM32_PINMUX('F', 8, AF10)>, /* QUADSPI_BK1_IO0 */
				      <STM32_PINMUX('F', 9, AF10)>; /* QUADSPI_BK1_IO1 */
			bias-pull-up;
			drive-push-pull;
			slew-rate = <2>;
		};
    };

I added on my tf-a and u-boot DTS files the following node:

&qspi{
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&quadspi_pins_mx>;
	pinctrl-1 = <&quadspi_sleep_pins_mx>; //this line only in u-boot dts
	reg = <0x58003000 0x1000>, <0x70000000 0x10000000>;
 
	#address-cells = <1>;
	#size-cells = <0>;
	status = "okay";
 
	flash0: AT25SF128@0 {     
           compatible = "jedec,spi-nor";                                  
           reg = <0>;
           spi-rx-bus-width = <4>;
           spi-tx-bus-width = <4>;
           spi-max-frequency = <108000000>;
           #address-cells = <1>;
           #size-cells = <1>;
       };
};

I added the following entry on uboot/drivers/mtd/spi-nor-ids.c:

/* Adesto Technology  */
{ INFO("AT25SF128", 0x1f8901, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },

I made sure the clock was provided to the QSPI by adding the line :

CLK_QSPI_ACLK

on st,pkcs (part of rcc node).

When I tried to probe the memory IC by running the u-boot command "sf probe 0", I got the following result (log & debug data activates):

   - 0 0 'spi@58003000'
   - found
spi_find_chip_select: plat=ddf05310, cs=0
SPI bus:0, CS:0, Speed:40000000, Mode:3, drv name:jedec_spi_nor, dev name:spi_flash@0:0
0 0
   - 0 0 'spi@58003000'
   - found
spi_find_chip_select: plat=ddf05310, cs=0
spi_find_chip_select ret=0
0 -1
0 0
   - -1 -1 'AT25SF128@0'
   - not found
0 0
   - 0 0 'pin-controller@50002000'
   - found
clk_set_defaults(AT25SF128@0)
clk_set_default_parents: could not read assigned-clock-parents for ddf052b8
ofnode_read_prop: assigned-clock-rates: <not found>
stm32_qspi_set_speed: regs=58003000, speed=25000000
stm32_qspi_set_mode: regs=58003000, mode=9216 rx: quad, tx: quad
stm32_qspi_exec_op: cmd:0x9f mode:1.0.0.1 addr:0x0 len:0x6
stm32_qspi_exec_op: cmd:0x6 mode:1.0.0.1 addr:0x0 len:0x0
stm32_qspi_exec_op: cmd:0x1 mode:1.0.0.1 addr:0x0 len:0x1
stm32_qspi_exec_op: cmd:0x5 mode:1.0.0.1 addr:0x0 len:0x1
stm32_qspi_exec_op: cmd:0x35 mode:1.0.0.1 addr:0x0 len:0x1
stm32_qspi_exec_op: cmd:0x5 mode:1.0.0.1 addr:0x0 len:0x1
stm32_qspi_exec_op: cmd:0x6 mode:1.0.0.1 addr:0x0 len:0x0
stm32_qspi_exec_op: cmd:0x1 mode:1.0.0.1 addr:0x0 len:0x2
stm32_qspi_exec_op: cmd:0x5 mode:1.0.0.1 addr:0x0 len:0x1
stm32_qspi_exec_op: cmd:0x35 mode:1.0.0.1 addr:0x0 len:0x1
spi_get_bus_and_cs: Error path, created=0, device 'AT25SF128@0'
Failed to initialize SPI flash at 0:0 (error -22)
Command failed, result=1

I connected the scope to the QSPI lines and got the following replies:

0x9f -> 0x1f 89 01 1f 89 01 (not sure why 6 Bytes and not 3?)

0x01 00-> 0xff

0x05-> 0x00

0x35-> 0x00

0x05-> 0x00

0x01 00 02-> 0xff ff

0x05-> 0x02

0x35-> 0x00

When checking the output from sf probe command, I noticed the SPI speed is set to 25MHz. On the QSPI node max frequency was set to 108MHz and on the defconfig to 40MHz (CONFIG_SF_DEFAULT_SPEED=40000000), so I don't know why then the clock speed was set to 25MHz.

Any idea why it's not working?

To include my NOR flash device Adesto AT25SF128A I just added the quoted line on uboot/drivers/mtd/spi-nor-ids.c, was there something else I should have done?

1 ACCEPTED SOLUTION

Accepted Solutions
PatrickF
ST Employee

Hi @LCast.2​ 

This post might help you:

https://community.st.com/s/question/0D53W00001KROYbSAP

Regards.

In order to give better visibility on the answered topics, please click on 'Select as Best' on the reply which solved your issue or answered your question. See also 'Best Answers'

In order to give better visibility on the answered topics, please click on 'Accept as Solution' on the reply which solved your issue or answered your question.

View solution in original post

1 REPLY 1
PatrickF
ST Employee

Hi @LCast.2​ 

This post might help you:

https://community.st.com/s/question/0D53W00001KROYbSAP

Regards.

In order to give better visibility on the answered topics, please click on 'Select as Best' on the reply which solved your issue or answered your question. See also 'Best Answers'

In order to give better visibility on the answered topics, please click on 'Accept as Solution' on the reply which solved your issue or answered your question.