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MiladChalipa
MiladChalipa
Associate III
April 24, 2021
Solved

Best PCB design of FMC for STM32F746 and IS42S32400 SDRAM

  • April 24, 2021
  • 1 reply
  • 5608 views

Recently, I'm working on a 6-layer PCB design of STM32F746BGT6 and 128Mbit SDRAM with LTDC ( 4.3" LCD 800x480) and so far I connected the FMC bus traces with 12mil clearance (Reduce crosstalk) and 6mil width(50-ohm transmission line). My board Stack-up is 1-signal/power 2-ground 3-signal/power 4-ground 5-signal/power 6-ground and noted that FMC signals are in the 3rd and 5th layers.

I also do the length matching for all FMC traces to be 70mm but I'm wondering that maybe routing all the traces in such a small area could cause EMI or signal integrity problems?

any suggestions from PCB experts will be appreciated.

/Milad

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Best answer by Vangelis Fortounas

Hello

i wrote that no need to worry about the exact match of length .. So indirectly suggested you to give more weight to another rule "traces as sort as possible"

Except ST guides for pcbs this document here contains usefull info and at the end , practical guides. I hope to find it useful.

1 reply

Vangelis Fortounas
Vangelis Fortounas
Associate II
April 24, 2021

Hello

Signal propagation speed for FR4 microstrip is about 0.5*C or 1.5E08 m/s (C= speed of light )

This means a propagation delay of 66 picosecond per cm. (1cm/speed)

I wouldn't worry about the exact length matching , since Data-Address Setup and Hold times for this memory allow not so tight skew.

MiladChalipa
MiladChalipaAuthor
Associate III
April 24, 2021

@Vangelis Fortounas​ Thanks for your reply

So The Wiring is good in your opinion, I had a bad experience with this type of RAM before and decided to make everything as good as possible to prevent further failures. According to the formula, I will have roughly 500 ps propagation delay and it wouldn't be a problem I think.

Vangelis Fortounas
Vangelis FortounasBest answer
Associate II
April 24, 2021

Hello

i wrote that no need to worry about the exact match of length .. So indirectly suggested you to give more weight to another rule "traces as sort as possible"

Except ST guides for pcbs this document here contains usefull info and at the end , practical guides. I hope to find it useful.

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