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dimax
dimax
Associate III
February 5, 2013
Question

Understanding RCC register

  • February 5, 2013
  • 3 replies
  • 1741 views
Posted on February 05, 2013 at 15:05

I'm trying to understand how below function call  from usb_bsp.c source file works:

RCC_APB1PeriphResetCmd( RCC_APB1Periph_PWR, ENABLE );

This is from Reference Manual:

5.3.8 RCC APB1 peripheral reset register (RCC_APB1RSTR)

 

 Bit 28 PWRRST: Power interface reset 

 

 Set and cleared by software.

 

     0: does not reset the power interface

 

     1: resets the power interface

 

1. What is Power Interface? 

2. Why should it be reset?

3. ENABLE means that bit is written to 1. Does it mean that reset on Power Interface will stay asserted all the time until SW writes this bit to 0? 
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    3 replies

    Tesla DeLorean
    Tesla DeLorean
    Guru
    February 5, 2013
    Posted on February 05, 2013 at 16:24

    The PWR section typically controls the backup domain in your unspecified part, the unit that is powered independently by VBAT.

    You might want to reset it to get it into an KNOWN state, as it operates in a different domain than the rest of the chip, and doesn't watch NRST is the same way. If it isn't operating correctly or as expected, you might want to reset it.

    A reset is achieved by enabling, and then disabling

      RCC_APB1PeriphResetCmd(RCC_APB1Periph_PWR, ENABLE);

      RCC_APB1PeriphResetCmd(RCC_APB1Periph_PWR, DISABLE);

    You could perhaps hold it in reset, but I'm not sure that serves a useful purpose. It would make using the peripheral difficult, like not enabling the clock would.

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    dimax
    dimaxAuthor
    Associate III
    February 6, 2013
    Posted on February 06, 2013 at 09:29

    Fully understand and agree with you.

    I searched over manual and found a few mentions of this clock. Also I looked at the SPL clock reset functions and have seen usage of the Reset register. The below code is taken from USB example:

    STM32_USB-Host-Device_Lib_V2.1.0/Project/USB_Device_Examples/HID/src/usb_bsp.c

    Line 246:

      /* enable the PWR clock */

      RCC_APB1PeriphResetCmd(RCC_APB1Periph_PWR, ENABLE);

    There is no DISABLE anywhere. I assume it is a bug but not critical as example does not use VBAT.

     

    Tesla DeLorean
    Tesla DeLorean
    Guru
    February 6, 2013
    Posted on February 06, 2013 at 12:18

    As per the comment they are trying to Enable the Clock, not Reset the peripheral, the wrong function is being used.

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