STM32L100C6 Port H missing in Datasheet memory map

Posted on February 28, 2014 at 11:56

Hi

You have specified part STM32L100C6

According to the data sheet, this part only has 37 GPIO pins

That is Port A(16bits) + Port B(16bits) + Port C(5bits)

The other parts STM32L100R8/B have 51 GPIO pins

That means Port A(16bits) + PortB(16bits) + portC(16bits) + portd(3bits)

Why do you think there should be a port H?

Or are you not talking about GPIO - what is port H in that case?

Posted on February 28, 2014 at 12:29

Hi,

Pin 5 and 6 on UFQFPN48 Device are PH0-OCS_IN, PH1-OSC_OUT. I see they are no IO, only I and O. I thought I would still need to initialize these Pins for lowest power consumption?

Thanks!

Posted on February 28, 2014 at 12:38

Hi

I think the PH0-OSC means it is the clock source input/output for a 'physical layer'.

This usually means it is either for the Network/ethernet peripheral or he USB peripheral.

As you have realised - you do not need to configure these pins.

Posted on February 28, 2014 at 13:26

Well, it seems to me that it needs to be initialized for low power consumption.

There seems to be something floating when I do not initialize port H.

My board needs around 18.8 µA with gpioh initialized as input with pulldown.

When I do not initialize gpioh it needs around 70-75 µA depending on environmental capacities.

So I think I do need to initialize a gpio at adress 0x40021400 (which is defined as GPIOH in STM32L peripheral library) but not mentioned in the datasheet.

Just for example: when I try to initialize gpio G which is also not listed in the datasheet it gives me a hard fault. That is just as I would expect because there is no gpio at 0x40021C00 in the datasheet. But different behavoir for gpio H...not listed in the datasheed, no hard fault when writing to and ~50µA current increase when not written.

Does anyone understand my concern?

Posted on February 28, 2014 at 13:49

Hi

''So I think I do need to initialize a gpio at adress 0x40021400 (which is defined as GPIOH in STM32L peripheral library) but not mentioned in the datasheet.

Just for example: when I try to initialize gpio G which is also not listed in the datasheet it gives me a hard fault.''

I have not studied it (so I could be wrong) but what I think is happening is that when you try to access GPIOH, the address banding is actually access something else.

Accessing GPIOG must be accessing an area which is invalid (address banding or otherwise).

(Address banding is where the process just wraps around if the address is beyond the valid range)

''My board needs around 18.8 µA with gpioh initialized as input with pulldown.

When I do not initialize gpioh it needs around 70-75 µA depending on environmental capacities.''

Sorry, I missed what you were trying to do originally : To achieve low power.

Firstly, what is this external osc clocking - is it USB?

Are you using USB in your design?

(I am not sure what happens if the USB is not used and no osc is supplied - check the data sheet and reference manual ).

For USB, the USB peripheral can be put into some (2 I think) low power modes. Again - check the data sheet and reference manual.

Posted on February 28, 2014 at 13:50

I guess that it is missing from documentation.

I successfully used GPIOH address for a STM32L150 based project.

Considering a linear address map, GPIOH (in STM32L150) is at the same address that would have been a pseudo-GPIOF. (There is no GPIOF in STM32L150): 0x40021400

If I were you I will try the address of the first non existent GPIO of STM32L100, which is pseudo-GPIOE at 0x40021000 (considering 0x400 per port). Or you may try at the address corresponding to GPIOH if there were all ports until H: 0x40021C00.

I know it is a naive guess, but it does hurt to make the test.

Posted on February 28, 2014 at 14:01

Hi,

The external osc is not clocking anything and I do not use USB. There is no external osc connected and I just want prevent these pins to be floating (especially osc-in).

When I write GPIOH Pin0 and Pin1 as Input with pulldown my current consumption decreases.

Here from page 34 of the datasheet:

The PH0 and PH1 I/Os are only configured as OSC_IN/OSC_OUT when the HSE oscillator is on ( by setting the HSEON

bit in the RCC_CR register). The HSE oscillator pins OSC_IN/OSC_OUT can be used as general-purpose PH0/PH1 I/Os, respectively, when the HSE oscillator is off (after reset, the HSE oscillator is off ). The HSE has priority over the GPIO function

Simply said - when using the HSE there is no need for initialization of GPIOH as the alternate will be selected automatically. But when not using the HSE they are normal IOs -

but the Port H is not mentioned in the memory map

.

Posted on February 28, 2014 at 14:17

This is the information from the memory map in the datasheet:

0x40020000: port A

0x40020400: port B

0x40020800: port C

0x40020C00: port D

0x40021400: reserved

This is how it seems to be on chip (as my tests showed me):

0x40020000: port A

0x40020400: port B

0x40020800: port C

0x40020C00: port D

0x4002

1000: port E

0x4002

1400: port H

0x4002

1800

: reserved

Especially initializing port H (pin0 and 1) seems to be important to reduce current consumption when not used as oscillator.

Posted on February 28, 2014 at 15:07

Hi

OK, try the reference manual :

http://www.st.com/web/en/resource/technical/document/reference_manual/CD00240193.pdf

Looks like you are right, the datasheet omits the fact that you can have OSC_IN/OUT as PH0 and PH1

Looking more closely at the pin map for UFQFPN48, it looks like I was wrong about the

use of port C.

It only shows PortA and PortB

It looks like the 5 bits are part of the PH0 and PH1