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STM32H747 ADC ENOB Process Variation

slc2015
Associate II

Hi,

Is there any information available regarding the process variation of the ADC12 ENOB in the STM32H747 operated as a differential ADC? With a custom PCB we are seeing a standard deviation of 2.73 bits, which is quite substantial. 

On the worst offending prototype unit, we have an ENOB of just 10.5 bits. With this device, even if we short together the inputs and connect to 1/2 VREF (buffered from the internal device VREF output buffer with 1.1 uF decoupling capacitance), the ENOB does not improve above ~12 bits, 1.7 bits below the typical ENOB indicated on the datasheet. 

Although the top-end performance of the ADCs is very strong, the amount of device-to-device variation we're seeing is creating some hesitation among our staff to bring this board to production as currently designed. 

Thanks!

3 REPLIES 3
FBL
ST Employee

Hello @slc2015 

You can find in Getting started with the STM32H7 Series MCU 16-bit ADC - Application note

With 16-bit resolution, distortion and noise are measured on H747 board. These values can indeed vary and the variation can be influenced by several factors.

To give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.

AScha.3
Principal III

Hi,

from ds :

AScha3_0-1707212934118.png

13,2 bits typical (!) --- so your values are good, according to what you can expect.

btw

which H747 ...case ?  because also :

AScha3_1-1707213123223.png

 

If you feel a post has answered your question, please click "Accept as Solution".

For the AN5354, measurements were taken on a board populated with an STM32H747 in a TFBGA240 package.

To give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.