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DJ1
DJ1
Associate III
September 29, 2023
Question

PWM DMA settings

  • September 29, 2023
  • 5 replies
  • 2180 views

Hi there, i am using STM32F401RE development board and using PWM generation using DMA. I am following register level programming approach and here the issue lies in the DMA settings. Like if I set my PSIZE and MSIZE to 32-bit long and also if my data_buffer is "uint32_t" then and then only the proper wave generation is happening. If I change either the DMA setting to a half-word or a byte OR even if I change the buffer data type to "utin16_t or uint8_t", it is corrupting my entire waveform. Any specific reason for this?

Note: I am using PLL 72MHz as core frequency. Does it have any effect on it. I am using DMA_1 Stream 5, Timer 2, Channel 1.

Also how much impact does the xSIZE selection (PSIZE and MSIZE selection) have on the code?

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5 replies

LCE
LCE
Principal II
September 29, 2023

Isn't Timer 2 a 32 bit timer? Then why would you use anything but 32 bit values?

DJ1
DJ1Author
Associate III
September 29, 2023

Okay that i got it but the thing is what if i use byte as the MSIZE and PSIZE, it should work right?

TDK
TDK
September 29, 2023

> Okay that i got it but the thing is what if i use byte as the MSIZE and PSIZE, it should work right?

Probably not, unless all the values you are writing are meant to be 8 bits. Why would it work?

> Also how much impact does the xSIZE selection (PSIZE and MSIZE selection) have on the code?

It fundamentally changes the operation. Perhaps focus on what the value should be and choose the correct size appropriately.

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FBL
ST Technical Moderator
September 29, 2023

Hello @DJ1 

The data width of the number of data items to transfer is configured in the DMA_SxNDTR register which is equal to the width of the peripheral bus (configured by the PSIZE bits in the DMA_SxCR register). 

Check the reference manual section 9.3.10 Programmable data width, packing/unpacking, endianess

To give better visibility on the answered topics, please click on "Best answer" on the reply which solved your issue or answered your question.Best regards,FBL
waclawek.jan
waclawek.jan
Super User
September 29, 2023

waclawekjan_0-1695998780561.png

As @FBL  said above, this implies that PSIZE *must* be set to 32-bit.

If you don't use DMA FIFO (i.e. use "direct mode"), then MSIZE is ignored and the memory-size width is forced to be identical to PSIZE. If you use FIFO, the data packing feature won't help you to reduce memory buffer size anyway, there are always 4 bytes picked at memory side for one word write on peripheral side.(The latter is in contrast with the single-port DMAs in the lower-end STM32s, where in case of MSIZE<PSIZE the rest is zero-extended).

JW

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