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kadam
Associate II
January 19, 2024
Solved

Octal SPI Interface

Hello Team,

We are considering STM32H562ZIT3QTR MCU for our design. There will be two Microcontroller in our design.

MCU consists of one Octal SPI Interface. Can other Microcontroller be interface with STM32H562ZIT3QTR through Octal SPI or we can only interface flash memory?

Regards,

Kadam

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KDJEM.1
KDJEM.1Best answer
ST Technical Moderator
January 19, 2024

Hello @kadam ,

For communication, the OCTOSPI can only be used as master only, it cannot be a master and slave like SPI. Please take a look to RM0481 Section 23 Octo-SPI interface (OCTOSPI).

Note that, the  OCTOSPI interface supports the XSPI (JEDEC251ES) standard compliant feature. If the device (not only memory)  supports this standard, so, you can interface this device with OctoSPI. But, it is necessary to check the compatibility of the command between the OCTOSPI interface such as command order  (Instruction phase, Address phase, Alternate-byte phase, Dummy-cycle phase, Data phase) and the bytes number for each command.

For MCU to MCU communication, I advise you to use SPI interface.

Thank you.

Kaouthar

To give better visibility on the answered topics, please click on "Best answer" on the reply which solved your issue or answered your question.
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3 replies

KDJEM.1
KDJEM.1Best answer
ST Technical Moderator
January 19, 2024

Hello @kadam ,

For communication, the OCTOSPI can only be used as master only, it cannot be a master and slave like SPI. Please take a look to RM0481 Section 23 Octo-SPI interface (OCTOSPI).

Note that, the  OCTOSPI interface supports the XSPI (JEDEC251ES) standard compliant feature. If the device (not only memory)  supports this standard, so, you can interface this device with OctoSPI. But, it is necessary to check the compatibility of the command between the OCTOSPI interface such as command order  (Instruction phase, Address phase, Alternate-byte phase, Dummy-cycle phase, Data phase) and the bytes number for each command.

For MCU to MCU communication, I advise you to use SPI interface.

Thank you.

Kaouthar

To give better visibility on the answered topics, please click on "Best answer" on the reply which solved your issue or answered your question.
    Tesla DeLorean
    Tesla DeLorean
    Guru
    January 19, 2024

    Or use a CPLD or FPGA to act as an interposed or mailbox type device between the two cores.

    Perhaps FMC and FIFO memory device(s) or Dual Port RAM?

    Tips, Buy me a coffee, or three.. PayPal Venmo (See Profile) Up vote any posts that you find helpful, it shows what's working..
    KDJEM.1
    KDJEM.1
    ST Technical Moderator
    January 29, 2024

    Hello @kadam ,

     

    Has your request been answered?

    If you need further clarification, please do not hesitate to share it :).

    Thank you.

    Kaouthar.

    To give better visibility on the answered topics, please click on "Best answer" on the reply which solved your issue or answered your question.
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