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charlesherrera
Associate II
January 14, 2009
Question

Hardware Breakpoints in external FLASH

  • January 14, 2009
  • 17 replies
  • 3672 views
Posted on January 15, 2009 at 00:00

Hardware Breakpoints in external FLASH

    This topic has been closed for replies.

    17 replies

    joseph239955
    Visitor II
    May 17, 2011
    Posted on May 17, 2011 at 12:56

    Hi Charles,

    The hardware breakpoint unit can set breakpoint in the address range 0x0 to 0x1FFFFFFF only. For higher address, the ''Watchpoint on PC match'' feature in DWT can be used instead. However, watchpoint is slight different then breakpoint in the sense that the halting of processor might happen after the instruction is executed (imprecise).

    I don't know if the tool you are using support this feature or not.

    Which tool chain are you using?

    regards,

    Joseph

    charlesherrera
    Associate II
    May 17, 2011
    Posted on May 17, 2011 at 12:56

    Hello,

    I was able to write code to run out of the external FLASH on the STM3210E-EVAL board. The problem is that I have been unable to set a hardware breakpoint to debug code in external flash. The error that I get is:

    Tue Dec 02 13:19:36 2008: Failed to set breakpoint at 0x64000242 (This area does not support hardware breakpoints)

    Tue Dec 02 13:19:36 2008: Failed to set breakpoint: Driver error.

    I have spoken to the manufacturer of the tool chain and they have suggested that it may be a bug in the STM32 part and said that all of the tool chains fail in the same fashion. I have looked at the errata and found nothing mentioning this. Has anyone been successful at setting a breakpoint in external flash memory?

    Thanks,

    Charles

    16-32micros
    Associate III
    May 17, 2011
    Posted on May 17, 2011 at 12:57

    Hi,

    This mechanism is ensured thanks to ''Flash Patch and Breakpoint'' (FPB) unit to implement breakpoints and code patches & ''Data Watchpoint and Trace'' (DWT) unit to implement watchpoints, trigger resources, and system profiling.

    However , I believe that is feasible only while patching Code space to the ''SRAM memory region'' which starts from 0x2000_0000 to 0x3FFF_FFFF.

    Hi Charles,

    Could you please provide the name of your tool manufacturer, so I can investigate with our partner regarding this statement : ''may be a bug in the STM32 part and said that all of the tool chains fail in the same fashion'' ? which seems strange :(

    Cheers,

    STOne-32.

    jilisegiar
    Associate III
    May 17, 2011
    Posted on May 17, 2011 at 12:57

    Hi Josepf,

    can you please let us know the reference of this info:

    The hardware breakpoint unit can set breakpoint in the address range 0x0 to 0x1FFFFFFF only

    Rgds

    charlesherrera
    Associate II
    May 17, 2011
    Posted on May 17, 2011 at 12:57

    Hello All,

    Thanks for the replies, I am using the IAR tool chain along with a J-Link jtag device. With the info from your replies, I attempted to use some kind of watchpoint feature with this tool chain but have been unsuccessful.

    It does not appear to have anything related to watchpoints in the breakpoint menus, it has a J-Link Watchpoint menu, but it appears greyed out, also there is nothing in the watch menu that will stop execution. I will report any progress.

    Regards,

    Charles Herrera

    joseph239955
    Visitor II
    May 17, 2011
    Posted on May 17, 2011 at 12:57

    Hi Jilisegiar,

    If you look at Cortex-M3 Technical Reference Manual (TRM) on ARM web site, under FPB section (in System Debug), you can find the FPB registers details. The address comparison is done be comparing the address value to FPB Comparator Registers, which has compare address values of bit 28 to 2. Since the upper 3 bits are not address (bit 31 to bit 29), you cannot compare an address outside the CODE memory region.

    regards,

    Joseph

    jj_it
    Associate II
    May 17, 2011
    Posted on May 17, 2011 at 12:57

    @Charles-

    suggestion - as STOne-32 & Joseph Yiu indicate that you may ''not'' be able to debug in external flash I offer this...

    Temporarily move your code to ''normal'' on-chip flash & debug from there. After you've verified operation - on
    charlesherrera
    Associate II
    May 17, 2011
    Posted on May 17, 2011 at 12:57

    Hi JJ,

    Thanks for the suggestion. The code running in external flash will be significantly larger than the internal Flash space. I would like to be able to debug the system with the code located in the memory it will normally run out of, keeping the same memory fetch, read, and write timings.

    Regards,

    Charles

    charlesherrera
    Associate II
    May 17, 2011
    Posted on May 17, 2011 at 12:57

    Hello joseph, STOne, jj, jilisegiar, and all,

    Below is a summary of what I have learned about STM32 Hardware Breakpoints and the ability to use debuggers on code in external flash. Thank you all for your help and suggestions.

    Hardware breakpoints can only be used on internal memory on the STM32. A hardware breakpoint will not work on any external Memory. This is not a bug in the STM32 and the Tool Chains are not failing, it is simply that hardware breakpoints are not supported for external memory by the STM32. The hardware breakpoint unit can only set breakpoints in the address range of 0 to 0x1FFFFFFF.

    For addresses 0x20000000 and higher the ''Watchpoint on PC match'' feature in the DWT could be used instead. Unfortunately I have been unable to find any evidence that any of the debuggers available support this feature. In the cortex documentation it is mentioned that PC match is not recommended for watchpoints because it stops after the instruction. Even with this drawback this type of ''breakpoint'' would be very helpful and though not as good as a hardware breakpoint it would be much better than nothing.

    Since I will have code running from external flash which will be larger than the internal Flash space I will be forced to do extra work just to debug the unit. I will have to either come up with special hardware with external ram to use software breakpoints for debugging, or go through a process of moving the code that needs debugging into internal flash as needed to debug. Any of these options requires extra work and changes to the system from its normal state.

    Regards,

    Charles Herrera

    joseph239955
    Visitor II
    May 17, 2011
    Posted on May 17, 2011 at 12:57

    Hi Charles,

    I don't know. I emailed a friend in KEIL and will forward the answer if I got a reply. (There will be some delay due to holiday.)

    regards,

    Joseph