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SMula
SMula
Associate II
July 20, 2021
Question

ECC implementation for SDRAM in STM32H7

  • July 20, 2021
  • 7 replies
  • 3005 views

Hi team,

We are working on project where external SDRAM is interfaced with STM32H7 microcontroller through FMC and its working fine.

Now I need to implement ECC for the SDRAM, Can anyone help me out and the process flow to do that and any inbuilt register to be configured for doing ECC or we have to configure additionally?

Microcontroller : STM32H743BIT6

External SDRAM : AS4C4M32SA

Thank you

Shivakumar

This topic has been closed for replies.

7 replies

Bowman32
Bowman32
ST Employee
July 22, 2021

Hi @SMula​ 

Today, there is no hardware support for ECC on SDRAM. It should be managed by software.

Bouraoui

SMula
SMulaAuthor
Associate II
July 22, 2021

Hi @Bouraoui Chemli​ ,

Thank you for your response.

Can you share your thoughts or any reference documents to implement ECC for external SDRAM. It would be very much helpful as I am new to this concept.

Please guide me to implement ECC.

Thank you

Shivakumar

Tesla DeLorean
Tesla DeLorean
Guru
July 22, 2021

Perhaps look at documentation and app notes from Intel, Xilinx and other vendors actively using ECC on their external memories. FPGA related IP in this area might be the most readily accessible and documented. In PC memory subsystems the DIMMs are typically 36-bit wide for 32-bit data.

ECC is a complex topic, seek professional training or contractors with expertise if your team or management lack those skills in-house.

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SMula
SMulaAuthor
Associate II
July 26, 2021

Team,

To implement ECC for SDRAM do we need to have any other IC which does ECC operation or it is available in STM32H7 or it should be available in AS4C4M32SA SDRAM IC which we are currently using.

Please provide your inputs so that I get clarity.

Thank you

Shivakumar S M

SMula
SMulaAuthor
Associate II
July 26, 2021

Team,

The SDRAM IC we are using does not have any ECC registers to correct, but still can we implement the ECC for it. I don't have much idea about it so if anyone knows the answer please post it here.

Thank you

Shivakumar S M

Tesla DeLorean
Tesla DeLorean
Guru
July 26, 2021

This stuff would typically taught in computer architecture/engineering classes.

Perhaps review topics around parity, hamming-codes, reed-solomon, and related error-correcting codes.

The methods used, and now included, in NAND Flash memories tend to deal with much larger blocks of data.

SDRAM implementations tend to be much more fine-grained as the random-access is done with much smaller units of data.

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