2024-09-02 03:42 PM
Hello, I've encountered a surprising behavior lately that seems like a bug, and there's no errata for it as far as I can tell.
I'm writing a USB host library for the STM32H743 rev V. Bits PENA and PENCHNG of register OTG_HPRT represent Port enable and Port enable/disable change. Port enable is supposed to be a status bit - can't be set, can be reset which disables the port, or is reset when the port is disabled because of a disconnect.
PENCHNG is supposed to be change detection bit about PENA, gets set to 1 whenever PENA change, optionally triggers an interrupt via a chain of interrupt-aggregating register. PENCHNG is supposed to be reset when it causes an interrupt. This reset is supposed to be accomplished by writing 1 to this bit, as per the datasheet. PENA is also described as rc_w1 (clearable by writing 1) but that's probably a mistake.
Except, writing 1 to PENCHNG doesn't clear PENCHNG, it clears PENA, and disables the port. Writing 1 to PENCHNG a second time (when PENA is 0) sets PENCHNG to 0 as expected. This makes it impossible to clear the bit so that it triggers an interrupt when the port is disconnected, without disconnecting the port yourself. This sounds like such a major bug on a major line that I can't imagine it going unnoticed, so it may be something on my end, but I don't quite see how ? Here's the code below and the log result (reproducible every time):
A USB reset starts between log1 and log2. It ends between log2 and log3. Log3 reports the port is now enabled. PENCHNG is set between log3 and log4. PENCHNG is still 1, PENA is 0 (the port is now disabled). PENCHNG is set again between log4 and log5. PENCHNG is now 0.
For the record, here's the relevant excerpts from the reference:
Also, HPRT isn't built into CubeMX, as far as I can tell, this is how I defined USB2_OTG_FS__HPRT:
__IO uint32_t& USB2_OTG_FS__HPRT = (__IO uint32_t&)*(((uint8_t*)USB2_OTG_FS_PERIPH_BASE)+0x440);
Please let me know how to investigate/troubleshoot further or take note of this bug.
Regards, JB