AN2606 Rev 70 pin description bugs

unterberg_rtb · ‎2026-03-16

Hi,

When reviewing the descrption of MCU pins used by the integrated system bootloader, I came across several documentation bugs in the latest AN2606 (rev70). Inparticular, Table 164 lists:

USART1_TX pin - PA9 pin: USART1 in transmission mode. Used in input no pull mode: Input mode for an output pin? Same issue with USART2 and USART3.

SPI1_MOSI pin - PA7 pin: slave data input line, used in push-pull, pulldown mode: Input pin does not have push-pull mode.

SPI1_NSS pin - PA4 pin: slave chip select pin used in push-pull, pulldown mode: NSS ist used as an input, so it does not have push-pull mode.

Same issues with SPI2 descrpition.

The same problems are in Table 166. I have not checked the tables for the other CPUs, but I suggest a review of the document might reveal more issues.

Regards

Norbert Unterberg

mƎALLEm · ‎2026-03-16

Hello,

For SPI this is a regular configuration even with input the push pull mode is set.

For USART1/2 I do agree but for USART3 it's correct:

I will escalate internally for double check. Internal ticket number for follow-up CDM0060571.

To give better visibility on the answered topics, please click on "Accept as Solution" on the reply which solved your issue or answered your question.

View solution in original post

mƎALLEm · ‎2026-03-16

Hello,

For SPI this is a regular configuration even with input the push pull mode is set.

For USART1/2 I do agree but for USART3 it's correct:

I will escalate internally for double check. Internal ticket number for follow-up CDM0060571.

To give better visibility on the answered topics, please click on "Accept as Solution" on the reply which solved your issue or answered your question.