Skip to main content
andy239955_stm1
Associate III
October 14, 2008
Question

adc1 and dma reliability issue

  • October 14, 2008
  • 4 replies
  • 886 views
Posted on October 14, 2008 at 21:38

adc1 and dma reliability issue

    This topic has been closed for replies.

    4 replies

    stevemelnikoff9
    Associate II
    May 17, 2011
    Posted on May 17, 2011 at 12:40

    Hi Andy.

    Can you post here the revelant parts of your code?

    Thanks,

    Steve.

    andy239955_stm1
    Associate III
    May 17, 2011
    Posted on May 17, 2011 at 12:40

    After a few million scans my set of scan data shifts (circularly) one channel. It stays shifted until I reset the processor.

    This is an unlivable bug, and I can't reliably detect if the shift has occurred just be looking at the data.

    I am using DMA to store the conversions. Since the data shifts circularly (DMA only writes to the correct addresses) it seems that the adc sequencer must be at fault.

    I trigger the scan via the software start bit, called from a 1kHz periodic timer routine (the system timer tick). I use bitband access for the start scan bit (cr2 bit 22).

    I set the settling time to the maximum (to minimize one channel's value from affecting another's).

    I process the scanned values in the DMA ISR.

    When I stop the processor after the fault all of the ADC configuration values are unchanged from my initialization.

    Since a single software conversion is actually a scan of 1 channel I have no confidence that asking for conversions one at a time is going to solve the problem.

    Am I alone in my using the adc in this way?

    Am I alone in needing the hardware to work correctly more than 30 million times in a row?

    ----

    The only truly weird thing I do is to use structs for access to the adc controller registers. Using a struct requires that the controller register support single byte accesses, and the manual doesn't state which registers require 16 or 32 bit access. Some peripherals don't work with 8 bit accesses but I can't imagine that being intermittent, and after configuration is completed I use bit-band access so the use of a struct should be moot.

    andy239955_stm1
    Associate III
    May 17, 2011
    Posted on May 17, 2011 at 12:40

    my bad,

    I was running the ADC at 16MHz, its max frequency is 14MHz.

    I finally noticed a comment in my code:

    //todo: set the adc prescaler.

    ryan2399
    Associate II
    May 17, 2011
    Posted on May 17, 2011 at 12:40

    Andy,

    Are you setting the continuous bit (Bit 1 - CONT) in ADC_CR2?

    If so then you shouldn't keep hitting the ADC with a SWSTART every 1ms. Just once will do. I'll assume there is no issue with the structs you're using (since you've checked the register contents with a debugger)

    Have the DMA automatically reload its counter and use continuous conversions for the ADC and then it's pretty much hands off after that.

    I'm scanning with dual-convertors (8 channels total) and using the DMA to store 4 sets of conversions for each channel and it has never gone out of sync.

    Ryan