5V in 3.3V logic level when powering F205 through USB OTG HS

[tuomas]

Posted on December 21, 2011 at 18:54

Hi

We have an odd problem. We have a custom F205RBT6 based board. It can be powered through separate 5V pins or USB. The 5V goes to a 800mA linear regulator which then provides 3.3V to the F205. We have an extra led there controlled via a GPIO but otherwise it's a really simple board containing no extra components. The problem is the board logic levels when powered through the USB. For some reason all our lines are 5V until the F205 firmware sets the pin mux properly. This means that all the time the F205 is in the bootloader mode waiting for user actions, all our 3.3V voltages are actually 5V. This has something to do with the USB OTG HS VBUS sensing line going to pin PB13. That line comes directly from the USB VBUS and is therefore 5V, this should be OK. But somehow that 5V gets through the F205 to all our 3.3V lines (including all the F205 VDD pins) until we set the pin mux. If we cut the line from the board, all 3.3V lines are properly 3.3V. We are using the USB OTG HS without any external PHYs so the pins are directly connected to the F205. Any hints what might be causing this kind of behaviour? Is it possible that the 5V gets through the F205 to 3.3V lines if the pin mux is not set? Thanks.

[Tesla DeLorean]

Posted on December 21, 2011 at 19:33

Any hints what might be causing this kind of behaviour? Is it possible that the 5V gets through the F205 to 3.3V lines if the pin mux is not set?

It sounds exactly like you're back-feeding onto the 3V3 IO RING. Perhaps you should be chatting to your ST FAE.

[tuomas]

Posted on December 21, 2011 at 21:22

It sounds exactly like you're back-feeding onto the 3V3 IO RING.

What do you mean by back-feeding in this case? The USB VBUS goes to the F205 PB13 and to the 3.3V regulator, nowhere else. And by cutting the line to the PB13, the 5V issue gets fixed. Thanks

[emalund]

Posted on December 21, 2011 at 23:07

I do not know if this is what's called ''backfeeding'' but many micros will run (some even flawlwssly) without Vdd applied if an I/O pin is powered.  Any chip is full of ''parasitic diodes'' which is such cases makes unwanted pathways.

Erik

[tuomas]

Posted on December 22, 2011 at 19:51

I attached images of our pcb and schema. I removed the parts not currently populated (pins, regulator and tps2051 for the usb otg power host/slave switching). The problem is reproducable without these parts.

So, if you are bored while waiting for xmas to come, all comments on our bugs are welcome :) ________________ Attachments : f205-pcb-broken-2011-12-22.png : https://st--c.eu10.content.force.com/sfc/dist/version/download/?oid=00Db0000000YtG6&ids=0680X000006I1Fm&d=%2Fa%2F0X0000000blx%2FZjHXlhmRl3yQ_DXoY95KnzKlXOL9gXbVURaF0PeO1xo&asPdf=falsef205-schema-broken-2011-12-22.png : https://st--c.eu10.content.force.com/sfc/dist/version/download/?oid=00Db0000000YtG6&ids=0680X000006I1BX&d=%2Fa%2F0X0000000blu%2F9qE01AdtKkzbZJvQqJxOl0DBpJ.kxQFHXTp9zxPt5WM&asPdf=false